From nobody Tue Apr 23 18:55:12 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 530B0C433FE for ; Wed, 23 Nov 2022 11:45:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237050AbiKWLpd (ORCPT ); Wed, 23 Nov 2022 06:45:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237217AbiKWLp1 (ORCPT ); Wed, 23 Nov 2022 06:45:27 -0500 Received: from smtp-out1.suse.de (smtp-out1.suse.de [IPv6:2001:67c:2178:6::1c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1B611255DB for ; Wed, 23 Nov 2022 03:45:26 -0800 (PST) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 48CE221F33; Wed, 23 Nov 2022 11:45:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1669203925; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=AyhBQAsNxho2kk1GfKGx6zDLyWYyV1QLz+gDG7NJTZA=; b=Zkn7ZzDpoCCf/JgfLleT4uX7j1LVB22KCBz2YLwsoyCKxzEJYFLn6dS2KCoYG/ZDbmrWKd M6vUekyG/a2ld98xp97yxvtjLIwhLz4IRtOgVFz2nFKxZyiNNfQBdi3lyMXNpdB8zeg/Yc ejYMSHpqTF7xKsKSpz0Z4TJdktOrVNE= Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id E31CB13A37; Wed, 23 Nov 2022 11:45:24 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id 6+UDNtQHfmPTUwAAMHmgww (envelope-from ); Wed, 23 Nov 2022 11:45:24 +0000 From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Boris Ostrovsky , xen-devel@lists.xenproject.org Subject: [PATCH v3] x86/boot: skip realmode init code when running as Xen PV guest Date: Wed, 23 Nov 2022 12:45:23 +0100 Message-Id: <20221123114523.3467-1-jgross@suse.com> X-Mailer: git-send-email 2.35.3 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" When running as a Xen PV guest there is no need for setting up the realmode trampoline, as realmode isn't supported in this environment. Trying to setup the trampoline has been proven to be problematic in some cases, especially when trying to debug early boot problems with Xen requiring to keep the EFI boot-services memory mapped (some firmware variants seem to claim basically all memory below 1M for boot services). Introduce new x86_platform_ops operations for that purpose, which can be set to a nop by the Xen PV specific kernel boot code. Fixes: 084ee1c641a0 ("x86, realmode: Relocator for realmode code") Suggested-by: H. Peter Anvin Signed-off-by: Juergen Gross --- V3: - and yet another approach (H. Peter Anvin) --- arch/x86/include/asm/realmode.h | 1 + arch/x86/include/asm/x86_init.h | 4 ++++ arch/x86/kernel/setup.c | 2 +- arch/x86/kernel/x86_init.c | 3 +++ arch/x86/realmode/init.c | 8 ++++++-- arch/x86/xen/enlighten_pv.c | 2 ++ 6 files changed, 17 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/realmode.h b/arch/x86/include/asm/realmod= e.h index fd6f6e5b755a..a336feef0af1 100644 --- a/arch/x86/include/asm/realmode.h +++ b/arch/x86/include/asm/realmode.h @@ -91,6 +91,7 @@ static inline void set_real_mode_mem(phys_addr_t mem) =20 void reserve_real_mode(void); void load_trampoline_pgtable(void); +void init_real_mode(void); =20 #endif /* __ASSEMBLY__ */ =20 diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_ini= t.h index e9170457697e..c1c8c581759d 100644 --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -285,6 +285,8 @@ struct x86_hyper_runtime { * possible in x86_early_init_platform_quirks() by * only using the current x86_hardware_subarch * semantics. + * @realmode_reserve: reserve memory for realmode trampoline + * @realmode_init: initialize realmode trampoline * @hyper: x86 hypervisor specific runtime callbacks */ struct x86_platform_ops { @@ -301,6 +303,8 @@ struct x86_platform_ops { void (*apic_post_init)(void); struct x86_legacy_features legacy; void (*set_legacy_features)(void); + void (*realmode_reserve)(void); + void (*realmode_init)(void); struct x86_hyper_runtime hyper; struct x86_guest guest; }; diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 216fee7144ee..892609cde4a2 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1175,7 +1175,7 @@ void __init setup_arch(char **cmdline_p) * Moreover, on machines with SandyBridge graphics or in setups that use * crashkernel the entire 1M is reserved anyway. */ - reserve_real_mode(); + x86_platform.realmode_reserve(); =20 init_mem_mapping(); =20 diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c index 57353519bc11..ef80d361b463 100644 --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -25,6 +25,7 @@ #include #include #include +#include =20 void x86_init_noop(void) { } void __init x86_init_uint_noop(unsigned int unused) { } @@ -145,6 +146,8 @@ struct x86_platform_ops x86_platform __ro_after_init = =3D { .get_nmi_reason =3D default_get_nmi_reason, .save_sched_clock_state =3D tsc_save_sched_clock_state, .restore_sched_clock_state =3D tsc_restore_sched_clock_state, + .realmode_reserve =3D reserve_real_mode, + .realmode_init =3D init_real_mode, .hyper.pin_vcpu =3D x86_op_int_noop, =20 .guest =3D { diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c index 41d7669a97ad..247aca9f8ed1 100644 --- a/arch/x86/realmode/init.c +++ b/arch/x86/realmode/init.c @@ -200,14 +200,18 @@ static void __init set_real_mode_permissions(void) set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT); } =20 -static int __init init_real_mode(void) +void __init init_real_mode(void) { if (!real_mode_header) panic("Real mode trampoline was not allocated"); =20 setup_real_mode(); set_real_mode_permissions(); +} =20 +static int __init call_init_real_mode(void) +{ + x86_platform.realmode_init(); return 0; } -early_initcall(init_real_mode); +early_initcall(call_init_real_mode); diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index 038da45f057a..8944726255c9 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -1266,6 +1266,8 @@ asmlinkage __visible void __init xen_start_kernel(str= uct start_info *si) xen_vcpu_info_reset(0); =20 x86_platform.get_nmi_reason =3D xen_get_nmi_reason; + x86_platform.realmode_reserve =3D x86_init_noop; + x86_platform.realmode_init =3D x86_init_noop; =20 x86_init.resources.memory_setup =3D xen_memory_setup; x86_init.irqs.intr_mode_select =3D x86_init_noop; --=20 2.35.3