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bh=+M+4H7JP9TPokpt207QPaKodTXJurywMQrtxzR4L+NM=; b=f0bqYLDx0NIAzf18YVjniYL+Lc+2ExZqGjR1xBtICbm8JRg3xq5zLkAcUJZx0iXckT+GqD9iyDv9hMM7E0sXQ/5TKLiJUSxnClS2SxiqiYwvpfuhVvT5nOc4Llanl5NqiWXX9Z/lIPMqp8XWfdcHBLvtno9qN9bshq26ghCdJ5Q= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Luca Fancellu , Julien Grall Subject: [PATCH 2/3] xen/arm: debug-pl011.inc: Use macros instead of hardcoded values Date: Fri, 18 Nov 2022 12:46:17 +0100 Message-ID: <20221118114618.20754-3-michal.orzel@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221118114618.20754-1-michal.orzel@amd.com> References: <20221118114618.20754-1-michal.orzel@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT108:EE_|PH8PR12MB6865:EE_ X-MS-Office365-Filtering-Correlation-Id: 9f95dd7c-98b6-44ff-3b18-08dac95a8e96 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Nov 2022 11:46:40.2171 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9f95dd7c-98b6-44ff-3b18-08dac95a8e96 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT108.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6865 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1668772041343100005 Content-Type: text/plain; charset="utf-8" Make use of the macros defined in asm/pl011-uart.h instead of hardcoding the values. Also, take the opportunity to fix the file extension in a top-level comment. No functional change intended. Signed-off-by: Michal Orzel Reviewed-by: Luca Fancellu Acked-by: Julien Grall --- This patch has already been reviewed/acked when pushed as a standalone one. Added to the series for ease of merging. --- xen/arch/arm/arm64/debug-pl011.inc | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/arm64/debug-pl011.inc b/xen/arch/arm/arm64/debug-= pl011.inc index 1928a2e3ffbb..d82f2f1de197 100644 --- a/xen/arch/arm/arm64/debug-pl011.inc +++ b/xen/arch/arm/arm64/debug-pl011.inc @@ -1,5 +1,5 @@ /* - * xen/arch/arm/arm64/debug-pl011.S + * xen/arch/arm/arm64/debug-pl011.inc * * PL011 specific debug code * @@ -16,6 +16,8 @@ * GNU General Public License for more details. */ =20 + #include + /* * PL011 UART initialization * xb: register which containts the UART base address @@ -23,13 +25,13 @@ */ .macro early_uart_init xb, c mov x\c, #(7372800 / CONFIG_EARLY_UART_PL011_BAUD_RATE % 16) - strh w\c, [\xb, #0x28] /* -> UARTFBRD (Baud divisor fraction= ) */ + strh w\c, [\xb, #FBRD] /* -> UARTFBRD (Baud divisor fraction= ) */ mov x\c, #(7372800 / CONFIG_EARLY_UART_PL011_BAUD_RATE / 16) - strh w\c, [\xb, #0x24] /* -> UARTIBRD (Baud divisor integer)= */ + strh w\c, [\xb, #IBRD] /* -> UARTIBRD (Baud divisor integer)= */ mov x\c, #0x60 /* 8n1 */ - str w\c, [\xb, #0x2C] /* -> UARTLCR_H (Line control) */ - ldr x\c, =3D0x00000301 /* RXE | TXE | UARTEN */ - str w\c, [\xb, #0x30] /* -> UARTCR (Control Register) */ + str w\c, [\xb, #LCR_H] /* -> UARTLCR_H (Line control) */ + ldr x\c, =3D(RXE | TXE | UARTEN) + str w\c, [\xb, #CR] /* -> UARTCR (Control Register) */ .endm =20 /* @@ -39,8 +41,8 @@ */ .macro early_uart_ready xb, c 1: - ldrh w\c, [\xb, #0x18] /* <- UARTFR (Flag register) */ - tst w\c, #0x8 /* Check BUSY bit */ + ldrh w\c, [\xb, #FR] /* <- UARTFR (Flag register) */ + tst w\c, #BUSY /* Check BUSY bit */ b.ne 1b /* Wait for the UART to be ready */ .endm =20 @@ -50,7 +52,7 @@ * wt: register which contains the character to transmit */ .macro early_uart_transmit xb, wt - strb \wt, [\xb] /* -> UARTDR (Data Register) */ + strb \wt, [\xb, #DR] /* -> UARTDR (Data Register) */ .endm =20 /* --=20 2.25.1