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helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v2] xen/arm: Do not route NS phys timer IRQ to Xen Date: Fri, 28 Oct 2022 14:49:37 +0200 Message-ID: <20221028124937.27677-1-michal.orzel@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0000C407:EE_|IA1PR12MB6580:EE_ X-MS-Office365-Filtering-Correlation-Id: 765ff581-ba31-43b9-ccbc-08dab8e2e840 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: XT6ITHF9kZbGL//bFDa9JaYcVK9XRoSy9HqxyabqWKRqqs7jZsxb1N1LmnGi3Z/D4bYyn6q9CWAwZmMEG+Y2/amgF0J6KsWxQ3WPumVZn8l32nL+Do7pp/ffciBwtxGoY4ncHZQ1YaZ91l/ujymz4KJAYESeOXJfnQCm7xuhYVPEHOcm4Lydhan3TZmUPLvd9Drkq4M6PRhd7zn8+te3++N4Am8JopMR53qd0ZTcyTVamNWorgtK5k8oYdfYV0fnLUDhgSCJVCRTh3+Vn0Bbj+mYr14CI3eGTjEsGofzupDlukUCef1X+YruQTwQ98F9Dmmjq/gZ342UIYqf+AafuhbgbYGluc2jWe6mUDeXWATUtJ9H21KcNVc3p07Oz+9WkrraQiw6Ip+svf9lDPd8nTLbqZfkDOgQ5vceRHqKOueT3tm93UjIlHD7jhNdE7WWMlseirVAGyt8+hAT+jmOyQ2tGA1G7ybEI8PZ6ylGboIobz4RElkl6SKRXiQfPPzrHcKGDVBQFdq+bpJyx/WqMBjYfQ3+vV7RAnUolzBnEkO2ZizMuck69J2Dpt00p4UniKF0of/t4Ooe7LdYwqsAbVYJ29AqcxqlorvgEWxH8WsURXZTbgmCMr4ac82/7e2AK2o5FMgrBSmHGsVHp6/H673Dz2TB4khR0k/4VuFxgv6YcfHw8NR4gKIdkJIpho4gxiZeN3hIRg2Ec/HEiZR/mKh566PJKSYZ0A8/E82NVlu8fZfPQhvLZVv4BLd1shTFQhrLPT65wo6FjlWzs/JpycDfAJdSy/bL1GkOoQddi2gd6f2We+IG7LtPwW4lZzncDZRsvZ1iPve+4/NDuTNS8Q== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(346002)(376002)(39860400002)(396003)(136003)(451199015)(36840700001)(40470700004)(46966006)(36756003)(83380400001)(44832011)(2616005)(47076005)(426003)(356005)(82740400003)(966005)(186003)(8936002)(81166007)(478600001)(336012)(86362001)(40460700003)(41300700001)(1076003)(70206006)(70586007)(2906002)(4326008)(5660300002)(8676002)(40480700001)(36860700001)(6916009)(54906003)(26005)(316002)(82310400005)(6666004)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2022 12:49:52.4558 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 765ff581-ba31-43b9-ccbc-08dab8e2e840 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000C407.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6580 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1666961424294100001 Content-Type: text/plain; charset="utf-8" At the moment, we route NS phys timer IRQ to Xen even though it does not make use of this timer. Xen uses hypervisor timer for itself and the physical timer is fully emulated, hence there is nothing that can trigger such IRQ. This means that requesting/releasing IRQ ends up as a deadcode as it has no impact on the functional behavior, whereas the code within a handler ends up being unreachable. This is a left over from the early days when the CNTHP IRQ was buggy on the HW model used for testing and we had to use the CNTP instead. Remove the calls to {request/release}_irq for this timer as well as the code within the handler. Since timer_interrupt handler is now only used by the CNTHP, refactor it as follows: - rename it to htimer_interrupt to reflect its purpose, - remove the IRQ affiliation test, - invert the condition to avoid indented code and use unlikely, - improve readability by adding new lines \btw code and comments. Keep the calls to zero the CNTP_CTL_EL0 register for sanity and also remove the corresponding perf counter definition. Signed-off-by: Michal Orzel Reviewed-by: Julien Grall --- Changes in v2: - take the opportunity to rename the handler, modify the condition to avoid the indented code and improve readability. Based on the outcome of the following discussion: https://lore.kernel.org/xen-devel/d55938a3-aaca-1d01-b34f-858dbca9830b@amd.= com/ --- xen/arch/arm/include/asm/perfc_defn.h | 1 - xen/arch/arm/time.c | 34 +++++++++------------------ 2 files changed, 11 insertions(+), 24 deletions(-) diff --git a/xen/arch/arm/include/asm/perfc_defn.h b/xen/arch/arm/include/a= sm/perfc_defn.h index 31f071222b24..3ab0391175d7 100644 --- a/xen/arch/arm/include/asm/perfc_defn.h +++ b/xen/arch/arm/include/asm/perfc_defn.h @@ -70,7 +70,6 @@ PERFCOUNTER(spis, "#SPIs") PERFCOUNTER(guest_irqs, "#GUEST-IRQS") =20 PERFCOUNTER(hyp_timer_irqs, "Hypervisor timer interrupts") -PERFCOUNTER(phys_timer_irqs, "Physical timer interrupts") PERFCOUNTER(virt_timer_irqs, "Virtual timer interrupts") PERFCOUNTER(maintenance_irqs, "Maintenance interrupts") =20 diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index dec53b5f7d53..0054cf2b7b78 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -220,27 +220,18 @@ int reprogram_timer(s_time_t timeout) } =20 /* Handle the firing timer */ -static void timer_interrupt(int irq, void *dev_id, struct cpu_user_regs *r= egs) +static void htimer_interrupt(int irq, void *dev_id, struct cpu_user_regs *= regs) { - if ( irq =3D=3D (timer_irq[TIMER_HYP_PPI]) && - READ_SYSREG(CNTHP_CTL_EL2) & CNTx_CTL_PENDING ) - { - perfc_incr(hyp_timer_irqs); - /* Signal the generic timer code to do its work */ - raise_softirq(TIMER_SOFTIRQ); - /* Disable the timer to avoid more interrupts */ - WRITE_SYSREG(0, CNTHP_CTL_EL2); - } + if ( unlikely(!(READ_SYSREG(CNTHP_CTL_EL2) & CNTx_CTL_PENDING)) ) + return; =20 - if ( irq =3D=3D (timer_irq[TIMER_PHYS_NONSECURE_PPI]) && - READ_SYSREG(CNTP_CTL_EL0) & CNTx_CTL_PENDING ) - { - perfc_incr(phys_timer_irqs); - /* Signal the generic timer code to do its work */ - raise_softirq(TIMER_SOFTIRQ); - /* Disable the timer to avoid more interrupts */ - WRITE_SYSREG(0, CNTP_CTL_EL0); - } + perfc_incr(hyp_timer_irqs); + + /* Signal the generic timer code to do its work */ + raise_softirq(TIMER_SOFTIRQ); + + /* Disable the timer to avoid more interrupts */ + WRITE_SYSREG(0, CNTHP_CTL_EL2); } =20 static void vtimer_interrupt(int irq, void *dev_id, struct cpu_user_regs *= regs) @@ -302,12 +293,10 @@ void init_timer_interrupt(void) WRITE_SYSREG(0, CNTHP_CTL_EL2); /* Hypervisor's timer disabled */ isb(); =20 - request_irq(timer_irq[TIMER_HYP_PPI], 0, timer_interrupt, + request_irq(timer_irq[TIMER_HYP_PPI], 0, htimer_interrupt, "hyptimer", NULL); request_irq(timer_irq[TIMER_VIRT_PPI], 0, vtimer_interrupt, "virtimer", NULL); - request_irq(timer_irq[TIMER_PHYS_NONSECURE_PPI], 0, timer_interrupt, - "phytimer", NULL); =20 check_timer_irq_cfg(timer_irq[TIMER_HYP_PPI], "hypervisor"); check_timer_irq_cfg(timer_irq[TIMER_VIRT_PPI], "virtual"); @@ -326,7 +315,6 @@ static void deinit_timer_interrupt(void) =20 release_irq(timer_irq[TIMER_HYP_PPI], NULL); release_irq(timer_irq[TIMER_VIRT_PPI], NULL); - release_irq(timer_irq[TIMER_PHYS_NONSECURE_PPI], NULL); } =20 /* Wait a set number of microseconds */ --=20 2.25.1