From nobody Tue Feb 10 11:15:58 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org ARC-Seal: i=1; a=rsa-sha256; t=1666451956; cv=none; d=zohomail.com; s=zohoarc; b=hThCHrQQB1txQnn0yA8b5gHeUtzHQLDYxK3OgkakqEFhLmhs8xW5528MebZ8bzhjw7bTpkaWzoy4cUYo0Zsm3zoe3DFFDZM+21b52obIU7XPvvihxoUwbIEWhJlugUyBn8QcVUeLAmYsm47/b6S56XwYSh7L9rVw/HQjKKEML0s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1666451956; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=QrKVoHX4qf0LlBAWONoW3KGm6ybNg9XRNoyqYYBQsCU=; b=iWa7X95cLhacCFRrH9aQRuUQO2U3XSOqj0HcS2xLCH6+FsLOgh+obM7Z8XCl7cWvJvPLEPc9sNLu7qQ7KfSHxZRwhpuVfruU4nws+JV//Z6BuksxFsIAEoafffQ8nAG4Pnrah8ZdSrLo5+ejkc7nzg+pd1hxDuwHRO4QpeskPjE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1666451956425881.782829517166; Sat, 22 Oct 2022 08:19:16 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.428370.678421 (Exim 4.92) (envelope-from ) id 1omGH1-0004TF-O7; Sat, 22 Oct 2022 15:18:55 +0000 Received: by outflank-mailman (output) from mailman id 428370.678421; Sat, 22 Oct 2022 15:18:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1omGH1-0004T8-LI; Sat, 22 Oct 2022 15:18:55 +0000 Received: by outflank-mailman (input) for mailman id 428370; Sat, 22 Oct 2022 15:18:55 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1omGH1-0004Sq-9R for xen-devel@lists.xenproject.org; Sat, 22 Oct 2022 15:18:55 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1omGH0-0005Z5-TT; Sat, 22 Oct 2022 15:18:54 +0000 Received: from 54-240-197-224.amazon.com ([54.240.197.224] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1omG3I-00023n-1G; Sat, 22 Oct 2022 15:04:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=QrKVoHX4qf0LlBAWONoW3KGm6ybNg9XRNoyqYYBQsCU=; b=yeT5y7CLP3XFkDni1Tr9DIuf6D qm91moVcg3R/j7l+jg7D6etvgIhU8U5cBv6Wb9JhEmFmkfc73yAbs1nFEDqm1OvHkkwd6Ji1zs5NP EeT7VFaoSy5eU0hMQDzCXJtgXRoPDHKtCjWurCMwa1io1yPQOb/c//MCfirq07hfpksk=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: marco.solieri@minervasys.tech, lucmiccio@gmail.com, carlo.nonato@minervasys.tech, Julien Grall , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [RFC v2 12/12] xen/arm64: smpboot: Directly switch to the runtime page-tables Date: Sat, 22 Oct 2022 16:04:22 +0100 Message-Id: <20221022150422.17707-13-julien@xen.org> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221022150422.17707-1-julien@xen.org> References: <20221022150422.17707-1-julien@xen.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @xen.org) X-ZM-MESSAGEID: 1666451958342100001 Content-Type: text/plain; charset="utf-8" From: Julien Grall Switching TTBR while the MMU is on is not safe. Now that the identity mapping will not clash with the rest of the memory layout, we can avoid creating temporary page-tables every time a CPU is brought up. The arm32 code will use a different approach. So this issue is for now only resolved on arm64. Signed-off-by: Julien Grall ---- Changes in v2: - Remove arm32 code --- xen/arch/arm/arm32/smpboot.c | 4 ++++ xen/arch/arm/arm64/head.S | 29 +++++++++-------------------- xen/arch/arm/arm64/smpboot.c | 15 ++++++++++++++- xen/arch/arm/include/asm/smp.h | 1 + xen/arch/arm/smpboot.c | 1 + 5 files changed, 29 insertions(+), 21 deletions(-) diff --git a/xen/arch/arm/arm32/smpboot.c b/xen/arch/arm/arm32/smpboot.c index e7368665d50d..518e9f9c7e70 100644 --- a/xen/arch/arm/arm32/smpboot.c +++ b/xen/arch/arm/arm32/smpboot.c @@ -21,6 +21,10 @@ int arch_cpu_up(int cpu) return platform_cpu_up(cpu); } =20 +void arch_cpu_up_finish(void) +{ +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 223cc7631d3b..8765a1570839 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -308,6 +308,7 @@ real_start_efi: bl check_cpu_mode bl cpu_init bl create_page_tables + load_paddr x0, boot_pgtable bl enable_mmu =20 /* We are still in the 1:1 mapping. Jump to the runtime Virtual Ad= dress. */ @@ -365,29 +366,14 @@ GLOBAL(init_secondary) #endif bl check_cpu_mode bl cpu_init - bl create_page_tables + load_paddr x0, init_ttbr + ldr x0, [x0] bl enable_mmu =20 /* We are still in the 1:1 mapping. Jump to the runtime Virtual Ad= dress. */ ldr x0, =3Dsecondary_switched br x0 secondary_switched: - /* - * Non-boot CPUs need to move on to the proper pagetables, which w= ere - * setup in init_secondary_pagetables. - * - * XXX: This is not compliant with the Arm Arm. - */ - ldr x4, =3Dinit_ttbr /* VA of TTBR0_EL2 stashed by CPU 0= */ - ldr x4, [x4] /* Actual value */ - dsb sy - msr TTBR0_EL2, x4 - dsb sy - isb - tlbi alle2 - dsb sy /* Ensure completion of TLB flush */ - isb - #ifdef CONFIG_EARLY_PRINTK /* Use a virtual address to access the UART. */ ldr x23, =3DEARLY_UART_VIRTUAL_ADDRESS @@ -672,9 +658,13 @@ ENDPROC(create_page_tables) * mapping. In other word, the caller is responsible to switch to the runt= ime * mapping. * - * Clobbers x0 - x3 + * Inputs: + * x0 : Physical address of the page tables. + * + * Clobbers x0 - x4 */ enable_mmu: + mov x4, x0 PRINT("- Turning on paging -\r\n") =20 /* @@ -685,8 +675,7 @@ enable_mmu: dsb nsh =20 /* Write Xen's PT's paddr into TTBR0_EL2 */ - load_paddr x0, boot_pgtable - msr TTBR0_EL2, x0 + msr TTBR0_EL2, x4 isb =20 mrs x0, SCTLR_EL2 diff --git a/xen/arch/arm/arm64/smpboot.c b/xen/arch/arm/arm64/smpboot.c index 694fbf67e62a..9637f424699e 100644 --- a/xen/arch/arm/arm64/smpboot.c +++ b/xen/arch/arm/arm64/smpboot.c @@ -106,10 +106,23 @@ int __init arch_cpu_init(int cpu, struct dt_device_no= de *dn) =20 int arch_cpu_up(int cpu) { + int rc; + if ( !smp_enable_ops[cpu].prepare_cpu ) return -ENODEV; =20 - return smp_enable_ops[cpu].prepare_cpu(cpu); + update_identity_mapping(true); + + rc =3D smp_enable_ops[cpu].prepare_cpu(cpu); + if ( rc ) + update_identity_mapping(false); + + return rc; +} + +void arch_cpu_up_finish(void) +{ + update_identity_mapping(false); } =20 /* diff --git a/xen/arch/arm/include/asm/smp.h b/xen/arch/arm/include/asm/smp.h index 8133d5c29572..a37ca55bff2c 100644 --- a/xen/arch/arm/include/asm/smp.h +++ b/xen/arch/arm/include/asm/smp.h @@ -25,6 +25,7 @@ extern void noreturn stop_cpu(void); extern int arch_smp_init(void); extern int arch_cpu_init(int cpu, struct dt_device_node *dn); extern int arch_cpu_up(int cpu); +extern void arch_cpu_up_finish(void); =20 int cpu_up_send_sgi(int cpu); =20 diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index f7bda3a18b48..32e1d30e087e 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -509,6 +509,7 @@ int __cpu_up(unsigned int cpu) init_data.cpuid =3D ~0; smp_up_cpu =3D MPIDR_INVALID; clean_dcache(smp_up_cpu); + arch_cpu_up_finish(); =20 if ( !cpu_online(cpu) ) { --=20 2.37.1