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b=GiznS+bq9UmTyCb/84UqC7dVFvyhh8Jdsa81hYsIpiHQs3MOtUerHwZtDl9Avrxzf1XiT8WaYTHxr19al1lnNUgjH28gdab2OuQOwcAeG1041g3hg9SZ7vxQo6wwvGf7zkFmsO9He/f761gyrdKo04lEwX1jZbaeAa7HzGxEBbPuwSq6A/CZAZ3oR1fJHagb5WOpa3xGp5k1hg7p5CgZjwm2gfxkD1EHIJBQ6jRzLCxjWjG/N8FgGEcN09igRcIr7Fns02lNFC3ohMuXQr/P970rcwQE62vHTjzhqi4psantt6RzJ8EmsQ5EArKDQmNY9zwMWsAkU3jDt2pHVHviRg== From: Volodymyr Babchuk To: "xen-devel@lists.xenproject.org" CC: Oleksandr Andrushchenko , Jan Beulich , Andrew Cooper , =?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Wei Liu , George Dunlap , Julien Grall , Stefano Stabellini , Paul Durrant , Volodymyr Babchuk Subject: [PATCH v2 1/4] pci: add rwlock to pcidevs_lock machinery Thread-Topic: [PATCH v2 1/4] pci: add rwlock to pcidevs_lock machinery Thread-Index: AQHYmuuJlTOCfCU2VEeylMdGd6xTkw== Date: Mon, 18 Jul 2022 21:15:42 +0000 Message-ID: <20220718211521.664729-2-volodymyr_babchuk@epam.com> References: <20220718211521.664729-1-volodymyr_babchuk@epam.com> In-Reply-To: <20220718211521.664729-1-volodymyr_babchuk@epam.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.36.1 x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 9a871693-0bba-4246-9dd2-08da6902ac02 x-ms-traffictypediagnostic: VI1PR03MB6288:EE_ x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="utf-8" From: Oleksandr Andrushchenko Currently pcidevs lock is a global recursive spinlock which is fine for the existing use cases. It is used to both protect pdev instances themselves from being removed while in use and to make sure the update of the relevant pdev properties is synchronized. Moving towards vPCI is used for guests this becomes problematic in terms of lock contention. For example, during vpci_{read|write} the access to pdev must be protected to prevent pdev disappearing under our feet. This needs to be done with the help of pcidevs_{lock|unlock}. On the other hand it is highly undesirable to lock all other pdev accesses which only use pdevs in read mode, e.g. those which do not remove or add pdevs. For the above reasons introduce a read/write lock which will help preventing locking contentions between pdev readers and writers. This read/write lock replaces current recursive spinlock. By default all existing code uses pcidevs_lock() which takes write lock. This ensures that all existing locking logic stays the same. To justify this change, replace locks in (V)MSI code with read locks. This code is a perfect target, as (V)MSI code only requires that pdevs will not disappear during handling, while (V)MSI state is protected by own locks. This is in preparation for vPCI to be used for guests. Signed-off-by: Oleksandr Andrushchenko Signed-off-by: Volodymyr Babchuk --- Since v1: - user per CPU variable to track recursive readers and writers - use read locks in vmsi code --- xen/arch/x86/hvm/vmsi.c | 22 ++++++------ xen/arch/x86/irq.c | 8 ++--- xen/arch/x86/msi.c | 16 ++++----- xen/drivers/passthrough/pci.c | 65 +++++++++++++++++++++++++++++++---- xen/include/xen/pci.h | 10 +++++- 5 files changed, 91 insertions(+), 30 deletions(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index d4a8c953e2..c1ede676d0 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -466,7 +466,7 @@ int msixtbl_pt_register(struct domain *d, struct pirq *= pirq, uint64_t gtable) struct msixtbl_entry *entry, *new_entry; int r =3D -EINVAL; =20 - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); ASSERT(spin_is_locked(&d->event_lock)); =20 if ( !msixtbl_initialised(d) ) @@ -536,7 +536,7 @@ void msixtbl_pt_unregister(struct domain *d, struct pir= q *pirq) struct pci_dev *pdev; struct msixtbl_entry *entry; =20 - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); ASSERT(spin_is_locked(&d->event_lock)); =20 if ( !msixtbl_initialised(d) ) @@ -682,7 +682,7 @@ static int vpci_msi_update(const struct pci_dev *pdev, = uint32_t data, { unsigned int i; =20 - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); =20 if ( (address & MSI_ADDR_BASE_MASK) !=3D MSI_ADDR_HEADER ) { @@ -724,7 +724,7 @@ void vpci_msi_arch_update(struct vpci_msi *msi, const s= truct pci_dev *pdev) =20 ASSERT(msi->arch.pirq !=3D INVALID_PIRQ); =20 - pcidevs_lock(); + pcidevs_read_lock(); for ( i =3D 0; i < msi->vectors && msi->arch.bound; i++ ) { struct xen_domctl_bind_pt_irq unbind =3D { @@ -743,7 +743,7 @@ void vpci_msi_arch_update(struct vpci_msi *msi, const s= truct pci_dev *pdev) =20 msi->arch.bound =3D !vpci_msi_update(pdev, msi->data, msi->address, msi->vectors, msi->arch.pirq, msi->= mask); - pcidevs_unlock(); + pcidevs_read_unlock(); } =20 static int vpci_msi_enable(const struct pci_dev *pdev, unsigned int nr, @@ -783,10 +783,10 @@ int vpci_msi_arch_enable(struct vpci_msi *msi, const = struct pci_dev *pdev, return rc; msi->arch.pirq =3D rc; =20 - pcidevs_lock(); + pcidevs_read_lock(); msi->arch.bound =3D !vpci_msi_update(pdev, msi->data, msi->address, ve= ctors, msi->arch.pirq, msi->mask); - pcidevs_unlock(); + pcidevs_read_unlock(); =20 return 0; } @@ -798,7 +798,7 @@ static void vpci_msi_disable(const struct pci_dev *pdev= , int pirq, =20 ASSERT(pirq !=3D INVALID_PIRQ); =20 - pcidevs_lock(); + pcidevs_read_lock(); for ( i =3D 0; i < nr && bound; i++ ) { struct xen_domctl_bind_pt_irq bind =3D { @@ -814,7 +814,7 @@ static void vpci_msi_disable(const struct pci_dev *pdev= , int pirq, spin_lock(&pdev->domain->event_lock); unmap_domain_pirq(pdev->domain, pirq); spin_unlock(&pdev->domain->event_lock); - pcidevs_unlock(); + pcidevs_read_unlock(); } =20 void vpci_msi_arch_disable(struct vpci_msi *msi, const struct pci_dev *pde= v) @@ -861,7 +861,7 @@ int vpci_msix_arch_enable_entry(struct vpci_msix_entry = *entry, =20 entry->arch.pirq =3D rc; =20 - pcidevs_lock(); + pcidevs_read_lock(); rc =3D vpci_msi_update(pdev, entry->data, entry->addr, 1, entry->arch.= pirq, entry->masked); if ( rc ) @@ -869,7 +869,7 @@ int vpci_msix_arch_enable_entry(struct vpci_msix_entry = *entry, vpci_msi_disable(pdev, entry->arch.pirq, 1, false); entry->arch.pirq =3D INVALID_PIRQ; } - pcidevs_unlock(); + pcidevs_read_unlock(); =20 return rc; } diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index de30ee7779..7b4832ffb1 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -2156,7 +2156,7 @@ int map_domain_pirq( struct pci_dev *pdev; unsigned int nr =3D 0; =20 - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); =20 ret =3D -ENODEV; if ( !cpu_has_apic ) @@ -2313,7 +2313,7 @@ int unmap_domain_pirq(struct domain *d, int pirq) if ( (pirq < 0) || (pirq >=3D d->nr_pirqs) ) return -EINVAL; =20 - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); ASSERT(spin_is_locked(&d->event_lock)); =20 info =3D pirq_info(d, pirq); @@ -2907,7 +2907,7 @@ int allocate_and_map_msi_pirq(struct domain *d, int i= ndex, int *pirq_p, =20 msi->irq =3D irq; =20 - pcidevs_lock(); + pcidevs_read_lock(); /* Verify or get pirq. */ spin_lock(&d->event_lock); pirq =3D allocate_pirq(d, index, *pirq_p, irq, type, &msi->entry_nr); @@ -2923,7 +2923,7 @@ int allocate_and_map_msi_pirq(struct domain *d, int i= ndex, int *pirq_p, =20 done: spin_unlock(&d->event_lock); - pcidevs_unlock(); + pcidevs_read_unlock(); if ( ret ) { switch ( type ) diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c index 6be81e6c3b..6ce7b5523a 100644 --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -613,7 +613,7 @@ static int msi_capability_init(struct pci_dev *dev, u8 slot =3D PCI_SLOT(dev->devfn); u8 func =3D PCI_FUNC(dev->devfn); =20 - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); pos =3D pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSI); if ( !pos ) return -ENODEV; @@ -782,7 +782,7 @@ static int msix_capability_init(struct pci_dev *dev, if ( !pos ) return -ENODEV; =20 - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); =20 control =3D pci_conf_read16(dev->sbdf, msix_control_reg(pos)); /* @@ -999,7 +999,7 @@ static int __pci_enable_msi(struct msi_info *msi, struc= t msi_desc **desc) struct pci_dev *pdev; struct msi_desc *old_desc; =20 - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); pdev =3D pci_get_pdev(msi->seg, msi->bus, msi->devfn); if ( !pdev ) return -ENODEV; @@ -1054,7 +1054,7 @@ static int __pci_enable_msix(struct msi_info *msi, st= ruct msi_desc **desc) struct pci_dev *pdev; struct msi_desc *old_desc; =20 - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); pdev =3D pci_get_pdev(msi->seg, msi->bus, msi->devfn); if ( !pdev || !pdev->msix ) return -ENODEV; @@ -1145,7 +1145,7 @@ int pci_prepare_msix(u16 seg, u8 bus, u8 devfn, bool = off) if ( !use_msi ) return 0; =20 - pcidevs_lock(); + pcidevs_read_lock(); pdev =3D pci_get_pdev(seg, bus, devfn); if ( !pdev ) rc =3D -ENODEV; @@ -1158,7 +1158,7 @@ int pci_prepare_msix(u16 seg, u8 bus, u8 devfn, bool = off) } else rc =3D msix_capability_init(pdev, NULL, NULL); - pcidevs_unlock(); + pcidevs_read_unlock(); =20 return rc; } @@ -1169,7 +1169,7 @@ int pci_prepare_msix(u16 seg, u8 bus, u8 devfn, bool = off) */ int pci_enable_msi(struct msi_info *msi, struct msi_desc **desc) { - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); =20 if ( !use_msi ) return -EPERM; @@ -1305,7 +1305,7 @@ int pci_restore_msi_state(struct pci_dev *pdev) unsigned int type =3D 0, pos =3D 0; u16 control =3D 0; =20 - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); =20 if ( !use_msi ) return -EOPNOTSUPP; diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index 938821e593..f93922acc8 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -50,21 +50,74 @@ struct pci_seg { } bus2bridge[MAX_BUSES]; }; =20 -static spinlock_t _pcidevs_lock =3D SPIN_LOCK_UNLOCKED; +static DEFINE_RWLOCK(_pcidevs_rwlock); +static DEFINE_PER_CPU(unsigned int, pcidevs_read_cnt); +static DEFINE_PER_CPU(unsigned int, pcidevs_write_cnt); =20 void pcidevs_lock(void) { - spin_lock_recursive(&_pcidevs_lock); + pcidevs_write_lock(); } =20 void pcidevs_unlock(void) { - spin_unlock_recursive(&_pcidevs_lock); + pcidevs_write_unlock(); } =20 -bool_t pcidevs_locked(void) +bool pcidevs_locked(void) { - return !!spin_is_locked(&_pcidevs_lock); + return pcidevs_write_locked(); +} + +void pcidevs_read_lock(void) +{ + if ( this_cpu(pcidevs_read_cnt)++ =3D=3D 0 ) + read_lock(&_pcidevs_rwlock); +} + +int pcidevs_read_trylock(void) +{ + int ret =3D 1; + + if ( this_cpu(pcidevs_read_cnt) =3D=3D 0 ) + ret =3D read_trylock(&_pcidevs_rwlock); + if ( ret ) + this_cpu(pcidevs_read_cnt)++; + + return ret; +} + +void pcidevs_read_unlock(void) +{ + ASSERT(this_cpu(pcidevs_read_cnt)); + + if ( --this_cpu(pcidevs_read_cnt) =3D=3D 0 ) + read_unlock(&_pcidevs_rwlock); +} + +bool pcidevs_read_locked(void) +{ + /* Write lock implies read lock */ + return this_cpu(pcidevs_read_cnt) || this_cpu(pcidevs_write_cnt); +} + +void pcidevs_write_lock(void) +{ + if ( this_cpu(pcidevs_write_cnt)++ =3D=3D 0 ) + write_lock(&_pcidevs_rwlock); +} + +void pcidevs_write_unlock(void) +{ + ASSERT(this_cpu(pcidevs_write_cnt)); + + if ( --this_cpu(pcidevs_write_cnt) =3D=3D 0 ) + write_unlock(&_pcidevs_rwlock); +} + +bool pcidevs_write_locked(void) +{ + return rw_is_write_locked(&_pcidevs_rwlock); } =20 static struct radix_tree_root pci_segments; @@ -581,7 +634,7 @@ struct pci_dev *pci_get_pdev(int seg, int bus, int devf= n) struct pci_seg *pseg =3D get_pseg(seg); struct pci_dev *pdev =3D NULL; =20 - ASSERT(pcidevs_locked()); + ASSERT(pcidevs_read_locked()); ASSERT(seg !=3D -1 || bus =3D=3D -1); ASSERT(bus !=3D -1 || devfn =3D=3D -1); =20 diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index f34368643c..052b2ddf9f 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -158,7 +158,15 @@ struct pci_dev { =20 void pcidevs_lock(void); void pcidevs_unlock(void); -bool_t __must_check pcidevs_locked(void); +bool __must_check pcidevs_locked(void); + +void pcidevs_read_lock(void); +void pcidevs_read_unlock(void); +bool __must_check pcidevs_read_locked(void); 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charset="utf-8" Content-ID: <1D95F0D67B20544C809C0743122493D2@eurprd03.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: VI1PR03MB3710.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7c438cfa-7cae-43d5-c2c9-08da6902ac28 X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Jul 2022 21:15:42.4925 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: N04M2wFrNwB4re/zwa2o9dMddffbO+wlqVD1+mOHiqUwdTrhK7RtLS1z5KJp8UGlfi15Ib+Ve6tUZkJaE206t4KHIsO75qXdfDqgMkadR2Q= X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR03MB6288 X-Proofpoint-GUID: zhFlXhG--pwUbkfipFwlwnGzJ__2JklR X-Proofpoint-ORIG-GUID: zhFlXhG--pwUbkfipFwlwnGzJ__2JklR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-18_20,2022-07-18_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 lowpriorityscore=0 mlxscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 adultscore=0 spamscore=0 mlxlogscore=999 suspectscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2206140000 definitions=main-2207180089 X-ZohoMail-DKIM: pass (identity @epam.com) X-ZM-MESSAGEID: 1658178987692100009 From: Oleksandr Andrushchenko A guest would be able to read and write those registers which are not emulated and have no respective vPCI handlers, so it will be possible for it to access the hardware directly. In order to prevent a guest from reads and writes from/to the unhandled registers make sure only hardware domain can access the hardware directly and restrict guests from doing so. Suggested-by: Roger Pau Monn=C3=A9 Signed-off-by: Oleksandr Andrushchenko --- Since v6: - do not use is_hwdom parameter for vpci_{read|write}_hw and use current->domain internally - update commit message New in v6 Moved into another series --- xen/drivers/vpci/vpci.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 9fb3c05b2b..c7a40a2f41 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -215,6 +215,10 @@ static uint32_t vpci_read_hw(pci_sbdf_t sbdf, unsigned= int reg, { uint32_t data; =20 + /* Guest domains are not allowed to read real hardware. */ + if ( !is_hardware_domain(current->domain) ) + return ~(uint32_t)0; + switch ( size ) { case 4: @@ -255,9 +259,13 @@ static uint32_t vpci_read_hw(pci_sbdf_t sbdf, unsigned= int reg, return data; } =20 -static void vpci_write_hw(pci_sbdf_t sbdf, unsigned int reg, unsigned int = size, - uint32_t data) +static void vpci_write_hw(pci_sbdf_t sbdf, unsigned int reg, + unsigned int size, uint32_t data) { + /* Guest domains are not allowed to write real hardware. */ + if ( !is_hardware_domain(current->domain) ) + return; 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charset="utf-8" From: Oleksandr Andrushchenko vPCI MMIO handlers are accessing pdevs without protecting this access with pcidevs_{lock|unlock}. This is not a problem as of now as these are only used by Dom0. But, towards vPCI is used also for guests, we need to properly protect pdev and pdev->vpci from being removed while still in use. For that use pcidevs_read_{un}lock helpers. This patch adds ASSERTs in the code to check that the rwlock is taken and in appropriate mode. Some of such checks require changes to the initialization of local variables which may be accessed before the ASSERT checks the locking. For example see init_bars and mask_write. Signed-off-by: Oleksandr Andrushchenko Signed-off-by: Volodymyr Babchuk --- Since v1: - move pcidevs_read_{lock|unlock} into patch 1 --- xen/arch/x86/hvm/vmsi.c | 24 ++++++++++++++--- xen/drivers/vpci/header.c | 24 +++++++++++++++-- xen/drivers/vpci/msi.c | 21 ++++++++++----- xen/drivers/vpci/msix.c | 55 ++++++++++++++++++++++++++++++++++----- xen/drivers/vpci/vpci.c | 16 +++++++++--- xen/include/xen/pci.h | 1 + xen/include/xen/vpci.h | 2 +- 7 files changed, 121 insertions(+), 22 deletions(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index c1ede676d0..3f250f81a4 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -891,10 +891,16 @@ void vpci_msix_arch_init_entry(struct vpci_msix_entry= *entry) entry->arch.pirq =3D INVALID_PIRQ; } =20 -int vpci_msix_arch_print(const struct vpci_msix *msix) +int vpci_msix_arch_print(const struct domain *d, const struct vpci_msix *m= six) { unsigned int i; =20 + /* + * FIXME: this is not immediately correct, as the lock can be grabbed + * by a different CPU. But this is better then nothing. + */ + ASSERT(pcidevs_read_locked()); + for ( i =3D 0; i < msix->max_entries; i++ ) { const struct vpci_msix_entry *entry =3D &msix->entries[i]; @@ -911,11 +917,23 @@ int vpci_msix_arch_print(const struct vpci_msix *msix) if ( i && !(i % 64) ) { struct pci_dev *pdev =3D msix->pdev; + pci_sbdf_t sbdf =3D pdev->sbdf; =20 spin_unlock(&msix->pdev->vpci->lock); + pcidevs_read_unlock(); + + /* NB: we still hold rcu_read_lock(&domlist_read_lock); here. = */ process_pending_softirqs(); - /* NB: we assume that pdev cannot go away for an alive domain.= */ - if ( !pdev->vpci || !spin_trylock(&pdev->vpci->lock) ) + + if ( !pcidevs_read_trylock() ) + return -EBUSY; + pdev =3D pci_get_pdev_by_domain(d, sbdf.seg, sbdf.bus, sbdf.de= vfn); + /* + * FIXME: we may find a re-allocated pdev's copy here. + * Even occupying the same address as before. Do our best. + */ + if ( !pdev || (pdev !=3D msix->pdev) || !pdev->vpci || + !spin_trylock(&pdev->vpci->lock) ) return -EBUSY; if ( pdev->vpci->msix !=3D msix ) { diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index a1c928a0d2..e0461b1139 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -142,16 +142,19 @@ bool vpci_process_pending(struct vcpu *v) if ( rc =3D=3D -ERESTART ) return true; =20 + pcidevs_read_lock(); spin_lock(&v->vpci.pdev->vpci->lock); /* Disable memory decoding unconditionally on failure. */ modify_decoding(v->vpci.pdev, rc ? v->vpci.cmd & ~PCI_COMMAND_MEMORY : v->vpci.c= md, !rc && v->vpci.rom_only); spin_unlock(&v->vpci.pdev->vpci->lock); + pcidevs_read_unlock(); =20 rangeset_destroy(v->vpci.mem); v->vpci.mem =3D NULL; if ( rc ) + { /* * FIXME: in case of failure remove the device from the domain. * Note that there might still be leftover mappings. While thi= s is @@ -159,7 +162,10 @@ bool vpci_process_pending(struct vcpu *v) * killed in order to avoid leaking stale p2m mappings on * failure. */ + pcidevs_write_lock(); vpci_remove_device(v->vpci.pdev); + pcidevs_write_unlock(); + } } =20 return false; @@ -172,7 +178,16 @@ static int __init apply_map(struct domain *d, const st= ruct pci_dev *pdev, int rc; =20 while ( (rc =3D rangeset_consume_ranges(mem, map_range, &data)) =3D=3D= -ERESTART ) + { + /* + * It's safe to drop and re-acquire the lock in this context + * without risking pdev disappearing because devices cannot be + * removed until the initial domain has been started. + */ + pcidevs_write_unlock(); process_pending_softirqs(); + pcidevs_write_lock(); + } rangeset_destroy(mem); if ( !rc ) modify_decoding(pdev, cmd, false); @@ -450,10 +465,15 @@ static int cf_check init_bars(struct pci_dev *pdev) uint16_t cmd; uint64_t addr, size; unsigned int i, num_bars, rom_reg; - struct vpci_header *header =3D &pdev->vpci->header; - struct vpci_bar *bars =3D header->bars; + struct vpci_header *header; + struct vpci_bar *bars; int rc; =20 + ASSERT(pcidevs_write_locked()); + + header =3D &pdev->vpci->header; + bars =3D header->bars; + switch ( pci_conf_read8(pdev->sbdf, PCI_HEADER_TYPE) & 0x7f ) { case PCI_HEADER_TYPE_NORMAL: diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c index 8f2b59e61a..d864f740cf 100644 --- a/xen/drivers/vpci/msi.c +++ b/xen/drivers/vpci/msi.c @@ -184,12 +184,17 @@ static void cf_check mask_write( =20 static int cf_check init_msi(struct pci_dev *pdev) { - uint8_t slot =3D PCI_SLOT(pdev->devfn), func =3D PCI_FUNC(pdev->devfn); - unsigned int pos =3D pci_find_cap_offset(pdev->seg, pdev->bus, slot, f= unc, - PCI_CAP_ID_MSI); + uint8_t slot, func; + unsigned int pos; uint16_t control; int ret; =20 + ASSERT(pcidevs_write_locked()); + + slot =3D PCI_SLOT(pdev->devfn); + func =3D PCI_FUNC(pdev->devfn); + pos =3D pci_find_cap_offset(pdev->seg, pdev->bus, slot, func, PCI_CAP_= ID_MSI); + if ( !pos ) return 0; =20 @@ -277,6 +282,9 @@ void vpci_dump_msi(void) =20 printk("vPCI MSI/MSI-X d%d\n", d->domain_id); =20 + if ( !pcidevs_read_trylock() ) + continue; + for_each_pdev ( d, pdev ) { const struct vpci_msi *msi; @@ -310,7 +318,7 @@ void vpci_dump_msi(void) printk(" entries: %u maskall: %d enabled: %d\n", msix->max_entries, msix->masked, msix->enabled); =20 - rc =3D vpci_msix_arch_print(msix); + rc =3D vpci_msix_arch_print(d, msix); if ( rc ) { /* @@ -318,12 +326,13 @@ void vpci_dump_msi(void) * holding the lock. */ printk("unable to print all MSI-X entries: %d\n", rc); - process_pending_softirqs(); - continue; + goto pdev_done; } } =20 spin_unlock(&pdev->vpci->lock); + pdev_done: + pcidevs_read_unlock(); process_pending_softirqs(); } } diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index bea0cc7aed..35cc9280f4 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -144,9 +144,13 @@ static struct vpci_msix *msix_find(const struct domain= *d, unsigned long addr) =20 list_for_each_entry ( msix, &d->arch.hvm.msix_tables, next ) { - const struct vpci_bar *bars =3D msix->pdev->vpci->header.bars; + const struct vpci_bar *bars; unsigned int i; =20 + if ( !msix->pdev->vpci ) + continue; + + bars =3D msix->pdev->vpci->header.bars; for ( i =3D 0; i < ARRAY_SIZE(msix->tables); i++ ) if ( bars[msix->tables[i] & PCI_MSIX_BIRMASK].enabled && VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, i) ) @@ -158,7 +162,13 @@ static struct vpci_msix *msix_find(const struct domain= *d, unsigned long addr) =20 static int cf_check msix_accept(struct vcpu *v, unsigned long addr) { - return !!msix_find(v->domain, addr); + int rc; + + pcidevs_read_lock(); + rc =3D !!msix_find(v->domain, addr); + pcidevs_read_unlock(); + + return rc; } =20 static bool access_allowed(const struct pci_dev *pdev, unsigned long addr, @@ -218,17 +228,26 @@ static int cf_check msix_read( struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *d= ata) { const struct domain *d =3D v->domain; - struct vpci_msix *msix =3D msix_find(d, addr); + struct vpci_msix *msix; const struct vpci_msix_entry *entry; unsigned int offset; =20 *data =3D ~0ul; =20 + pcidevs_read_lock(); + + msix =3D msix_find(d, addr); if ( !msix ) + { + pcidevs_read_unlock(); return X86EMUL_RETRY; + } =20 if ( !access_allowed(msix->pdev, addr, len) ) + { + pcidevs_read_unlock(); return X86EMUL_OKAY; + } =20 if ( VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, VPCI_MSIX_PBA) ) { @@ -299,6 +318,7 @@ static int cf_check msix_read( break; } spin_unlock(&msix->pdev->vpci->lock); + pcidevs_read_unlock(); =20 return X86EMUL_OKAY; } @@ -307,15 +327,24 @@ static int cf_check msix_write( struct vcpu *v, unsigned long addr, unsigned int len, unsigned long da= ta) { const struct domain *d =3D v->domain; - struct vpci_msix *msix =3D msix_find(d, addr); + struct vpci_msix *msix; struct vpci_msix_entry *entry; unsigned int offset; =20 + pcidevs_read_lock(); + + msix =3D msix_find(d, addr); if ( !msix ) + { + pcidevs_read_unlock(); return X86EMUL_RETRY; + } =20 if ( !access_allowed(msix->pdev, addr, len) ) + { + pcidevs_read_unlock(); return X86EMUL_OKAY; + } =20 if ( VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, VPCI_MSIX_PBA) ) { @@ -351,6 +380,7 @@ static int cf_check msix_write( break; } =20 + pcidevs_read_unlock(); return X86EMUL_OKAY; } =20 @@ -428,6 +458,7 @@ static int cf_check msix_write( break; } spin_unlock(&msix->pdev->vpci->lock); + pcidevs_read_unlock(); =20 return X86EMUL_OKAY; } @@ -440,9 +471,13 @@ static const struct hvm_mmio_ops vpci_msix_table_ops = =3D { =20 int vpci_make_msix_hole(const struct pci_dev *pdev) { - struct domain *d =3D pdev->domain; + struct domain *d; unsigned int i; =20 + ASSERT(pcidevs_read_locked()); + + d =3D pdev->domain; + if ( !pdev->vpci->msix ) return 0; =20 @@ -487,13 +522,19 @@ int vpci_make_msix_hole(const struct pci_dev *pdev) =20 static int cf_check init_msix(struct pci_dev *pdev) { - struct domain *d =3D pdev->domain; - uint8_t slot =3D PCI_SLOT(pdev->devfn), func =3D PCI_FUNC(pdev->devfn); + struct domain *d; + uint8_t slot, func; unsigned int msix_offset, i, max_entries; uint16_t control; struct vpci_msix *msix; int rc; =20 + ASSERT(pcidevs_write_locked()); + + d =3D pdev->domain; + slot =3D PCI_SLOT(pdev->devfn); + func =3D PCI_FUNC(pdev->devfn); + msix_offset =3D pci_find_cap_offset(pdev->seg, pdev->bus, slot, func, PCI_CAP_ID_MSIX); if ( !msix_offset ) diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index c7a40a2f41..1559763479 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -37,7 +37,9 @@ extern vpci_register_init_t *const __end_vpci_array[]; =20 void vpci_remove_device(struct pci_dev *pdev) { - if ( !has_vpci(pdev->domain) ) + ASSERT(pcidevs_write_locked()); + + if ( !has_vpci(pdev->domain) || !pdev->vpci ) return; =20 spin_lock(&pdev->vpci->lock); @@ -332,10 +334,14 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg,= unsigned int size) return data; } =20 + pcidevs_read_lock(); /* Find the PCI dev matching the address. */ pdev =3D pci_get_pdev_by_domain(d, sbdf.seg, sbdf.bus, sbdf.devfn); - if ( !pdev ) + if ( !pdev || (pdev && !pdev->vpci) ) + { + pcidevs_read_unlock(); return vpci_read_hw(sbdf, reg, size); + } =20 spin_lock(&pdev->vpci->lock); =20 @@ -381,6 +387,7 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, u= nsigned int size) ASSERT(data_offset < size); } spin_unlock(&pdev->vpci->lock); + pcidevs_read_unlock(); =20 if ( data_offset < size ) { @@ -443,9 +450,11 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, uns= igned int size, * Find the PCI dev matching the address. * Passthrough everything that's not trapped. */ + pcidevs_read_lock(); pdev =3D pci_get_pdev_by_domain(d, sbdf.seg, sbdf.bus, sbdf.devfn); - if ( !pdev ) + if ( !pdev || (pdev && !pdev->vpci) ) { + pcidevs_read_unlock(); vpci_write_hw(sbdf, reg, size, data); return; } @@ -486,6 +495,7 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsi= gned int size, ASSERT(data_offset < size); } spin_unlock(&pdev->vpci->lock); + pcidevs_read_unlock(); =20 if ( data_offset < size ) /* Tailing gap, write the remaining. */ diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 052b2ddf9f..c974ebdc94 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -161,6 +161,7 @@ void pcidevs_unlock(void); bool __must_check pcidevs_locked(void); =20 void pcidevs_read_lock(void); +int pcidevs_read_trylock(void); void pcidevs_read_unlock(void); bool __must_check pcidevs_read_locked(void); =20 diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index 67c9a0c631..7ab39839ff 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -175,7 +175,7 @@ int __must_check vpci_msix_arch_enable_entry(struct vpc= i_msix_entry *entry, int __must_check vpci_msix_arch_disable_entry(struct vpci_msix_entry *entr= y, const struct pci_dev *pdev); void vpci_msix_arch_init_entry(struct vpci_msix_entry *entry); -int vpci_msix_arch_print(const struct vpci_msix *msix); +int vpci_msix_arch_print(const struct domain *d, const struct vpci_msix *m= six); =20 /* * Helper functions to fetch MSIX related data. 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b=HSHBprWcvOvJ47W6C0lBrTpdIkkJdm26woGD9bmN+V6SQJQPwN8gXcbJws5djKolitb3myJOzIc9dvaVG+/r/W+ZdP86PKOTpR/jAMHLO7Gw85QAFYy9z8NIOTMUSf4XOCOfXDRzP/eDi1Z23BGYHCJY1zcFSESu5dRijeWYk5V9X5ttaTO+1YX92YDrRIZlYi5xwxJPepMNCuPE2ZYJFi1O6pkYygrHpSVgmHuEL2eOzA2Z4Mm9nHvLs+oPfF6olWhbdlGNc627jf0H1dsSv1qLklZP52bDbHfPHMGVdH3m0GhchY8Aaqi3VccnVnIogrUs7y8B2FnAoLjDfiCSkg== From: Volodymyr Babchuk To: "xen-devel@lists.xenproject.org" CC: Volodymyr Babchuk , =?iso-8859-1?Q?Roger_Pau_Monn=E9?= Subject: [PATCH v2 4/4] vpci: include xen/vmap.h to fix build on ARM Thread-Topic: [PATCH v2 4/4] vpci: include xen/vmap.h to fix build on ARM Thread-Index: AQHYmuuJ09LC1x/2uEWs942YY/fNVA== Date: Mon, 18 Jul 2022 21:15:43 +0000 Message-ID: <20220718211521.664729-5-volodymyr_babchuk@epam.com> References: <20220718211521.664729-1-volodymyr_babchuk@epam.com> In-Reply-To: <20220718211521.664729-1-volodymyr_babchuk@epam.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.36.1 x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 6b6ad0bd-8b6f-4062-f850-08da6902ac80 x-ms-traffictypediagnostic: VI1PR03MB6288:EE_ x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="utf-8" Patch b4f211606011 ("vpci/msix: fix PBA accesses") introduced call to iounmap(), but not added corresponding include. Fixes: b4f211606011 ("vpci/msix: fix PBA accesses") Signed-off-by: Volodymyr Babchuk Acked-by: Jan Beulich Reviewed-by: Roger Pau Monn=C3=A9 --- xen/drivers/vpci/vpci.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 1559763479..674c9b347d 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -19,6 +19,7 @@ =20 #include #include +#include =20 /* Internal struct to store the emulated PCI registers. */ struct vpci_register { --=20 2.36.1