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d="scan'208";a="63592493" From: Andrew Cooper To: Xen-devel CC: Andrew Cooper Subject: [PATCH v2 44/70] x86/pmu: CFI hardening Date: Mon, 14 Feb 2022 12:51:01 +0000 Message-ID: <20220214125127.17985-45-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20220214125127.17985-1-andrew.cooper3@citrix.com> References: <20220214125127.17985-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1644843942303100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Control Flow Integrity schemes use toolchain and optionally hardware support to help protect against call/jump/return oriented programming attacks. Use cf_check to annotate function pointer targets for the toolchain. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- xen/arch/x86/cpu/vpmu_amd.c | 16 ++++++++-------- xen/arch/x86/cpu/vpmu_intel.c | 16 ++++++++-------- xen/arch/x86/oprofile/op_model_athlon.c | 16 ++++++++-------- xen/arch/x86/oprofile/op_model_p4.c | 14 +++++++------- xen/arch/x86/oprofile/op_model_ppro.c | 26 ++++++++++++++------------ 5 files changed, 45 insertions(+), 43 deletions(-) diff --git a/xen/arch/x86/cpu/vpmu_amd.c b/xen/arch/x86/cpu/vpmu_amd.c index 25ad4ecf48a4..5963ce90150a 100644 --- a/xen/arch/x86/cpu/vpmu_amd.c +++ b/xen/arch/x86/cpu/vpmu_amd.c @@ -186,7 +186,7 @@ static void amd_vpmu_unset_msr_bitmap(struct vcpu *v) msr_bitmap_off(vpmu); } =20 -static int amd_vpmu_do_interrupt(struct cpu_user_regs *regs) +static int cf_check amd_vpmu_do_interrupt(struct cpu_user_regs *regs) { return 1; } @@ -206,7 +206,7 @@ static inline void context_load(struct vcpu *v) } } =20 -static int amd_vpmu_load(struct vcpu *v, bool_t from_guest) +static int cf_check amd_vpmu_load(struct vcpu *v, bool from_guest) { struct vpmu_struct *vpmu =3D vcpu_vpmu(v); struct xen_pmu_amd_ctxt *ctxt; @@ -280,7 +280,7 @@ static inline void context_save(struct vcpu *v) rdmsrl(counters[i], counter_regs[i]); } =20 -static int amd_vpmu_save(struct vcpu *v, bool_t to_guest) +static int cf_check amd_vpmu_save(struct vcpu *v, bool to_guest) { struct vpmu_struct *vpmu =3D vcpu_vpmu(v); unsigned int i; @@ -348,7 +348,7 @@ static void context_update(unsigned int msr, u64 msr_co= ntent) } } =20 -static int amd_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content) +static int cf_check amd_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_conte= nt) { struct vcpu *v =3D current; struct vpmu_struct *vpmu =3D vcpu_vpmu(v); @@ -404,7 +404,7 @@ static int amd_vpmu_do_wrmsr(unsigned int msr, uint64_t= msr_content) return 0; } =20 -static int amd_vpmu_do_rdmsr(unsigned int msr, uint64_t *msr_content) +static int cf_check amd_vpmu_do_rdmsr(unsigned int msr, uint64_t *msr_cont= ent) { struct vcpu *v =3D current; struct vpmu_struct *vpmu =3D vcpu_vpmu(v); @@ -422,7 +422,7 @@ static int amd_vpmu_do_rdmsr(unsigned int msr, uint64_t= *msr_content) return 0; } =20 -static void amd_vpmu_destroy(struct vcpu *v) +static void cf_check amd_vpmu_destroy(struct vcpu *v) { struct vpmu_struct *vpmu =3D vcpu_vpmu(v); =20 @@ -440,7 +440,7 @@ static void amd_vpmu_destroy(struct vcpu *v) } =20 /* VPMU part of the 'q' keyhandler */ -static void amd_vpmu_dump(const struct vcpu *v) +static void cf_check amd_vpmu_dump(const struct vcpu *v) { const struct vpmu_struct *vpmu =3D vcpu_vpmu(v); const struct xen_pmu_amd_ctxt *ctxt =3D vpmu->context; @@ -480,7 +480,7 @@ static void amd_vpmu_dump(const struct vcpu *v) } } =20 -static int svm_vpmu_initialise(struct vcpu *v) +static int cf_check svm_vpmu_initialise(struct vcpu *v) { struct xen_pmu_amd_ctxt *ctxt; struct vpmu_struct *vpmu =3D vcpu_vpmu(v); diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c index 22dd4469d920..48b81ab6f018 100644 --- a/xen/arch/x86/cpu/vpmu_intel.c +++ b/xen/arch/x86/cpu/vpmu_intel.c @@ -288,7 +288,7 @@ static inline void __core2_vpmu_save(struct vcpu *v) rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, core2_vpmu_cxt->global_status); } =20 -static int core2_vpmu_save(struct vcpu *v, bool_t to_guest) +static int cf_check core2_vpmu_save(struct vcpu *v, bool to_guest) { struct vpmu_struct *vpmu =3D vcpu_vpmu(v); =20 @@ -407,7 +407,7 @@ static int core2_vpmu_verify(struct vcpu *v) return 0; } =20 -static int core2_vpmu_load(struct vcpu *v, bool_t from_guest) +static int cf_check core2_vpmu_load(struct vcpu *v, bool from_guest) { struct vpmu_struct *vpmu =3D vcpu_vpmu(v); =20 @@ -522,7 +522,7 @@ static int core2_vpmu_msr_common_check(u32 msr_index, i= nt *type, int *index) return 1; } =20 -static int core2_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content) +static int cf_check core2_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_con= tent) { int i, tmp; int type =3D -1, index =3D -1; @@ -690,7 +690,7 @@ static int core2_vpmu_do_wrmsr(unsigned int msr, uint64= _t msr_content) return 0; } =20 -static int core2_vpmu_do_rdmsr(unsigned int msr, uint64_t *msr_content) +static int cf_check core2_vpmu_do_rdmsr(unsigned int msr, uint64_t *msr_co= ntent) { int type =3D -1, index =3D -1; struct vcpu *v =3D current; @@ -730,7 +730,7 @@ static int core2_vpmu_do_rdmsr(unsigned int msr, uint64= _t *msr_content) } =20 /* Dump vpmu info on console, called in the context of keyhandler 'q'. */ -static void core2_vpmu_dump(const struct vcpu *v) +static void cf_check core2_vpmu_dump(const struct vcpu *v) { const struct vpmu_struct *vpmu =3D vcpu_vpmu(v); unsigned int i; @@ -775,7 +775,7 @@ static void core2_vpmu_dump(const struct vcpu *v) } } =20 -static int core2_vpmu_do_interrupt(struct cpu_user_regs *regs) +static int cf_check core2_vpmu_do_interrupt(struct cpu_user_regs *regs) { struct vcpu *v =3D current; u64 msr_content; @@ -802,7 +802,7 @@ static int core2_vpmu_do_interrupt(struct cpu_user_regs= *regs) return 1; } =20 -static void core2_vpmu_destroy(struct vcpu *v) +static void cf_check core2_vpmu_destroy(struct vcpu *v) { struct vpmu_struct *vpmu =3D vcpu_vpmu(v); =20 @@ -816,7 +816,7 @@ static void core2_vpmu_destroy(struct vcpu *v) vpmu_clear(vpmu); } =20 -static int vmx_vpmu_initialise(struct vcpu *v) +static int cf_check vmx_vpmu_initialise(struct vcpu *v) { struct vpmu_struct *vpmu =3D vcpu_vpmu(v); u64 msr_content; diff --git a/xen/arch/x86/oprofile/op_model_athlon.c b/xen/arch/x86/oprofil= e/op_model_athlon.c index 2177f02946e2..7bc5853a6c23 100644 --- a/xen/arch/x86/oprofile/op_model_athlon.c +++ b/xen/arch/x86/oprofile/op_model_athlon.c @@ -164,7 +164,7 @@ static inline u64 op_amd_randomize_ibs_op(u64 val) return val; } =20 -static void athlon_fill_in_addresses(struct op_msrs * const msrs) +static void cf_check athlon_fill_in_addresses(struct op_msrs * const msrs) { msrs->counters[0].addr =3D MSR_K7_PERFCTR0; msrs->counters[1].addr =3D MSR_K7_PERFCTR1; @@ -177,7 +177,7 @@ static void athlon_fill_in_addresses(struct op_msrs * c= onst msrs) msrs->controls[3].addr =3D MSR_K7_EVNTSEL3; } =20 -static void fam15h_fill_in_addresses(struct op_msrs * const msrs) +static void cf_check fam15h_fill_in_addresses(struct op_msrs * const msrs) { msrs->counters[0].addr =3D MSR_AMD_FAM15H_PERFCTR0; msrs->counters[1].addr =3D MSR_AMD_FAM15H_PERFCTR1; @@ -194,7 +194,7 @@ static void fam15h_fill_in_addresses(struct op_msrs * c= onst msrs) msrs->controls[5].addr =3D MSR_AMD_FAM15H_EVNTSEL5; } =20 -static void athlon_setup_ctrs(struct op_msrs const * const msrs) +static void cf_check athlon_setup_ctrs(struct op_msrs const * const msrs) { uint64_t msr_content; int i; @@ -308,9 +308,9 @@ static inline int handle_ibs(int mode, struct cpu_user_= regs const * const regs) return 1; } =20 -static int athlon_check_ctrs(unsigned int const cpu, - struct op_msrs const * const msrs, - struct cpu_user_regs const * const regs) +static int cf_check athlon_check_ctrs( + unsigned int const cpu, struct op_msrs const * const msrs, + struct cpu_user_regs const * const regs) =20 { uint64_t msr_content; @@ -386,7 +386,7 @@ static inline void start_ibs(void) } } =20 -static void athlon_start(struct op_msrs const * const msrs) +static void cf_check athlon_start(struct op_msrs const * const msrs) { uint64_t msr_content; int i; @@ -415,7 +415,7 @@ static void stop_ibs(void) wrmsrl(MSR_AMD64_IBSOPCTL, 0); } =20 -static void athlon_stop(struct op_msrs const * const msrs) +static void cf_check athlon_stop(struct op_msrs const * const msrs) { uint64_t msr_content; int i; diff --git a/xen/arch/x86/oprofile/op_model_p4.c b/xen/arch/x86/oprofile/op= _model_p4.c index b08ba53cbd39..d047258644db 100644 --- a/xen/arch/x86/oprofile/op_model_p4.c +++ b/xen/arch/x86/oprofile/op_model_p4.c @@ -390,7 +390,7 @@ static unsigned int get_stagger(void) static unsigned long reset_value[NUM_COUNTERS_NON_HT]; =20 =20 -static void p4_fill_in_addresses(struct op_msrs * const msrs) +static void cf_check p4_fill_in_addresses(struct op_msrs * const msrs) { unsigned int i; unsigned int addr, stag; @@ -530,7 +530,7 @@ static void pmc_setup_one_p4_counter(unsigned int ctr) } =20 =20 -static void p4_setup_ctrs(struct op_msrs const * const msrs) +static void cf_check p4_setup_ctrs(struct op_msrs const * const msrs) { unsigned int i; uint64_t msr_content; @@ -609,9 +609,9 @@ static void p4_setup_ctrs(struct op_msrs const * const = msrs) } } =20 -static int p4_check_ctrs(unsigned int const cpu, - struct op_msrs const * const msrs, - struct cpu_user_regs const * const regs) +static int cf_check p4_check_ctrs( + unsigned int const cpu, struct op_msrs const * const msrs, + struct cpu_user_regs const * const regs) { unsigned long ctr, stag, real; uint64_t msr_content; @@ -665,7 +665,7 @@ static int p4_check_ctrs(unsigned int const cpu, } =20 =20 -static void p4_start(struct op_msrs const * const msrs) +static void cf_check p4_start(struct op_msrs const * const msrs) { unsigned int stag; uint64_t msr_content; @@ -683,7 +683,7 @@ static void p4_start(struct op_msrs const * const msrs) } =20 =20 -static void p4_stop(struct op_msrs const * const msrs) +static void cf_check p4_stop(struct op_msrs const * const msrs) { unsigned int stag; uint64_t msr_content; diff --git a/xen/arch/x86/oprofile/op_model_ppro.c b/xen/arch/x86/oprofile/= op_model_ppro.c index 72c504a10216..8d7e13ea8777 100644 --- a/xen/arch/x86/oprofile/op_model_ppro.c +++ b/xen/arch/x86/oprofile/op_model_ppro.c @@ -63,7 +63,7 @@ static int counter_width =3D 32; static unsigned long reset_value[OP_MAX_COUNTER]; int ppro_has_global_ctrl =3D 0; =20 -static void ppro_fill_in_addresses(struct op_msrs * const msrs) +static void cf_check ppro_fill_in_addresses(struct op_msrs * const msrs) { int i; =20 @@ -74,7 +74,7 @@ static void ppro_fill_in_addresses(struct op_msrs * const= msrs) } =20 =20 -static void ppro_setup_ctrs(struct op_msrs const * const msrs) +static void cf_check ppro_setup_ctrs(struct op_msrs const * const msrs) { uint64_t msr_content; int i; @@ -128,9 +128,9 @@ static void ppro_setup_ctrs(struct op_msrs const * cons= t msrs) } } =20 -static int ppro_check_ctrs(unsigned int const cpu, - struct op_msrs const * const msrs, - struct cpu_user_regs const * const regs) +static int cf_check ppro_check_ctrs( + unsigned int const cpu, struct op_msrs const * const msrs, + struct cpu_user_regs const * const regs) { u64 val; int i; @@ -170,7 +170,7 @@ static int ppro_check_ctrs(unsigned int const cpu, } =20 =20 -static void ppro_start(struct op_msrs const * const msrs) +static void cf_check ppro_start(struct op_msrs const * const msrs) { uint64_t msr_content; int i; @@ -190,7 +190,7 @@ static void ppro_start(struct op_msrs const * const msr= s) } =20 =20 -static void ppro_stop(struct op_msrs const * const msrs) +static void cf_check ppro_stop(struct op_msrs const * const msrs) { uint64_t msr_content; int i; @@ -206,7 +206,7 @@ static void ppro_stop(struct op_msrs const * const msrs) wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0x0ULL); } =20 -static int ppro_is_arch_pmu_msr(u64 msr_index, int *type, int *index) +static int cf_check ppro_is_arch_pmu_msr(u64 msr_index, int *type, int *in= dex) { if ( (msr_index >=3D MSR_IA32_PERFCTR0) && (msr_index < (MSR_IA32_PERFCTR0 + num_counters)) ) @@ -226,7 +226,7 @@ static int ppro_is_arch_pmu_msr(u64 msr_index, int *typ= e, int *index) return 0; } =20 -static int ppro_allocate_msr(struct vcpu *v) +static int cf_check ppro_allocate_msr(struct vcpu *v) { struct vpmu_struct *vpmu =3D vcpu_vpmu(v); struct arch_msr_pair *msr_content; @@ -245,7 +245,7 @@ static int ppro_allocate_msr(struct vcpu *v) return 0; } =20 -static void ppro_free_msr(struct vcpu *v) +static void cf_check ppro_free_msr(struct vcpu *v) { struct vpmu_struct *vpmu =3D vcpu_vpmu(v); =20 @@ -255,7 +255,8 @@ static void ppro_free_msr(struct vcpu *v) vpmu_reset(vpmu, VPMU_PASSIVE_DOMAIN_ALLOCATED); } =20 -static void ppro_load_msr(struct vcpu *v, int type, int index, u64 *msr_co= ntent) +static void cf_check ppro_load_msr( + struct vcpu *v, int type, int index, u64 *msr_content) { struct arch_msr_pair *msrs =3D vcpu_vpmu(v)->context; switch ( type ) @@ -269,7 +270,8 @@ static void ppro_load_msr(struct vcpu *v, int type, int= index, u64 *msr_content) } } =20 -static void ppro_save_msr(struct vcpu *v, int type, int index, u64 msr_con= tent) +static void cf_check ppro_save_msr( + struct vcpu *v, int type, int index, u64 msr_content) { struct arch_msr_pair *msrs =3D vcpu_vpmu(v)->context; =20 --=20 2.11.0