From nobody Sun May 19 07:31:52 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=citrix.com); dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=2; a=rsa-sha256; t=1643734080; cv=pass; d=zohomail.com; s=zohoarc; b=h0fibdC6dcL2Y7iRoSqCePfwr50y+WftKFb67Wq6kR9CFvuP4+P6VCdfMbC9dytGaZmhQyYBBhWDbZBBLRqpd3ijh1Lhng5yVDeDRF9AH+4ZFhIe35oZ6XXmthevJ9Z1J/wb0r/h2FLsAwGYuW8X0BybiPg1OpOU1dOLLANZgvw= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1643734080; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=uw4nNchZqs0hUl6LILWnvwkTezS63JG+YIFkjLmR6us=; b=AwswrhT/DSE64TrNzThQXoSXuofjGRi/1HmRSyTkTeilGAFOxKzGZk3mmluXyBby2OYysW11STIgFH75/7i62dIj+H+ASCqhZIlpfWDxiRGCdxNclvUI6FriYtLYJszpVVaG7yvCNGvuGfiU1+qWKHsesj7l/Qo/GLk7Qrsvan0= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=citrix.com); dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1643734080367400.2907878179883; Tue, 1 Feb 2022 08:48:00 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.263669.456478 (Exim 4.92) (envelope-from ) id 1nEwJa-0001k3-BI; Tue, 01 Feb 2022 16:47:34 +0000 Received: by outflank-mailman (output) from mailman id 263669.456478; Tue, 01 Feb 2022 16:47:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nEwJa-0001jw-7G; Tue, 01 Feb 2022 16:47:34 +0000 Received: by outflank-mailman (input) for mailman id 263669; Tue, 01 Feb 2022 16:47:33 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nEwJY-0001jg-O0 for xen-devel@lists.xenproject.org; Tue, 01 Feb 2022 16:47:33 +0000 Received: from esa2.hc3370-68.iphmx.com (esa2.hc3370-68.iphmx.com [216.71.145.153]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id a3a158b4-837e-11ec-8f75-fffcc8bd4f1a; Tue, 01 Feb 2022 17:47:29 +0100 (CET) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a3a158b4-837e-11ec-8f75-fffcc8bd4f1a DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1643734050; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=tYlfStrLrbzHtKiANWWxe3HTgEbBnEM//TYWYX+uBeM=; b=E7x54TpG/e5gghhCF+80k7h3EckdXkzquxaftxku+wkZ58stjTlau+dx enKWTVwBvrIBoEqXSw1UlBIEIm1x6QoBFVrx6skLGTXVZXX4qzSzJtUe/ 8U3za/6a2eTetznYVA6zshWI6m4YrB24dHZ07IsxYxSUNZPbTvZabFWxW M=; Authentication-Results: esa2.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com IronPort-SDR: UgnSOZDn3Or0tPH+2jb8nlykhHitL4N2m/QjOlD7NnjZCAub/+H2KgUBpv6QmHTOp7eOSci8yv TOduuQeISxySBtBbuWs3kWzNBfmSpnx4mf5wHIaZLdPWWOIFofOM5/U+zKBKmRkKSlvOte/vVm 2E2tAkpNrtMVwEaRvNaR92QOCadN3Llzevf6vX8Ow5Q1dY4g6f2l/82/UkHUeqmghMUBCfvNpd I2OkWyvutI+9J9KBUYGE5lPogvbYyHQWsJirI0It/sLEjLQmFIXETPImACaFMyfJar4d+EaugQ fb6gBCWRE/IrF3aPcxruPCUD X-SBRS: 5.2 X-MesageID: 63238769 X-Ironport-Server: esa2.hc3370-68.iphmx.com X-Remote-IP: 162.221.156.83 X-Policy: $RELAYED IronPort-Data: A9a23:4+waRKx7pgOuquK7jIt6t+e+wSrEfRIJ4+MujC+fZmUNrF6WrkUPz WIfDWjUO/yONmr2fNx0Otzi9xxU7cCByIUwHAI/+CAxQypGp/SeCIXCJC8cHc8zwu4v7q5Dx 59DAjUVBJlsFhcwnvopW1TYhSEUOZugH9IQM8aZfHAhLeNYYH1500g7wbZg2tQAbeWRWGthh /uj+6UzB3f9s9JEGjp8B3Wr8U4HUFza4Vv0j3RmDRx5lAa2e0o9VfrzEZqZPXrgKrS4K8bhL wr1IBNVyUuCl/slIovNfr8W6STmSJaKVeSFoiI+t6RPHnGuD8H9u0o2HKN0VKtZt9mGt4pOj +QcjbKccgkoHJTSg70AaRtoHC4raMWq+JefSZS+mcmazkmAeHrw2fR+SkoxOOX0+M4uXzsIr 6ZBbmlQMFbT3Ipaw5riIgVort4kI8TxepsWp1lrzC3DDOZgSpfGK0nPzYEDhmxg2Z4fdRrYT +4dWzEzMBjaWAZWIg9HB8MYmNiqqnaqJlW0r3rK/PFqsgA/1jdZy6PxOdDYftiLQ8R9nUuCo G/CuWPjDXkyK9i32TeDtHW2iYfnnz7/WY8UPK218LhtmlL77nweDlgaWEW2pdG9i1WiQJRPJ koM4C0soKMuskuxQbHVXRe1vXqFtR40QMdLHqsx7wTl90bPy1/HXC5eFGcHMYF48p9tLdA36 rOXt4nWQg0+iJO5cnyc1I6KtmqvAyolImBXMEfoUjA5y9XkpYgyiDfGQdBiDLO5g7XJJN3g/ 9yZhHNg3utO1Kbnw43+pAma2Gz0+vAlWyZovl2/Y46z0u9uiGdJjaSM4EOT0/tPJZ3xorKp7 CldwJj2AAzj4PiweM2xrAclQevBCxWtamS0bbtT838JrW7FF5mLJtg43d2GDB01WvvogBewC KMphStf5YVIIFyhZrJtboS6BqwClPa8Tom1CaiEMIsSM/CdkTNrGgk0PyZ8OEi2yCARfVwXY 8/HIa5A815HYUiY8NZGb7hEiuJ6rszP7WjSWYr633yaPUm2PxaopUM+GALWNIgRtfrcyC2Mq oo3H5bUl313DbOvCgGKod97BQ1bdhATWMGpw/G7g8beeGKK7kl7Va+IqV7gEqQ495loehDgp SDgAxIIlQak2BUq62yiMxheVV8mZr4mxVoTNi0wJ1e4nX8lZIek9qAEcJUrO7Ig8YReITRcF aJtlxyoDqsdRzLZ1S4aaJWh/oVueA7y3VCFPja/YSh5dJllHlSb9tjhdwrp1S8PEivo6pdu/ +z+jlvWEcgZWgBvLMfKc/bznVm/imcQxbBpVEzSL9gNJEi1qNp2Kzb8h+McKt0XLUmR3SOT0 gubWE9KpeTEr4Iv3sPOgKSI89WgH+dkRxIIFGjH97emcyLd+zP7k4NHVe+JexHbVX/1p/r+N bkEkamkPaRezlhQsod6H7J69o4E5oPi9+1A0wBpPHTXdFD3WLluFWaLgJtUvapXy74H5QbvA hCT+sNXMKmiMd/+FAJDPxIsa+mO2K1GmjTW6vhpckz26DUuoeiCWERWeRKNlDZcPP1+N4Z8m bUtv8sf6gqejBs2M4nZ0nAIpjrUdnFQAb86spw6AZPwjlt5w15PVpXQFyvq7czdcN5LKEQrf meZiaeqa26wHaYen67fzUTw4Nc= IronPort-HdrOrdr: A9a23:fdcKPKAAb/xcNavlHeg0sceALOsnbusQ8zAXPh9KJiC9I/b1qy nxppkmPH/P6Qr4WBkb6LS90c67MA/hHP9OkPQs1NKZMjUO11HYSr2KgbGSoQEIXheOjdK1tp 0QApSWaueAdGSS5PySiGLTc6dC/DDEytHTuQ639QYScegAUdAG0+4WMHf/LqUgLzM2eqbRWa DsrfZvln6FQzA6f867Dn4KU6zqoMDKrovvZVojCwQ84AeDoDu04PqieiLokys2Yndq+/MP4G LFmwv26uGKtOy68AbV0yv2445NkNXs59NfDIini9QTKB/rlgG0Db4REYGqjXQQmqWC+VwqmN 7Dr1MJONly0WrYeiWPrR7ky2DboUATwk6n7WXdrWrooMT/Sj5/IdFGn5hlfhzQ7FdllM1g0Y pQtljp+aZ/PFflpmDQ9tLIXxZlmg6funw5i9MeiHRZTM83dKJRl4oC50lYea1wUx4S0LpXUN WGMfusp8q/KTihHjLkVyhUsZCRt00Ib1a7qhNogL3R79BU9EoJuHfwivZv2kvoz6hNOKWs0d 60RpiApIs+PvP+UpgNdtvpOfHHclAlYSi8eV56cm6XXJ3uBRr22uvKCfMOlaaXRKA= X-IronPort-AV: E=Sophos;i="5.88,334,1635220800"; d="scan'208";a="63238769" ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=jtiXVl+vxoX0qx+ZjiP5TpwMAiLEYQcoD6FdyjkkTHZEwKgGuecCTKDwC2xpdNNreC3m6QAMuXH1uNmfYEi1ROgEiNWs7gKYAZiXlhPfUEfOiiJK/QR9COVHM4EkqDAcCF+rYu4/hU+fVDZoPSP7juSItgZ4WbahuFxmRPJ86rOyINda7Aa5MAkgXelhsorf3uq/rwJQEI9EGJDuBZDPvnFkqHJ+UwoF4ew5qdkc98RsmZeLa3nR8SregzccC2iHGOwbtR+oTY/LzRRp/tqQa8P7J7VzF7Tba1N0XYukvGafMHSPdABzak9dWSLXr4ykpdSb7HOBoj/S4TDReS18xA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=uw4nNchZqs0hUl6LILWnvwkTezS63JG+YIFkjLmR6us=; b=RfQBi+ice9mdQB+DKppitWjDImE4NEjHSRiFgzEdmS8S2wNXHFtPBSRDP2vGIRq1X12zT8FAolcMgKpJnhbT4AUbKF8P/Wpp0jTE4Q+qBXyL1aZOTOxlTDXoxU6qEcPvXBIjA3k7tNCi7SlqkWhUIro11mEEiOpqUp0fy4pveOSd0u5I1RnPmXJ2QHk+WPiGUxAGc4wDaysSZ/6mIUnDrBXrnyNbGS0c65J7Um+YUprpj8s7/15u6m+Acb5oOnLwo4zPqzYuKoFO6+rcJeoavvp2EAPB3B2h+X8+jyNzB1+0va4KX5xl+B/662NG13zqVePeuNtU6Sy/qGLSKd7SVw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=none; dmarc=none; dkim=none; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.onmicrosoft.com; s=selector2-citrix-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=uw4nNchZqs0hUl6LILWnvwkTezS63JG+YIFkjLmR6us=; b=Pyq2crJbO1gyE7b8aUZCFeLELQDfTohqJGg87Fs5mveVMvrg3ov4hSB5t84VlBaS78WzgMkE1kUGPMBSt/88oIHWVG2uiXhKJeIK+WOhy6HH9yga+bVIIDbCRJkdzoHzYFwkY5V2HFbHlDuzFEJs0hwSmrbARU9ywpLT6LBBU0o= From: Roger Pau Monne To: CC: Roger Pau Monne , Andrew Cooper , George Dunlap , Jan Beulich , Julien Grall , Stefano Stabellini , Wei Liu Subject: [PATCH 1/3] amd/msr: implement VIRT_SPEC_CTRL for HVM guests on top of SPEC_CTRL Date: Tue, 1 Feb 2022 17:46:49 +0100 Message-ID: <20220201164651.6369-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220201164651.6369-1-roger.pau@citrix.com> References: <20220201164651.6369-1-roger.pau@citrix.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: LNXP265CA0011.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:5e::23) To DS7PR03MB5608.namprd03.prod.outlook.com (2603:10b6:5:2c9::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 4f9f5769-2bdc-4f64-f8f7-08d9e5a283e9 X-MS-TrafficTypeDiagnostic: SN6PR03MB3565:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2399; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 49W7SwZ1Om81O+2HnO+IHf51Cm2Mr8umc5ZL3TRSz+cnCS0DTkIX0Ik8s40bGoL51H7QStq2yyBI/r5R2mxg8dYQ1cIcRBnuJ+BLLYkPhsMNYmHDWiTUzKxTsBXxS4oZ7PHxX6dTK24x17a4VGnCjJqAdLQaHr4IDxXR4idhNvyphaluARpfBO45F3lDURbttB/EFKtgb72ujvxk9BvW9wHQmR3+f7RZD211MeHS86h53T/KDtMXFJKOGMsuSqJl/SjbGyOQko79qFEjnOxDKWFVp+wWPuetSV3/TLvh2otVrFfmC829FWb/P9ieRfvQyIG1gqtpKXkJoqu/Gg5Svo9svySUyFyrUYTmFe1lMdqR9JeZVcYchur6YRcKOAm29IB/mQ6yCdIcUXVwcN12TKNMFilKRU0mVvIMeUsTWPRRRP2ONVgQE4P10DwX1MKmF+FEbNvHsli0lmWn2jr6IgiHmQZxEc7bZ/XEIy+eDDs5aB1rWtCh6KPQ0rsIgE+deyYBUIKv69NsPuSzo1C9OXu72HUh07RBPkygtfoOA8YFNaTj5xLBF4ksPqqdUKh3Yyu3FjLsM658Hgaw/FSu9tIDtT+xfDwAOPkez1MbQkMXMxXK1EOQWIRLi9GSmI6JgYi/L2U70wKS84Epkgw6jA== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DS7PR03MB5608.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(6666004)(66476007)(66946007)(8936002)(4326008)(8676002)(508600001)(5660300002)(66556008)(6486002)(38100700002)(83380400001)(6506007)(36756003)(6916009)(82960400001)(6512007)(26005)(86362001)(1076003)(186003)(2616005)(2906002)(54906003)(316002)(20210929001);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?dk9vKzRsRzJCWDNFeGpNTlZMUlF3NThzakN4ei9ocEY2Y0hicWxiRmtRdmpv?= =?utf-8?B?NnViakQ1VGdWTWplamFvRDVxS0FjQ3VkdVZ0aGR2eXllci9hc00zWlVFK1dh?= =?utf-8?B?Smg4dDc0OENWRFpZRmsreDE3VzdWcVBRNkdqQmRjYUtVNExBMEQyS2hpb1Mx?= =?utf-8?B?RzRSbEZIbkRRVU9mMnZIczRZK21oUGpmSlFORnUxNStyK0Mxa2QyYUhQY09M?= =?utf-8?B?clg5V21yTmdESllUc25kTEgvb0N1YWpPamxob3pSTzlsQTNNZXNRQ1A4R3Qx?= =?utf-8?B?bjBBM0h2WTV6czVISDVoWGR4WVYwOGRGWlZFcS80S0F0RzFBMTVzVUZGd0FN?= =?utf-8?B?SGRlZXlSQ21aTVdFMXlVOXVIalR0a25JZlhCc2NWWVV6T3VVb29EVnVJOU94?= =?utf-8?B?elVsYkVERkhhM0FFY3hhRit1ckxmT1pFNEM1UzRpSW44MVZ4bFZxUm00SFlN?= =?utf-8?B?RVFqTE9TNnd4bzhnL3hhZjZBMmJQNDlXazd0ZWNnU2dFZlFid1c5ZzJuTUtF?= =?utf-8?B?WXRJR282dTFrZDBkZEVQclF6Z2poc0IvRjkzbDZtOU9ZUmRrUzRzdTAraVN4?= =?utf-8?B?S1BTMGx5NVVkSm1xZS9oUi9xK2JvY1UvMy95VzM4aDB6MXlrNkQzRjQ5RGQr?= =?utf-8?B?dHZhYWxaSzArdjRaYW80V1lvN09LcFBjYjRqU2hwNmtXdmo1VjJzQ2JGbUxl?= =?utf-8?B?NnhJblpzQWxLV2Q1N1VXeDBLdkF0eGFLSlQ3aWRDdlg4QlZYUHd3WUszckcr?= =?utf-8?B?eURVMVVXNWJXRkpGVW93TzgwaFB0VzFFOXIyZFpkWVhDYW5KclkrU0w4NnJx?= =?utf-8?B?VVNRbnR1M0d4OGVqTGQ1aG1HN0RJaTVSUDhvai9MYmFFYU8rZGVYY041UjBa?= =?utf-8?B?ZnFTVEVtOEtnQ2ZJcjBhL05jQkh3NWtEREl2Z2FwdFZ6UFdnOWJXeTFRMDcv?= =?utf-8?B?anA3WkJtOWJuYnlPeTd5aEVzVkMreVBvSTM4NDUvMENJalRBeEVYQm5QdDlM?= =?utf-8?B?em9PaXRCSHNkTUtOWitVWm5rSHp6c3lCOFpadmxpQVpiaTJVV2Iwa0xFWUpn?= =?utf-8?B?RUE2NkQvb0hmSmZEYU51Z1ZKN1Z5SGdtTHpzRDM0TXlUeEMrRDVXdmQ5b05p?= =?utf-8?B?YXdjb2tkSy9JbEtHNUg4ZXBuNW5rZHJjMVRxNFRSUnV0Q29SZ0J2RnFqOXhi?= =?utf-8?B?WG4rdnpyQitod0FscmVKL2g1bDd0dlBFRnBqUHV0d0k0d1BVZGx6aVZDS1B5?= =?utf-8?B?MlBMWXFsYTMrdUpuU05FR2V0aWtVazJTWDhPWGlTdHlUSllheXE3bCtEaUt0?= =?utf-8?B?aUFWKy9LRHA1NWQ2Z1VSODJQN2NBb0F6Y24vR3BjTy9wN25PQjVSU3lmQXZs?= =?utf-8?B?OVFSUGhsempxS3BYRnR5VzNiOVNrNGFHZHNwWlRjTDBLTlFQdVd0enJ1K21r?= =?utf-8?B?Z3l1RkRtOVBLNnFaOHJBSm5Zc2pla1hia215a0pJdHhQNC9acWh0NlJVeFhJ?= =?utf-8?B?REc2T2FjZzZXNTZwaDhOVVBoVjhHRFZTWU1JSHJobnpINmd1Z3dOUTZ3cHdU?= =?utf-8?B?TWNkOFdKV2ExelFDaTROVWRNUTNxd1FXNXY5bjVYNGNBb2J0ZVRrZElqQndH?= =?utf-8?B?SFdNb3ZtVWpydmdRbFlhSVVQWGJKcWJIb0x2NVdGM0kvbVIwMW5oVUFsSGEw?= =?utf-8?B?T2xQaVVFdDNhc3JjdU92d0FPYVg1THVmZUJlSEkyWlkzT0d1QVdHcFdVSGhT?= =?utf-8?B?MTUwV3hOUWUvb1BpeDBSekk5T3BTRTNaem5WYVNCV0ZJSnpyNjdKN1hWOWZV?= =?utf-8?B?aDZEbkhrV0VONUZmNlZRQXBJZ05lL2crTGxMV3loMlI4aWcvZDV4WmM4SER2?= =?utf-8?B?TDlWeW1heE5vTExlcXJxVVhXWHJhTzJvWHRxcVJKNlhTR212SjFGekY1VHpN?= =?utf-8?B?UEl5M0ZKeGp2N2lHR2k3QkZlU2U0alFDQy9yUlZWeTFrcVlaUk54SE9lTEF5?= =?utf-8?B?cTZGNE5VTU0xYWNxaGNTYjM1ajUrNkdOTjhFekhrUFFwRENhSkxET3lsTE9H?= =?utf-8?B?V053aUdCRExPVWw4UFlTLzJzNXBjK244RTJnZk5JMzlJQkovZndiOEYzbmhP?= =?utf-8?B?bzFhdHcrRHZ3Q25KQk1XOHBqVHRnVjRDQzM4SjFmREpkZCtiRStYMy92aDcv?= =?utf-8?Q?uRvcOra/V2ijaG05XNRkbm0=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: 4f9f5769-2bdc-4f64-f8f7-08d9e5a283e9 X-MS-Exchange-CrossTenant-AuthSource: DS7PR03MB5608.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Feb 2022 16:47:21.1184 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: RLrJImdvFwdp/DERnpT8YRumsTXvj5u7Psmue6uFIHclhnyw/6tdtLfC8YHitURTuVhkuwd4y868rcN0QFdFRw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR03MB3565 X-OriginatorOrg: citrix.com X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1643734082635100001 Use the logic to set shadow SPEC_CTRL values in order to implement support for VIRT_SPEC_CTRL (signaled by VIRT_SSBD CPUID flag) for HVM guests. This includes using the spec_ctrl vCPU MSR variable to store the guest set value of VIRT_SPEC_CTRL.SSBD. Note that VIRT_SSBD is only set in the HVM max CPUID policy, as the default should be to expose SPEC_CTRL only and support VIRT_SPEC_CTRL for migration compatibility. Suggested-by: Andrew Cooper Signed-off-by: Roger Pau Monn=C3=A9 --- docs/misc/xen-command-line.pandoc | 5 +++-- xen/arch/x86/cpuid.c | 7 +++++++ xen/arch/x86/hvm/hvm.c | 1 + xen/arch/x86/include/asm/msr.h | 6 +++++- xen/arch/x86/msr.c | 15 +++++++++++++++ xen/arch/x86/spec_ctrl.c | 3 ++- xen/include/public/arch-x86/cpufeatureset.h | 2 +- 7 files changed, 34 insertions(+), 5 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line= .pandoc index 6b3da6ddc1..081e10f80b 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2273,8 +2273,9 @@ to use. * `pv=3D` and `hvm=3D` offer control over all suboptions for PV and HVM gu= ests respectively. * `msr-sc=3D` offers control over Xen's support for manipulating `MSR_SPEC= _CTRL` - on entry and exit. These blocks are necessary to virtualise support for - guests and if disabled, guests will be unable to use IBRS/STIBP/SSBD/etc. + and/or `MSR_VIRT_SPEC_CTRL` on entry and exit. These blocks are necessa= ry to + virtualise support for guests and if disabled, guests will be unable to = use + IBRS/STIBP/SSBD/etc. * `rsb=3D` offers control over whether to overwrite the Return Stack Buffe= r / Return Address Stack on entry to Xen. * `md-clear=3D` offers control over whether to use VERW to flush diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index e24dd283e7..29b4cfc9e6 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -543,6 +543,13 @@ static void __init calculate_hvm_max_policy(void) __clear_bit(X86_FEATURE_IBRSB, hvm_featureset); __clear_bit(X86_FEATURE_IBRS, hvm_featureset); } + else + /* + * If SPEC_CTRL is available VIRT_SPEC_CTRL can also be implemente= d as + * it's a subset of the controls exposed in SPEC_CTRL (SSBD only). + * Expose in the max policy for compatibility migration. + */ + __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); =20 /* * With VT-x, some features are only supported by Xen if dedicated diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index c4ddb8607d..3400c9299c 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -1332,6 +1332,7 @@ static const uint32_t msrs_to_send[] =3D { MSR_INTEL_MISC_FEATURES_ENABLES, MSR_IA32_BNDCFGS, MSR_IA32_XSS, + MSR_VIRT_SPEC_CTRL, MSR_AMD64_DR0_ADDRESS_MASK, MSR_AMD64_DR1_ADDRESS_MASK, MSR_AMD64_DR2_ADDRESS_MASK, diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index ce4fe51afe..98f6b79e09 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -291,6 +291,7 @@ struct vcpu_msrs { /* * 0x00000048 - MSR_SPEC_CTRL + * 0xc001011f - MSR_VIRT_SPEC_CTRL * * For PV guests, this holds the guest kernel value. It is accessed on * every entry/exit path. @@ -301,7 +302,10 @@ struct vcpu_msrs * For SVM, the guest value lives in the VMCB, and hardware saves/rest= ores * the host value automatically. However, guests run with the OR of t= he * host and guest value, which allows Xen to set protections behind the - * guest's back. + * guest's back. Use such functionality in order to implement support= for + * VIRT_SPEC_CTRL as a shadow value of SPEC_CTRL and thus store the va= lue + * of VIRT_SPEC_CTRL in this field, taking advantage of both MSRs havi= ng + * compatible layouts. * * We must clear/restore Xen's value before/after VMRUN to avoid unduly * influencing the guest. In order to support "behind the guest's bac= k" diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 4ac5b5a048..aa74cfde6c 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -381,6 +381,13 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t= *val) ? K8_HWCR_TSC_FREQ_SEL : 0; break; =20 + case MSR_VIRT_SPEC_CTRL: + if ( !cp->extd.virt_ssbd ) + goto gp_fault; + + *val =3D msrs->spec_ctrl.raw & SPEC_CTRL_SSBD; + break; + case MSR_AMD64_DE_CFG: if ( !(cp->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) goto gp_fault; @@ -666,6 +673,14 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t= val) wrmsr_tsc_aux(val); break; =20 + case MSR_VIRT_SPEC_CTRL: + if ( !cp->extd.virt_ssbd ) + goto gp_fault; + + /* Only supports SSBD bit, the rest are ignored. */ + msrs->spec_ctrl.raw =3D val & SPEC_CTRL_SSBD; + break; + case MSR_AMD64_DE_CFG: /* * OpenBSD 6.7 will panic if writing to DE_CFG triggers a #GP: diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index ee862089b7..64b154b2d3 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -395,12 +395,13 @@ static void __init print_details(enum ind_thunk thunk= , uint64_t caps) * mitigation support for guests. */ #ifdef CONFIG_HVM - printk(" Support for HVM VMs:%s%s%s%s%s\n", + printk(" Support for HVM VMs:%s%s%s%s%s%s\n", (boot_cpu_has(X86_FEATURE_SC_MSR_HVM) || boot_cpu_has(X86_FEATURE_SC_RSB_HVM) || boot_cpu_has(X86_FEATURE_MD_CLEAR) || opt_eager_fpu) ? "" : = " None", boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ? " MSR_SPEC_CTRL" : = "", + boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ? " MSR_VIRT_SPEC_CTR= L" : "", boot_cpu_has(X86_FEATURE_SC_RSB_HVM) ? " RSB" : = "", opt_eager_fpu ? " EAGER_FPU" : = "", boot_cpu_has(X86_FEATURE_MD_CLEAR) ? " MD_CLEAR" : = ""); diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/publ= ic/arch-x86/cpufeatureset.h index 957df23b65..b9ab878ec1 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -265,7 +265,7 @@ XEN_CPUFEATURE(IBRS_SAME_MODE, 8*32+19) /*S IBRS provi= des same-mode protection XEN_CPUFEATURE(NO_LMSL, 8*32+20) /*S EFER.LMSLE no longer supported= . */ XEN_CPUFEATURE(AMD_PPIN, 8*32+23) /* Protected Processor Inventory = Number */ XEN_CPUFEATURE(AMD_SSBD, 8*32+24) /*S MSR_SPEC_CTRL.SSBD available */ -XEN_CPUFEATURE(VIRT_SSBD, 8*32+25) /* MSR_VIRT_SPEC_CTRL.SSBD */ +XEN_CPUFEATURE(VIRT_SSBD, 8*32+25) /*!s MSR_VIRT_SPEC_CTRL.SSBD */ XEN_CPUFEATURE(SSB_NO, 8*32+26) /*A Hardware not vulnerable to SSB= */ XEN_CPUFEATURE(PSFD, 8*32+28) /*S MSR_SPEC_CTRL.PSFD */ =20 --=20 2.34.1 From nobody Sun May 19 07:31:52 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=citrix.com); dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=2; a=rsa-sha256; t=1643734079; cv=pass; d=zohomail.com; s=zohoarc; b=eZY8zzdS4UuluBqOSVra8l2KAZqKxhaMpbjERsEn/4HubXXYH/EbXs74rsvPaYef9EpPRnBgZAwui9Fnlsk+sXC+2+Ke84b+3fyAZFF8cLxeBO5N4/PGTpKrZjJvy+O3RV8xqTp/eSxwNewJmG0OP4IEbJTQ7DnzuE4piIuQyME= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1643734079; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=mABKGaVPSIVWoLQWeWEbnGj7m8sKHrppce4L4FKSrdE=; b=lpgrDf5kDV2hbIX39viadALuKrhBsEp8oZUV/dCi1nAVBKy2j0m1D59XwxRAi6POQpkbUs+bhUn3FxIonUpM/pmwlOgEk1pKJs2ArzuEFzq7uITwSXTGWHn6FLv6pYuC6v1SH1i3SEXc2MB1KE6EDk7N4KNnk7BS6rWwuDLaM0g= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=citrix.com); dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 16437340798321010.6825353282545; Tue, 1 Feb 2022 08:47:59 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.263670.456485 (Exim 4.92) (envelope-from ) id 1nEwJa-0001nt-Od; Tue, 01 Feb 2022 16:47:34 +0000 Received: by outflank-mailman (output) from mailman id 263670.456485; Tue, 01 Feb 2022 16:47:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nEwJa-0001n4-GA; Tue, 01 Feb 2022 16:47:34 +0000 Received: by outflank-mailman (input) for mailman id 263670; Tue, 01 Feb 2022 16:47:33 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nEwJZ-0001jp-OE for xen-devel@lists.xenproject.org; Tue, 01 Feb 2022 16:47:33 +0000 Received: from esa4.hc3370-68.iphmx.com (esa4.hc3370-68.iphmx.com [216.71.155.144]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a4a4127d-837e-11ec-8eb8-a37418f5ba1a; Tue, 01 Feb 2022 17:47:31 +0100 (CET) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a4a4127d-837e-11ec-8eb8-a37418f5ba1a DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1643734051; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=u1dO4eBn55di1Lq/HhuItdj6kXzHCzDMo02+M+HL1Is=; b=GEXyZXXpbQB8iPefXO+3Hohx1BGBte4GX2IjyACJ4HinwTOGlyQH4ESS p44xSPrteRDy7lYPCL6LgaXIgWLDzyli7EhsaBkNPP0pKK3FL5z1rdjJV pkiGwKaxgf6RLLDXYC8tAVjP0jzi2H+Yt/NeDczG/sU4X4HP4PA3CsI2D A=; Authentication-Results: esa4.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com IronPort-SDR: xKtRs4ZYUrK/c+bq0gfX4sZbj+6/mKsP0jxfg61r8htriJsrG0stG9YbJzKKN2daRSOQ6gCSBS daSKPakW4vjEqru3uM58aIqXCkexGD8QDf78v/RHLKgkOTHiPPAMw5xebrEnrapoXvLD5q46Bv wsE7cjgA4q3gIr2LOMpLEeTizhMOOHvme+a3xaL+hYG2n6lJbxCNqPtYF3bR6d9xPeG7Yb8tXi JXg2wqkBaEb3SWYsheApnuB4aCBaEYi/QMGjCYH8sougOIgFKA0WC7I84ut3rvJN5EIoChJCjv sleRlMEXzobiUdlXJ4tPaS6U X-SBRS: 5.2 X-MesageID: 65424817 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.156.83 X-Policy: $RELAYED IronPort-Data: A9a23:kXljwKJcnOEdMy9uFE+RN5IlxSXFcZb7ZxGr2PjKsXjdYENSg2QGm 2FLCz3Sb62KYWWmfdxxPIzjoRwFu5fWnNQxGgNlqX01Q3x08seUXt7xwmUcns+xwm8vaGo9s q3yv/GZdJhcokcxIn5BC5C5xZVG/fjgqoHUVaiUakideSc+EH170Ug7wrZj6mJVqYPR7z2l6 IuaT/L3YDdJ6xYsWo7Dw/vewP/HlK2aVAIw5jTSV9gS1LPtvyB94KYkDbOwNxPFrrx8RYZWc QphIIaRpQs19z91Yj+sfy2SnkciGtY+NiDW4pZatjTLbrGvaUXe345iXMfwZ3u7hB21wttR5 OcOiqahYi0FP5DLweE5dSVHRnQW0a1uoNcrIFC6uM2XiUbHb2Ht07NlC0Re0Y8wo7gtRzsUr LpBdW5LPkvra+GemdpXTsF2gcsuNo/zNZ43sXB81zDJS/0hRPgvRo2UuIMCgGdp2aiiG97vI JUwOR9maS+bPQxxORQ1Aqsfkdan0yyXnzpw9wvO+PtfD3Lo5BN1+KjgNpzSYNPibcdfk1ucp 2nG13/kGRxcP9uaoRKV/3TpiuLRkCfTXIMJCKb+5vNsmEeUxGEYFFsRT1TTnBWiohfgAZQFc RVSo3dw6/hpnKC2cjXjdyHlq16ojF0jYct7OcE71QbUz47y3xnMUwDoUQV9QNAhscY3Qxkj2 VmIg87lCFRTjVGFdZ6O3uzK9G3vYED5OUdHPHZZFlVdv7EPtalu1kqnczp1LEKiYjQZ8xnUy ivCkiUxjq57YSUjh/TipgCvb95BS/H0ou8JCuf/AzjNAuBRPtfNi2mUBb7zt6wowGGxFQHpg ZT8s5LChN3i9LnU/MB3fM0DHauy+9GOOyDGjFhkEvEJrmrxoCPzItgAvmAidS+F1/ronxezO ic/XisKvPdu0IaCN/crM+pd9ex3pUQfKTgVfq+NNYcfCnSAXASG4DtvdSatM5PFyyARfVUEE c7DK66EVC9CYYw+lWbeb7pDjdcDm35vrUuOFcGT50n2itK2OS/KIYrpxXPTNIjVGove/lWMm zueXuPXoyhivBrWOXiKqNNDcAxRcBDWx/ne8qRqSwJKGSI/cEkJAP7N27IxPYtjmqVejODT+ X+hHERfzTLCabfvcG1ms1hvN+HiW4hRt3U+MXB+NFqkwSF7M42u8L0eZ908erx+rL5vyvt9T v8kfcScA6sQFmSbqmpFNZSt/pZ/cBmLhB6VO3b3ajYIYJM9FRfC/cXpf1Wz+XBWXDa3r8Y3v 5apyhjfHcgYXw1nAcuPMKCvwlq9sGIzguV3W0eUcNBfdF+1qNphKjDrj+9xKMYJcE2Ryjyf3 geQIBEZueiS/NNlrIiX3fiJ9t77HfF/E0xWG3jgwYy3bSSKrHC+xYJgUfqTeWyPXm3D56j/N /5eyOvxMaNbkQ8S4ZZ8Cbti0Yk3+8Dr++1B1g1hEXjGMwarB7dnLiXU1MVDrPQQlLpQuA/wU UOT4NhKf76OPZq9QlIWIQMkaMWF1O0VxWaOvahkfh2i6X8l5qeDXGVTIwKI2X5UI7ZCOY84x fss5ZwN4Aulhxt2atuLg0i4LYhXwqDsh0n/iqwnPQ== IronPort-HdrOrdr: A9a23:tUIRvKBdTNCFMs/lHeg0sceALOsnbusQ8zAXPh9KJiC9I/b1qy nxppkmPH/P6Qr4WBkb6LS90c67MA/hHP9OkPQs1NKZMjUO11HYSr2KgbGSoQEIXheOjdK1tp 0QApSWaueAdGSS5PySiGLTc6dC/DDEytHTuQ639QYScegAUdAG0+4WMHf/LqUgLzM2eqbRWa DsrfZvln6FQzA6f867Dn4KU6zqoMDKrovvZVojCwQ84AeDoDu04PqieiLokys2Yndq+/MP4G LFmwv26uGKtOy68AbV0yv2445NkNXs59NfDIini9QTKB/rlgG0Db4REYGqjXQQmqWC+VwqmN 7Dr1MJONly0WrYeiWPrR7ky2DboUATwk6n7WXdrWrooMT/Sj5/IdFGn5hlfhzQ7FdllM1g0Y pQtljp+aZ/PFflpmDQ9tLIXxZlmg6funw5i9MeiHRZTM83dKJRl4oC50lYea1wUx4S0LpXUN WGMfusp8q/KTihHjLkVyhUsZCRt00Ib1a7qhNogL3R79BU9EoJuHfwivZv2kvoz6hNOKWs0d 60RpiApIs+PvP+UpgNdtvpOfHHclAlYSi8eV56cm6XXJ3uBRr22uvKCfMOlaaXRKA= X-IronPort-AV: E=Sophos;i="5.88,334,1635220800"; d="scan'208";a="65424817" ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=AMeEUCwpWK9VZ+B236nOArdUl6nrYP3ltdqTTEANMOqmH3W2cz8m5NmawTyNyyEmVUxSPFe5iKcAW0CAq82BPD4dnj1VqQlPhr8kwDEEM3/gBbcs8Rtd+Vs9+WrwOlrdKot9zGNpmNiSZX3ghx/0AePs0h4MlL4QciIrCRs/kPcKvHcM2XEqKooRoD4obgnwZtG35HFp6DpT9GbXDEPUzNeQaKEAvnY+HiRHresAkVaZV36SbMmUw4jbcH+J3bwbxzkt8UqTIhRgA0vjkrMxB2Is5ME37JegfYHvy6nJMyCxf3hv+idWRtgjBmsoYIMkx0duWJK39ybp9bPWohtJ8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=mABKGaVPSIVWoLQWeWEbnGj7m8sKHrppce4L4FKSrdE=; b=Gjx12Yj5rG9iIf5XFm39PgaUQ+Rd3WwFX+p173qM4sAl6obYeutKggPc/WY5CgjShYcuV8tPpZNSZbfuCIoV2YftQY1Bq176TyD7b4ozIDL+oie4LXCWVIewk0cU0ta3T2xvV17latpYBctM4t1yNjqkwSm8p/9pyGKy9wdCU9s0DZGZaWqgs9xoLGuJWUsKd8h6oeTvkxDbgIrn2kqo4NUs6njgDnjAJY91HPk0Z3Dam0Q0FEyIcv2ACPGpuZroKJivoOlpBver4lsR9QFTpjbzwP8eNIyVWxMsTenAOX3BAiLBiUgBsPm89uRzbvRdUdY7YdDLi5ASWvMsibia1w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=none; dmarc=none; dkim=none; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.onmicrosoft.com; s=selector2-citrix-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=mABKGaVPSIVWoLQWeWEbnGj7m8sKHrppce4L4FKSrdE=; b=cikYRLEVNyli3+/4ITSeTXLE3jQlvS41VI90NwUEgo0hNd7YGIxcdCuNzKIKcQ7YV1jRJp6idsVVECTytIsBTeHTbL0BlTP0LRiZRN7VqC2ybI9GFeDgZIAHpbJNnCc4IFJl518nTI0aUc0PC6D62uhg/wVJFK81urxGXVhuC8U= From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu Subject: [PATCH 2/3] amd/msr: allow passthrough of VIRT_SPEC_CTRL for HVM guests Date: Tue, 1 Feb 2022 17:46:50 +0100 Message-ID: <20220201164651.6369-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220201164651.6369-1-roger.pau@citrix.com> References: <20220201164651.6369-1-roger.pau@citrix.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: LO4P123CA0355.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:18d::18) To DS7PR03MB5608.namprd03.prod.outlook.com (2603:10b6:5:2c9::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e7ac55c3-fec0-4875-3fba-08d9e5a286a2 X-MS-TrafficTypeDiagnostic: SN6PR03MB3565:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: m0MAStdqIH/um8T17wRymbIvjhBnUCGbQCBc5UeUSTCMgfe9xKO12r8QI0euI4n1gRz1+43HGEUEFSmRyycoL1crX9UckgU7mAqH8cyg6cTymZJTBTAGhO14JQjZK4J68qtIkyHTH0C5xwTj/jt4FfL708z3SFDNY1Kkt19ApfWva1qBnrV8bEfYCV7GOrtNZZh0u485XkR3c2cd9TmImjcJVV7WLTAnTsdwgYU0IDzLhQf75iUSFNkkYymGJAlX402crOuXlbkLd2QtTLLKgCLYIwAsbKQRYPtN6HXmb9WhFhB54kyAfNaRKLjgVQzR0e+wzsgxA8vXw3SpACf0VPY/SpMintOe0XvA5mCdwaLv5N34v8Wx5eCOr7u4Dd2tIVxTkEJIV+xOZ0Z9e2KVxMnoV3okOWNgAwyaClSFmWJWRCIB4kKvXH1UMBNLrwRCph1X09qJVUDnnconDZS+JtNxU1r3yo7Khh6hLHnsa0jVWutVx3RwZReo+u7h1EQNejOq7YBr60whmpDrxcyEjQ6odg9owcQkp/VJJ5QGxCELAd/qezHVC8Buis8lT4SmEYFTmHdFoRPN9oEhQ8p2Lu57ZxHsbcxqvDywRzEONbY4ZZEOM4E5HEi2lCTGdzerA0O9gPYMiZfxZJyiiTxzqw== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DS7PR03MB5608.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(6666004)(66476007)(66946007)(8936002)(4326008)(8676002)(508600001)(5660300002)(66556008)(6486002)(38100700002)(83380400001)(6506007)(36756003)(6916009)(82960400001)(6512007)(26005)(86362001)(1076003)(186003)(2616005)(2906002)(54906003)(316002)(20210929001);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?ZWNpb290d3dSamR6WCtOZFExazhpZFgwTnVjZXBKWjZ1VlltS3A1YThSa0lv?= =?utf-8?B?K2pFWmNxcGhPbTVrRnk4TkRzNG9tYTZlaytsMkRJQVhWQW5DdCtCZVErUGR0?= =?utf-8?B?MkhHcjI5VUg1ZEgxajliU2VHOVJrUXJ1L2tJV0FaNnp1SU5hREt4L25zTTl6?= =?utf-8?B?aEs1WkRLSEpDSWl6S2I0WkF5OW13ZG1iMVNaVjdXc2dDNU1WbTE1dzd1Rm9Z?= =?utf-8?B?M1RXZ2drRGo0NlZ4ZUlPcHcwVGU5ZUVFNGxsV3JzNGd4UGFwYWRNV01JL1Rj?= =?utf-8?B?eU00ZVMrWTVTU0w3c2NFb1FZS0JlcklhZHVFak1XRDZTOTRhdlEzS3RRcEpQ?= =?utf-8?B?RjROOHZmcHFpOFR5Q2FML2lpU0VsSmZSRVNVdjJDdFhFWEFERTNGc0srNFpH?= =?utf-8?B?d2g0am5OM3cvYVBGMGEvZ2J6QUlaN2JjSUJ0L3Y2VmNRYUhDblhrdlpjL2lk?= =?utf-8?B?aVJBWk5ucG0xZW1aSENJVDFyR3MrNzd0Z05MSi8xU1RLVThWZW9qZWl2R1lu?= =?utf-8?B?ZkxwNnFpTzBkUWRBTndjODI3cmNzVlV6MmJDVWFUUVRobEM2VDZMdk1ENzNE?= =?utf-8?B?d2pVbXN5cHp1cW9CV3FFNU9tT0EwMHBVZTVIWm11bHg5Q1ZQQ09RQnE4V0JE?= =?utf-8?B?MDh3dkc2Yy9DcXNsNE55Z2VrcVlkT3VJc0tmZ2V2TkkxYlUxV1R6MmJCNjg0?= =?utf-8?B?dkZpSEc0ZzhZZ0t5NGNoejI3YlNUWVlqYnd0Z0dvK05wbWFFY0hwOUN4bkZ0?= =?utf-8?B?V3gvcEJNSlcyZFUzRFFzQnlCQTNhSEVpd3RiWDRsN3VjOENrdUdZNWZRNzRK?= =?utf-8?B?aVExdmppc2RWZXFScVpnWWxvbjdjbXo1Y3J3aU16N2ZOTGdKQm1DckxQQTVP?= =?utf-8?B?RnFGUkc0bFZ4TENqWmwranpWUy9FVitGeTZSU0R6SE1OeUZLNmJEOGQ5aUNQ?= =?utf-8?B?N1RoaUpXbTZpcVZGY3dreXNDVGdvcnZmS1I2cnR5cEhIR0J5eFdVRVp0M2Zt?= =?utf-8?B?VjdoRGdIdXYvR1g3czlqeWVkRlRWOTk0U1FaNnpUZ2lKZjdJbUQ0U1pmZTBJ?= =?utf-8?B?Vyt5aXFaSC8zVHptTXFsbmIwYzYzRjZHdmR1U2VIRk0vaWdJZDY5RmVEbXB3?= =?utf-8?B?b0xSNDZwVnJCZTNzSE45eHF1REYrSmZwQVl2dVdFK1FQQTE4M1F1UmNiSWFH?= =?utf-8?B?eDlrLyt1TzFqTUxKZ3RGS2p3Zm5DWUkwZHhOczNsNGs0aUhybDdDTjVEU0tX?= =?utf-8?B?dDJoTWFCZkNPbVMzUzJwNEViZERvQWplQmtnU1VBMmZWdnpFNzNobExLbGxQ?= =?utf-8?B?WGJjaDJHTUk4VEFVc2xhWFB6VW5heEh2dHpMdnhRZndPei95VWR1Yyt5ajZ6?= =?utf-8?B?bmpmU0dQN1ZYeE1hRmVUUWJlcUp5QzVnTVU2UU03VDhYUk1ZNi9LYk9GQXE4?= =?utf-8?B?VWZOZFQvL2g4MUdDQXZ0TVRNL05yOFF3K0JwMjhRbUhvdXRzMmRVaDRNTTZZ?= =?utf-8?B?NUErc3RrUHBEUVJFazlWQ1F1TjhZY2V5UFloZS90QnU3MlFlL2VWWlRxSXp2?= =?utf-8?B?ZmRCMERUTHlKa1VnTVVVK2ViNGdTMmxwTVV3dlNYbVZCSFRBaHZvRG5yY3Mw?= =?utf-8?B?SGVvUVRTMDAwcE9xT1RCKzJnNUdxd21pR1dyUUtRM0E1YS9yczZmUFpONzgv?= =?utf-8?B?WDdPQ0ZFSE91Qkg3UE82OW1HaWYvSENZOHJoTWpXSU9VV3J5V0t5NjZRbmhD?= =?utf-8?B?dUxZbkhibm8xTzdDS2MrYVkzN3ZvdkpjNi81N1kzTUVDVERhcWw1c05SYjdJ?= =?utf-8?B?NU9yNThlTjNPZWoxdmY0VzQyU0ZjQTY5M05CRy8reU5FL2cwZFhhd0tJanJo?= =?utf-8?B?MHZ1cUZoUDltbjQzRXgvRHdqQ3lsMU5vUGNrZVY3dURWY0JxK3M5enFFdy9t?= =?utf-8?B?YTIvNWJJTnRPbDFPZlZzNkpURkVVbVliNW16ajVjdCtJWVRobGhMdnNYMXVN?= =?utf-8?B?T0U1aXlPVnlMQ1ViL05TVU84ejdNbDE3aHlqOEkvL3gvTEwzanhYUTZlT2gv?= =?utf-8?B?UlhKR0orT0JmOG15QVc1NmVBUDhna0VBTnhueTd3ZzBhbDhGaDEyS2E1ZXFJ?= =?utf-8?B?ZUxta0NTU3JzNU5IY1BYOXJjdEJXVnF5SENHdHRZM2FJZmp6Sm1vQ3FqMHFL?= =?utf-8?Q?Mvwp8eqG09doXyJm4/ieH5k=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: e7ac55c3-fec0-4875-3fba-08d9e5a286a2 X-MS-Exchange-CrossTenant-AuthSource: DS7PR03MB5608.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Feb 2022 16:47:25.7284 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: UC8rz0vPzWgSc1o/xPRDe7TcCIOcUnvYgnBRPbkR/H2G2EIpp+Ggt2DI1OX1EI3Am+MPShsxS4XON875wPT7Gw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR03MB3565 X-OriginatorOrg: citrix.com X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1643734082749100003 Allow HVM guests untrapped access to MSR_VIRT_SPEC_CTRL if the hardware has support for it. This requires adding logic in the vm{entry,exit} paths for SVM in order to context switch between the hypervisor value and the guest one. The added handlers for context switch will also be used for the legacy SSBD support. Note that the implementation relies on storing the guest value in the spec_ctrl MSR per-vCPU variable, as the usage of VIRT_SPEC_CTRL precludes the usage of SPEC_CTRL. Also store the current and hypervisor states of VIRT_SPEC_CTRL in the per-pCPU spec_ctrl fields at cpu_info in order to properly context switch the values between Xen and HVM guests. Suggested-by: Andrew Cooper Signed-off-by: Roger Pau Monn=C3=A9 --- xen/arch/x86/cpu/amd.c | 7 +++- xen/arch/x86/cpuid.c | 11 ++++++ xen/arch/x86/hvm/svm/entry.S | 8 +++- xen/arch/x86/hvm/svm/svm.c | 55 ++++++++++++++++++++++++++ xen/arch/x86/include/asm/cpufeatures.h | 1 + xen/arch/x86/spec_ctrl.c | 8 +++- 6 files changed, 86 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index a8e37dbb1f..c3fcc0e558 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -687,6 +687,7 @@ void amd_init_lfence(struct cpuinfo_x86 *c) */ void amd_init_ssbd(const struct cpuinfo_x86 *c) { + struct cpu_info *info =3D get_cpu_info(); int bit =3D -1; =20 if (cpu_has_ssb_no) @@ -699,7 +700,7 @@ void amd_init_ssbd(const struct cpuinfo_x86 *c) =20 if (cpu_has_virt_ssbd) { wrmsrl(MSR_VIRT_SPEC_CTRL, opt_ssbd ? SPEC_CTRL_SSBD : 0); - return; + goto out; } =20 switch (c->x86) { @@ -729,6 +730,10 @@ void amd_init_ssbd(const struct cpuinfo_x86 *c) =20 if (bit < 0) printk_once(XENLOG_ERR "No SSBD controls available\n"); + + out: + info->last_spec_ctrl =3D info->xen_spec_ctrl =3D opt_ssbd ? SPEC_CTRL_SSBD + : 0; } =20 void __init detect_zen2_null_seg_behaviour(void) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 29b4cfc9e6..7b10fbf12f 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -551,6 +551,9 @@ static void __init calculate_hvm_max_policy(void) */ __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); =20 + if ( boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) ) + __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); + /* * With VT-x, some features are only supported by Xen if dedicated * hardware support is also available. @@ -590,6 +593,14 @@ static void __init calculate_hvm_def_policy(void) guest_common_feature_adjustments(hvm_featureset); guest_common_default_feature_adjustments(hvm_featureset); =20 + /* + * Only expose VIRT_SPEC_CTRL support by default if SPEC_CTRL is not + * supported. + */ + if ( boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) && + !boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ) + __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset); + sanitise_featureset(hvm_featureset); cpuid_featureset_to_policy(hvm_featureset, p); recalculate_xstate(p); diff --git a/xen/arch/x86/hvm/svm/entry.S b/xen/arch/x86/hvm/svm/entry.S index 4ae55a2ef6..2a0c41625b 100644 --- a/xen/arch/x86/hvm/svm/entry.S +++ b/xen/arch/x86/hvm/svm/entry.S @@ -71,7 +71,9 @@ __UNLIKELY_END(nsvm_hap) mov %al, CPUINFO_last_spec_ctrl(%rsp) 1: /* No Spectre v1 concerns. Execution will hit VMRUN imminentl= y. */ .endm - ALTERNATIVE "", svm_vmentry_spec_ctrl, X86_FEATURE_SC_MSR_HVM + ALTERNATIVE_2 "", STR(call vmentry_virt_spec_ctrl), \ + X86_FEATURE_VIRT_SC_MSR_HVM, \ + svm_vmentry_spec_ctrl, X86_FEATURE_SC_MSR_HVM =20 pop %r15 pop %r14 @@ -111,7 +113,9 @@ __UNLIKELY_END(nsvm_hap) wrmsr mov %al, CPUINFO_last_spec_ctrl(%rsp) .endm - ALTERNATIVE "", svm_vmexit_spec_ctrl, X86_FEATURE_SC_MSR_HVM + ALTERNATIVE_2 "", STR(call vmexit_virt_spec_ctrl), \ + X86_FEATURE_VIRT_SC_MSR_HVM, \ + svm_vmexit_spec_ctrl, X86_FEATURE_SC_MSR_HVM /* WARNING! `ret`, `call *`, `jmp *` not safe before this point. */ =20 stgi diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index c4ce3f75ab..56c7b30b32 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -610,6 +610,14 @@ static void svm_cpuid_policy_changed(struct vcpu *v) svm_intercept_msr(v, MSR_SPEC_CTRL, cp->extd.ibrs ? MSR_INTERCEPT_NONE : MSR_INTERCEPT_R= W); =20 + /* + * Give access to MSR_VIRT_SPEC_CTRL if the guest has been told about = it + * and the hardware implements it. + */ + svm_intercept_msr(v, MSR_VIRT_SPEC_CTRL, + cp->extd.virt_ssbd && cpu_has_virt_ssbd ? + MSR_INTERCEPT_NONE : MSR_INTERCEPT_RW); + /* Give access to MSR_PRED_CMD if the guest has been told about it. */ svm_intercept_msr(v, MSR_PRED_CMD, cp->extd.ibpb ? MSR_INTERCEPT_NONE : MSR_INTERCEPT_R= W); @@ -3099,6 +3107,53 @@ void svm_vmexit_handler(struct cpu_user_regs *regs) vmcb_set_vintr(vmcb, intr); } =20 +/* Called with GIF=3D0. */ +void vmexit_virt_spec_ctrl(void) +{ + struct cpu_info *info =3D get_cpu_info(); + unsigned int val =3D info->xen_spec_ctrl; + + /* + * On AMD we will never use MSR_SPEC_CTRL together with MSR_VIRT_SPEC_= CTRL + * or any legacy way of setting SSBD, so reuse the spec_ctrl fields in + * cpu_info for context switching the other means of setting SSBD. + */ + ASSERT(!boot_cpu_has(X86_FEATURE_SC_MSR_HVM)); + if ( cpu_has_virt_ssbd ) + { + unsigned int lo, hi; + struct vcpu *curr =3D current; + + /* + * Need to read from the hardware because VIRT_SPEC_CTRL is not co= ntext + * switched by the hardware, and we allow the guest untrapped acce= ss to + * the register. + */ + rdmsr(MSR_VIRT_SPEC_CTRL, lo, hi); + if ( val !=3D lo ) + wrmsr(MSR_VIRT_SPEC_CTRL, val, 0); + curr->arch.msrs->spec_ctrl.raw =3D lo; + info->last_spec_ctrl =3D val; + } +} + +/* Called with GIF=3D0. */ +void vmentry_virt_spec_ctrl(void) +{ + struct cpu_info *info =3D get_cpu_info(); + const struct vcpu *curr =3D current; + unsigned int val =3D curr->arch.msrs->spec_ctrl.raw; + + ASSERT(!boot_cpu_has(X86_FEATURE_SC_MSR_HVM)); + if ( val !=3D info->last_spec_ctrl ) + { + wrmsr(MSR_VIRT_SPEC_CTRL, val, 0); + info->last_spec_ctrl =3D val; + } + + /* No Spectre v1 concerns. Execution is going to hit VMRUN imminently= . */ +} + /* * Local variables: * mode: C diff --git a/xen/arch/x86/include/asm/cpufeatures.h b/xen/arch/x86/include/= asm/cpufeatures.h index b10154fc44..a2c37bfdd4 100644 --- a/xen/arch/x86/include/asm/cpufeatures.h +++ b/xen/arch/x86/include/asm/cpufeatures.h @@ -39,6 +39,7 @@ XEN_CPUFEATURE(SC_VERW_PV, X86_SYNTH(23)) /* VERW = used by Xen for PV */ XEN_CPUFEATURE(SC_VERW_HVM, X86_SYNTH(24)) /* VERW used by Xen for H= VM */ XEN_CPUFEATURE(SC_VERW_IDLE, X86_SYNTH(25)) /* VERW used by Xen for i= dle */ XEN_CPUFEATURE(XEN_SHSTK, X86_SYNTH(26)) /* Xen uses CET Shadow St= acks */ +XEN_CPUFEATURE(VIRT_SC_MSR_HVM, X86_SYNTH(27)) /* MSR_VIRT_SPEC_CTRL exp= osed to HVM */ =20 /* Bug words follow the synthetic words. */ #define X86_NR_BUG 1 diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 64b154b2d3..2c46e1485f 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -399,9 +399,12 @@ static void __init print_details(enum ind_thunk thunk,= uint64_t caps) (boot_cpu_has(X86_FEATURE_SC_MSR_HVM) || boot_cpu_has(X86_FEATURE_SC_RSB_HVM) || boot_cpu_has(X86_FEATURE_MD_CLEAR) || + boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) || opt_eager_fpu) ? "" : = " None", boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ? " MSR_SPEC_CTRL" : = "", - boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ? " MSR_VIRT_SPEC_CTR= L" : "", + (boot_cpu_has(X86_FEATURE_SC_MSR_HVM) || + boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM)) ? " MSR_VIRT_SPEC_C= TRL" + : "", boot_cpu_has(X86_FEATURE_SC_RSB_HVM) ? " RSB" : = "", opt_eager_fpu ? " EAGER_FPU" : = "", boot_cpu_has(X86_FEATURE_MD_CLEAR) ? " MD_CLEAR" : = ""); @@ -1053,6 +1056,9 @@ void __init init_speculation_mitigations(void) setup_force_cpu_cap(X86_FEATURE_SC_MSR_HVM); } =20 + if ( opt_msr_sc_hvm && cpu_has_virt_ssbd ) + setup_force_cpu_cap(X86_FEATURE_VIRT_SC_MSR_HVM); + /* If we have IBRS available, see whether we should use it. */ if ( has_spec_ctrl && ibrs ) default_xen_spec_ctrl |=3D SPEC_CTRL_IBRS; --=20 2.34.1 From nobody Sun May 19 07:31:52 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=citrix.com); dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=2; a=rsa-sha256; t=1643734082; cv=pass; d=zohomail.com; s=zohoarc; b=evVBKljIvuDOkZdK8t1MbGLkh/iLCwyA9lklr9pP6qtQELuQD54QCl/iDHIfLjxLHgVu5PX+LgdCFFx0WDTZjXej4CPOLtdz+oDg5i+ZolgwYoQXYxqAsz2d7Thu5ja3mbEksCBC60aBEPRjWD8AVLfIWZKzErC50Xf8imIcLBY= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1643734082; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=JC4rmfq1r30JXFzxESWwLWKQBwXbmOrlpdWDDTn7Q+8=; b=AXbE04paZxMt90XvjTxJvpMvghIqlF0v9VnjnhC7VOrwCy/9wOpa7vVSaj42ZrjSM+S2qSRUnhJsZaQLY3hdrIO39u17B1hxMIKFAV9v1DOQpBmMCyX1uJ7gweuawXIgOLNCvQ5PXnqbOu9eu4USMVlWzrbRWUnkzfMWoBxVB38= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=citrix.com); dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1643734082424222.1261699962099; Tue, 1 Feb 2022 08:48:02 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.263671.456500 (Exim 4.92) (envelope-from ) id 1nEwJf-0002I0-65; Tue, 01 Feb 2022 16:47:39 +0000 Received: by outflank-mailman (output) from mailman id 263671.456500; Tue, 01 Feb 2022 16:47:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nEwJf-0002Hj-1p; Tue, 01 Feb 2022 16:47:39 +0000 Received: by outflank-mailman (input) for mailman id 263671; Tue, 01 Feb 2022 16:47:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nEwJd-0001jp-IN for xen-devel@lists.xenproject.org; Tue, 01 Feb 2022 16:47:37 +0000 Received: from esa5.hc3370-68.iphmx.com (esa5.hc3370-68.iphmx.com [216.71.155.168]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a7aa6c46-837e-11ec-8eb8-a37418f5ba1a; Tue, 01 Feb 2022 17:47:36 +0100 (CET) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a7aa6c46-837e-11ec-8eb8-a37418f5ba1a DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1643734055; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=Ndn4INHz/j60oQaRgENB/5AM+vR9HliHOz/hdLMStQ4=; b=KZQUOFTTP/1XhdDnAv4QuuzJB80UU1uuajjkhwAAcxyJvEk65J+/DOGJ 8/XM+Dtq5sOovdrnBwLmBhUcwUno2hQF5NLsz77ZhmvSe0U/3qoAUxELR k95YQ5lBWBvKcU6qyLRsYrgq+tW3jmSK/TvEGcQUPbJS3XBnZtJRzd9nH w=; Authentication-Results: esa5.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com IronPort-SDR: /5cyDcjvk/BU1jS0MzZfgzwQPVeZa6+rXcThtrut3f3lM+ojCXJEUwOKUTfv4gyCZ74TwB6GS1 lvJkItYeVTYR0cyhC/qBK1B68gA6Vy0jHoyn9TcfQaMhL4LkGuTMHEW2zcs+9s2GgpI3pSRNLj SQYtLdRrwsFuiVY8swrkiBru6e3M2uSyiws8yVaMonr/NrqNPWMu+rt2Z2X0lfB5EO1L/wq7oK CN+mkkF3FbINfLZkYyrqIpjaldJYMYJ+/92nlZvE0RDrZGL05klYQHSpTcqHaujDeDzoonsatb FlooQjbpx+go3uRFfDZD5L3x X-SBRS: 5.2 X-MesageID: 62702189 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.156.83 X-Policy: $RELAYED IronPort-Data: A9a23:sxnmYahnUh0qQGnEz9ifqXMAX161hhcKZh0ujC45NGQN5FlHY01je htvCG7XM6qLM2WgKI12bIrl/EoO6pTdxt9nS1FtqXpkFn8b9cadCdqndUqhZCn6wu8v7a5EA 2fyTvGacajYm1eF/k/F3oAMKRCQ7InQLlbGILes1htZGEk0GE/NtTo5w7Rj2tQw2IDja++wk YiaT/P3aQfNNwFcagr424rbwP+4lK2v0N+wlgVWicFj5DcypVFMZH4sDfjZw0/DaptVBoaHq 9Prl9lVyI97EyAFUbtJmp6jGqEDryW70QKm0hK6UID66vROS7BbPg/W+5PwZG8O4whlkeydx /1u7pqIdzsrfZfhhe0cURlXDih5EIhZreqvzXiX6aR/zmXDenrohf5vEFs3LcsT/eMf7WNmr KJCbmpXN1ba2rzwkOnTpupE36zPKOHxO4wSoDd4xCzxBvc6W5HTBa7N4Le02R9u3J8WR6+ON qL1bxI0SBjQeUdREG0TBagbstuLmnejKztx/Qf9Sa0fvDGIkV0ZPKLWGMXRUsyHQ4NShEnwj mDM8nn9AxoaHMeC0jfD+XWp7sffkCW+VI8MGbmQ8v9xnEbV1mEVEAcRV1awvb++kEHWZj5EA xVKoGx09/F0rRH1CImmN/GlnJKalj1HXeJuL+950iyQw6vW4wmED28payEUPbTKq/QKbTAt0 1aImfbgCjpurKCZRBqhy1uEkd+hEXNLdDFfPEfoWSNAuoC++99r0nojW/4+SPbdszHjJd3nL 9lmRgAajq5bs8ME3r7TEbvv02P1/cihouLYC2zqsoOZAuFROdTNi2+AswGzARN8wGCxFAPpU J8swJD20Qz2JcvR/BFhuc1UdF1T296LMSfHnXlkFIQ7+jKm9haLJN4Mu2wuex85bJdYKFcFh XM/XysLvve/21PxNcdKj3+ZUZx2ncAM6/y4PhwrUja+SscoL1LWlM2fTUWRw3rsgCARfVIXY v+mnTKXJS9CU8xPlWPuL89EiOND7n1gmQv7GM6qpzz6gev2TCPEEt8tbQrRBt3VGYvZ+m05B f4FaZvTo/ieOcWjChTqHXk7dgFXdCVrWMyt9qS6tIere2JbJY3oMNeIqZsJcI15haVF0ODO+ 3C2QEhDz1Tjw3bALG23hrpLMdsDhL5z8iA2OzICJ1Gt1yRxaIqj9v5HJZA2YaMm5KpoyvstF 6sJfMCJA/JuTDXb+mtCMcmh/dI6LBn71xiTOyeFYSQke8IyTQL+5dK5LBDk8zMDD3TruJJm8 aGgzA7SXbEKWx9mUJTNcPuqwl7o5Sodlet+UlHmON5WfEmwooFmJzao1q08It0WKAWFzTyfj l7EDRAdrOjLgok07NiW2vzU89b3S7NzRxMIEXPa4LC6MTjh0lCimYIQAvyVeT39VX/v/Pnwb +ti0PyhYuYMm0xHstQgHu8zn74+/dbmu5RT0h9gQCfQd12uB75tfiuG0M1IuvEfz7NVo1LrC EeG+90cMrSVIsL1VlUWIVN9POiE0PgVnBjU7Og0fxqmtHMmouLfXBUAJQSIhQxcMKBxYdEsz uoWscIL7xCy10gxOdGcgyEIr2mBIxTsiUn8Wk321GMztjcW9w== IronPort-HdrOrdr: A9a23:S1hepKMgQnbcb8BcT1v155DYdb4zR+YMi2TDiHoedfUFSKOlfp 6V8MjztSWVtN4QMEtQ/uxoX5PwPk80lKQFnbX5WI3CYOCIghrQEGgP1/qG/9SkIVyFygc/79 YRT0EdMqyJMbESt6+Ti2PUYrVQouVvsprY+Ns2p00dPD2CAJsQiTuRZDzrdnGfE2J9dOQE/d enl4B6jgvlXU5SQtWwB3EDUeSGj9rXlKj+aRpDIxI88gGBgR6h9ba/SnGjr1sjegIK5Y1n3X nOkgT/6Knmm/anyiXE32uWy5hNgtPuxvZKGcTJoMkILTfHjBquee1aKvC/lQFwhNvqxEchkd HKrRtlF8Nv60nJdmXwmhfp0xmI6kdm11bSjXujxVfzq83wQzw3T+Bbg5hCTxff4008+Plhza NixQuixttqJCKFuB64y8nDVhlsmEbxi2Eli/Qvg3tWVpZbQKNNrLYY4FheHP47bWzHAbgcYa pT5fznlbRrmQvwVQGdgoAv+q3iYp0LJGbHfqBY0fbllwS/nxhCvj0lLYIk7zA9HakGOut5Dt L/Q9NVfYF1P7wrhJ1GdZI8qLOMexfwqDL3QSqvyAfcZeo600ykke+C3Fxy3pDtRKA1 X-IronPort-AV: E=Sophos;i="5.88,334,1635220800"; d="scan'208";a="62702189" ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Xs+L6wDrAU8jRN9wpbAsyg6gCLa5W4hsQPIRVmxr62jqPLA1mwL3jXZC06zqcBbTGHp7LwDtXQ1vQZN7zwrcfkZXU2FroDA6R5qkwuFTDo3ZDj7cgzARaLMmMVfodPo2W6wty9nqC55JcZV81KxB3of+Afsi5MPBLIb/hF/oPSx29u7M80AkkEeM1xOwmd+nbkcFwEpiAULNT0yFeVQBEg62Gel08HRQnRRNMycd4dBOIHDVuqqOPmEEfky++nA2HYae8zD8LvO8vR1m02nXD9gVOiJZVev0wIhAM5iMwPFKuJBAusvVwUwgcR/AX9X2vDNk35KdZnkPaFMQP71r6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=JC4rmfq1r30JXFzxESWwLWKQBwXbmOrlpdWDDTn7Q+8=; b=KBAp61nLAzgw1Za5y9rXW0hAwBQgoNDEMUn1Y5kh89d0cbLXVRuYftl8EBJyHGBAN7Nk4+DEpv0a2fdhjJvqJtk03Q/Yieu1TSBYQWwM+3N+MOBnxa3u4YwCrl8xlrbQLjG6IKSPsxblFuhf5a/FV034irgfA6jdeKJAVfbFZDdWpGnBDIp2kyGfui7jx/E8QI0NGsG6IlLM6H+6GL20qs7Tn/Zl+REIHvQbPgmTa/K9L0ftUhRxb5ZTiLPw50jEk+qVvRNYYzdy4e7Pw0292pj8QJZqplBdIGiAOQ4pCSpT2LD+1S3BkAxipza8YXdtySQZCIwf82KFCvwjqtAmvA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=none; dmarc=none; dkim=none; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.onmicrosoft.com; s=selector2-citrix-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=JC4rmfq1r30JXFzxESWwLWKQBwXbmOrlpdWDDTn7Q+8=; b=Qvdb8ZJgeF7Vcq18zm+JxnbaRY0k24uifZtM9fP9SKRgiDdDpXwZ5f0EbyB5mAnnDl/vBEEZg2bspKQF6vrSKQFOTJDuZBRoSpCFVQtUrCwgXW1F+6Lc9HllkhvzyeL8ov5a0dsNE+qJnV0X1eQflXB84M3LUT/QhYc0kFJy8Es= From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu Subject: [PATCH 3/3] amd/msr: implement VIRT_SPEC_CTRL for HVM guests using legacy SSBD Date: Tue, 1 Feb 2022 17:46:51 +0100 Message-ID: <20220201164651.6369-4-roger.pau@citrix.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220201164651.6369-1-roger.pau@citrix.com> References: <20220201164651.6369-1-roger.pau@citrix.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: LO2P265CA0148.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:9::16) To DS7PR03MB5608.namprd03.prod.outlook.com (2603:10b6:5:2c9::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1ff70a3a-04bb-48fc-3225-08d9e5a28975 X-MS-TrafficTypeDiagnostic: SN6PR03MB3565:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: BDUjierzUPpuH0nriDbC8i6BpNMS/Rmhzcv9ljNiQXJuJppk4ehTbeONVCXbip3y2T/lrsKJbBIadufywKwglFb9AoHCdzn0SjTEo8tJEZvN3kHGf1ocOrKY7OATngtLYnkWnsUfHd2Nk9fzhDlaDU5hxBZ7y0L3OVSD3SX3nKJ3JljWjTA2OfToa00aeR/LL/ul1pQkbLa00XQM7OwXsOWoJE2a0TXMSKHqKCCeseNJJQK3xP1Sa5im0AkkwO3/dqYomWEh/mnV9yFoq9ZZrj4e4fHllo4lQcBG5rfQJzMMK+3pwz/L/mnL0FScNIchF7q/6Tc3FVUns8K+l4M3q5Z7hhEKvqxBWnPo4qxWZ/O224OfVVBaFeOEnaK5MmPrN8SjTYQq0fgqwNiiTeSlNi3DCIcA2a4lmMuieOKDiGp8FtHJ3UuiPM6afPrb0t21ScvFECZcFGV7PKZRuQiQ5J5lIgWX+cEE46xfWoBkts4VEMTPek1YnYi88vNzRbmNzddVmohtUUKXVwGdb2GfFkA6aP2dXwUB5utxIvRY49Uw7ESo5q7kY8D0BYkQ7QoLCTgtNzfQtCn+dE1K0Xbb9P3XL08GQ/hloEZ3dgNzKFyCNOPDWXRt+VY3Fi38NfpYq3Wm1oDGLckFmeOHoH8dveT4wN5ywbn6XUkX2yxNLjxIOWOc5HW3VCDDP83MiEC2KSGOkOLXCAhft7LL/VIYgm5liTxr5kzdlSOa+/nH1Sc= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DS7PR03MB5608.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(6666004)(66476007)(66946007)(8936002)(4326008)(8676002)(508600001)(5660300002)(66556008)(6486002)(966005)(38100700002)(83380400001)(6506007)(36756003)(6916009)(82960400001)(6512007)(26005)(86362001)(1076003)(186003)(2616005)(2906002)(54906003)(316002)(20210929001);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?Qi9FcjFKUFZmZWNodmRHNEExb3ZMeDl6V0FkUjZGNmF2MnNnZEFjSENkUFVn?= =?utf-8?B?N2hHbzRTeEZ4S3J1bmFOUXRXSkRWdU5DLzU4bGZMMjZWaVU5KzdMMEZyMGhs?= =?utf-8?B?S2JnWmJzOVlnRVdjYllWNDlmSmoyOC9vOE9UeENJRGc3TnFMQVhyRzI2OHVv?= =?utf-8?B?aTVBYkJYN0U2QVNtK3ZFT3pRKzR3SlNEaXJwdW5XWE1xWThnYTQxRS9JUk9N?= =?utf-8?B?cGd2K3hDaWxKVWFIUk5jZkJsdkJ0ZXhYWENzTXk3bUQ4bWJqMllhNUZVVGFo?= =?utf-8?B?SzZkbHpPajV5eEFNQ3lPMmFxZUo2aHE3U1pSbTBIVW8xbUpveHlvdXB3V2Rl?= =?utf-8?B?WkQyUUZaRkg0Z1pYa1drVUo2UVlwK0xVWUVNWmFqUmREZmkvdlNXTWhBUkpH?= =?utf-8?B?S1RldnltM0VFeER2aXBNZzRFUFBlcWZpRHBIN0pYNUY4dk02WGZVN29TbnFQ?= =?utf-8?B?T2xhUTJNY2gwMnNtWkttRWZjdHFTc2ZnaGRsTVVHbGcyRHNjVUFLWVJhR3NW?= =?utf-8?B?amR4MWFjN2hCUDFRYVBzWkxqNC8weTRvM0lDeGUxbHQxbEZmM25ZMXpIL2J0?= =?utf-8?B?RURiSUJmVVQvNE54cXlaR0tpaWt5dTQxV2VWb01LSXVCYmlVK2ZkUW9tVVdm?= =?utf-8?B?RHl5Mm9ncmVRWVFnT05nWlMvM1QzOHVUUmdvbXlPcExKcnpnbzhIRS9TdjBj?= =?utf-8?B?bFdmWXl6SlR3WnE2NHJnZ0Q3bnJFMDg2blZsK0d6bHVKUEJFZFR6NVRUbjdz?= =?utf-8?B?L2F2OVFYY0F2RU9Ocm5kRHFPUEIyUDVFa2w3YWx3QUpjY3RYcm0ycjlhR3dK?= =?utf-8?B?SWpVMlpIRWx5c1ZuSUlreU9CM2pDZ00xWERIanNhNk1wWk5lOStBekRJY3hZ?= =?utf-8?B?Z1kzODlLYzlGaFVETTBVT0RZaThuYUJiSFI0Ung2RkFKU04yaEhqNkM5M2tZ?= =?utf-8?B?YTFxVnZyZzN5QkJVS2svK0lsdlVFQVFSWjdRRFA1R3Z6Ni96YmNqZE9NMTBP?= =?utf-8?B?ZTdLKytJVkVyZGoyZEFUcmluK1hremJLWlhaSWdOS1BPVzlUVkpWdGxTbEZ5?= =?utf-8?B?MlVxSjB3dzh6cmVueC9rb0lueXlqM21mOWdsbE5zVkJsOUVHc2h5OGMwc3lB?= =?utf-8?B?ZmdOSXBkbnVQWXJmL1ZaMTNVVGRhNmkwb0wwU1ZmOUkxRE44TWhScHVraGtX?= =?utf-8?B?dkdnVGY0UWJYM3d3RDhyM3Y1TjBYREl5czl4QlJNUjNsNzdwQTZoVk1heERw?= =?utf-8?B?T1FQRXUzTmEyekdxK0p4dENITWxQSXZUODNuMFZOOVRmdlJPSytnT1RScGJV?= =?utf-8?B?dFBWMWU3KzdHb01TOHViOFRuSHhvaXZNNloxeXJpQU9SZTB5amlPOTlkVXE3?= =?utf-8?B?Z3JwWHF0TExqQVlIZTh5RUdLWFArUDNpRitLcGJ4eWN2UG9tQTFlRjhKa1gw?= =?utf-8?B?OHV1TU9hSmgxd2tDN1h1ank3OC9OTGM2cFRTa2lNc3BsZ2UvWFRVZFN0Ylhv?= =?utf-8?B?VFV0S1Znd3dOS1VFd1o3NUtKNDZEb0dSeDllMFZhYjEzZVRKZkpkbElCM2ZS?= =?utf-8?B?THN4UHE5cm9kZGJwUW0rNmhFZzFvb2hxZjdhV29UalRycGpDVmFSWStPcnlC?= =?utf-8?B?SlQxejN4STBvRDFYcDlyVnFSZFN2TFJYditObjBiT1EybE5tclk0cStqUkxs?= =?utf-8?B?WndZMUVkUUhUelNGQ1dqM294eis0SGpuTk9vR1JMNXRZeTAvUWZOZjFmaHlK?= =?utf-8?B?TWE4NWcvY3dTMjZnVmhkNGl2cjdwZHY2Y004Y05tTEdXVDMwMnB4Y0Zac0Jl?= =?utf-8?B?MXFtUTg1T0tPc3NXbzJsNDBFcXlSOWk5L1BTUTVtRmtkMS9sRUZQSjZvQVBv?= =?utf-8?B?TFYrM2NCUWo5UURuaWczbUhrY1J1Mis4bkdzUmZDdHNLMXV5U1lNL09sR0NS?= =?utf-8?B?VkdJYWk2Z005MVJmOFRxZHNyTUNwNGl1cXVpQ1dONDVpWVJ4QVhvZ3pBd3Rh?= =?utf-8?B?bCtZUGhaMjIxTlRIWHJBN3RKNjB0WThjS1N5WlY5UGtzVnRuSUtUbGx6WFRO?= =?utf-8?B?Qlc1UkhrdnRiN3l3aGNrS0lxMHRTMXQ2aHQ3ZDVwWU5SbmVkRlUxUTc2bWdx?= =?utf-8?B?K1ZXQXRJSnlDSGthekc5bTNZQXFsM2ZCaEhxNFlkSXZQd2V2ZWs0VXlaekFE?= =?utf-8?Q?BnQZypxS7ExLSKOSqbZOfmE=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: 1ff70a3a-04bb-48fc-3225-08d9e5a28975 X-MS-Exchange-CrossTenant-AuthSource: DS7PR03MB5608.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Feb 2022 16:47:30.4507 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: DBFq+biCchyuE2/+AQ9Mn0kx0Wem6f2jlZNgFh64FYYxJEJ5KjiPOIK7FpycTTP/BJJp8DmS76xEdP191Vfo8Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR03MB3565 X-OriginatorOrg: citrix.com X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1643734085061100001 Expose VIRT_SPEC_CTRL to guests if the hardware supports setting SSBD in the LS_CFG MSR. Different AMD CPU families use different bits in LS_CFG, so exposing VIRT_SPEC_CTRL.SSBD allows for an unified way of setting SSBD on AMD hardware that's compatible migration wise, regardless of what underlying mechanism is used to set SSBD. Note that on AMD Family 17h (Zen 1) the value of SSBD in LS_CFG is shared between threads on the same core, so there's extra logic in order to synchronize the value and have SSBD set as long as one of the threads in the core requires it to be set. Such logic also requires extra storage for each thread state, which is allocated at initialization time. Do the context switching of the SSBD selection in LS_CFG between hypervisor and guest in the same handler that's already used to switch the value of VIRT_SPEC_CTRL in the hardware when supported. Suggested-by: Andrew Cooper Signed-off-by: Roger Pau Monn=C3=A9 --- xen/arch/x86/cpu/amd.c | 113 +++++++++++++++++++++---- xen/arch/x86/hvm/svm/svm.c | 14 ++- xen/arch/x86/include/asm/amd.h | 3 + xen/arch/x86/include/asm/cpufeatures.h | 1 + xen/arch/x86/spec_ctrl.c | 4 +- 5 files changed, 115 insertions(+), 20 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index c3fcc0e558..7318623874 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -685,24 +685,10 @@ void amd_init_lfence(struct cpuinfo_x86 *c) * Refer to the AMD Speculative Store Bypass whitepaper: * https://developer.amd.com/wp-content/resources/124441_AMD64_Speculative= StoreBypassDisable_Whitepaper_final.pdf */ -void amd_init_ssbd(const struct cpuinfo_x86 *c) +static bool set_legacy_ssbd(const struct cpuinfo_x86 *c, bool enable) { - struct cpu_info *info =3D get_cpu_info(); int bit =3D -1; =20 - if (cpu_has_ssb_no) - return; - - if (cpu_has_amd_ssbd) { - /* Handled by common MSR_SPEC_CTRL logic */ - return; - } - - if (cpu_has_virt_ssbd) { - wrmsrl(MSR_VIRT_SPEC_CTRL, opt_ssbd ? SPEC_CTRL_SSBD : 0); - goto out; - } - switch (c->x86) { case 0x15: bit =3D 54; break; case 0x16: bit =3D 33; break; @@ -716,26 +702,117 @@ void amd_init_ssbd(const struct cpuinfo_x86 *c) if (rdmsr_safe(MSR_AMD64_LS_CFG, val) || ({ val &=3D ~mask; - if (opt_ssbd) + if (enable) val |=3D mask; false; }) || wrmsr_safe(MSR_AMD64_LS_CFG, val) || ({ rdmsrl(MSR_AMD64_LS_CFG, val); - (val & mask) !=3D (opt_ssbd * mask); + (val & mask) !=3D (enable * mask); })) bit =3D -1; } =20 - if (bit < 0) + return bit >=3D 0; +} + +void amd_init_ssbd(const struct cpuinfo_x86 *c) +{ + struct cpu_info *info =3D get_cpu_info(); + + if (cpu_has_ssb_no) + return; + + if (cpu_has_amd_ssbd) { + /* Handled by common MSR_SPEC_CTRL logic */ + return; + } + + if (cpu_has_virt_ssbd) { + wrmsrl(MSR_VIRT_SPEC_CTRL, opt_ssbd ? SPEC_CTRL_SSBD : 0); + goto out; + } + + if (!set_legacy_ssbd(c, opt_ssbd)) { printk_once(XENLOG_ERR "No SSBD controls available\n"); + return; + } + + if (!smp_processor_id()) + setup_force_cpu_cap(X86_FEATURE_LEGACY_SSBD); =20 out: info->last_spec_ctrl =3D info->xen_spec_ctrl =3D opt_ssbd ? SPEC_CTRL_SSBD : 0; } =20 +static struct ssbd_core { + spinlock_t lock; + unsigned int count; +} *ssbd_core; +static unsigned int __read_mostly ssbd_max_cores; + +bool __init amd_setup_legacy_ssbd(void) +{ + unsigned int i; + + if (boot_cpu_data.x86 !=3D 0x17 || boot_cpu_data.x86_num_siblings =3D=3D = 1) + return true; + + /* + * One could be forgiven for thinking that c->x86_max_cores is the + * correct value to use here. + * + * However, that value is derived from the current configuration, and + * c->cpu_core_id is sparse on all but the top end CPUs. Derive + * max_cpus from ApicIdCoreIdSize which will cover any sparseness. + */ + if (boot_cpu_data.extended_cpuid_level >=3D 0x80000008) { + ssbd_max_cores =3D 1u << MASK_EXTR(cpuid_ecx(0x80000008), 0xf000); + ssbd_max_cores /=3D boot_cpu_data.x86_num_siblings; + } + if (!ssbd_max_cores) + return false; + + /* Max is two sockets for Fam17h hardware. */ + ssbd_core =3D xzalloc_array(struct ssbd_core, ssbd_max_cores * 2); + if (!ssbd_core) + return false; + + for (i =3D 0; i < ssbd_max_cores * 2; i++) { + spin_lock_init(&ssbd_core[i].lock); + /* Record the current state. */ + ssbd_core[i].count =3D opt_ssbd ? + boot_cpu_data.x86_num_siblings : 0; + } + + return true; +} + +void amd_set_legacy_ssbd(bool enable) +{ + const struct cpuinfo_x86 *c =3D ¤t_cpu_data; + struct ssbd_core *core; + unsigned long flags; + + if (c->x86 !=3D 0x17 || c->x86_num_siblings =3D=3D 1) { + set_legacy_ssbd(c, enable); + return; + } + + ASSERT(c->phys_proc_id < 2); + ASSERT(c->cpu_core_id < ssbd_max_cores); + core =3D &ssbd_core[c->phys_proc_id * ssbd_max_cores + c->cpu_core_id]; + spin_lock_irqsave(&core->lock, flags); + core->count +=3D enable ? 1 : -1; + ASSERT(core->count <=3D c->x86_num_siblings); + if ((enable && core->count =3D=3D 1) || + (!enable && core->count =3D=3D 0)) + BUG_ON(!set_legacy_ssbd(c, enable)); + spin_unlock_irqrestore(&core->lock, flags); +} + void __init detect_zen2_null_seg_behaviour(void) { uint64_t base; diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 56c7b30b32..10a5a77ad7 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -3134,6 +3134,15 @@ void vmexit_virt_spec_ctrl(void) wrmsr(MSR_VIRT_SPEC_CTRL, val, 0); curr->arch.msrs->spec_ctrl.raw =3D lo; info->last_spec_ctrl =3D val; + + return; + } + + ASSERT(boot_cpu_has(X86_FEATURE_LEGACY_SSBD)); + if ( val !=3D info->last_spec_ctrl ) + { + amd_set_legacy_ssbd(val & SPEC_CTRL_SSBD); + info->last_spec_ctrl =3D val; } } =20 @@ -3147,7 +3156,10 @@ void vmentry_virt_spec_ctrl(void) ASSERT(!boot_cpu_has(X86_FEATURE_SC_MSR_HVM)); if ( val !=3D info->last_spec_ctrl ) { - wrmsr(MSR_VIRT_SPEC_CTRL, val, 0); + if ( boot_cpu_has(X86_FEATURE_LEGACY_SSBD) ) + amd_set_legacy_ssbd(val & SPEC_CTRL_SSBD); + else + wrmsr(MSR_VIRT_SPEC_CTRL, val, 0); info->last_spec_ctrl =3D val; } =20 diff --git a/xen/arch/x86/include/asm/amd.h b/xen/arch/x86/include/asm/amd.h index a82382e6bf..823e2f3bd2 100644 --- a/xen/arch/x86/include/asm/amd.h +++ b/xen/arch/x86/include/asm/amd.h @@ -151,4 +151,7 @@ void check_enable_amd_mmconf_dmi(void); extern bool amd_acpi_c1e_quirk; void amd_check_disable_c1e(unsigned int port, u8 value); =20 +bool amd_setup_legacy_ssbd(void); +void amd_set_legacy_ssbd(bool enable); + #endif /* __AMD_H__ */ diff --git a/xen/arch/x86/include/asm/cpufeatures.h b/xen/arch/x86/include/= asm/cpufeatures.h index a2c37bfdd4..f12d423fe9 100644 --- a/xen/arch/x86/include/asm/cpufeatures.h +++ b/xen/arch/x86/include/asm/cpufeatures.h @@ -40,6 +40,7 @@ XEN_CPUFEATURE(SC_VERW_HVM, X86_SYNTH(24)) /* VERW = used by Xen for HVM */ XEN_CPUFEATURE(SC_VERW_IDLE, X86_SYNTH(25)) /* VERW used by Xen for i= dle */ XEN_CPUFEATURE(XEN_SHSTK, X86_SYNTH(26)) /* Xen uses CET Shadow St= acks */ XEN_CPUFEATURE(VIRT_SC_MSR_HVM, X86_SYNTH(27)) /* MSR_VIRT_SPEC_CTRL exp= osed to HVM */ +XEN_CPUFEATURE(LEGACY_SSBD, X86_SYNTH(28)) /* LS_CFG available for S= SBD */ =20 /* Bug words follow the synthetic words. */ #define X86_NR_BUG 1 diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 2c46e1485f..c7f8ec29f4 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -22,6 +22,7 @@ #include #include =20 +#include #include #include #include @@ -1056,7 +1057,8 @@ void __init init_speculation_mitigations(void) setup_force_cpu_cap(X86_FEATURE_SC_MSR_HVM); } =20 - if ( opt_msr_sc_hvm && cpu_has_virt_ssbd ) + if ( opt_msr_sc_hvm && (cpu_has_virt_ssbd || + (boot_cpu_has(X86_FEATURE_LEGACY_SSBD) && amd_setup_legacy_ssbd()= )) ) setup_force_cpu_cap(X86_FEATURE_VIRT_SC_MSR_HVM); =20 /* If we have IBRS available, see whether we should use it. */ --=20 2.34.1