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d="scan'208";a="62906692" From: Andrew Cooper To: Xen-devel CC: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu Subject: [PATCH 1/3] x86/cpuid: Disentangle logic for new feature leaves Date: Thu, 27 Jan 2022 16:09:38 +0000 Message-ID: <20220127160940.19469-2-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20220127160940.19469-1-andrew.cooper3@citrix.com> References: <20220127160940.19469-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1643299823426100001 Adding a new feature leaf is a reasonable amount of boilerplate and for the patch to build, at least one feature from the new leaf needs defining. This typically causes two non-trivial changes to be merged together. First, have gen-cpuid.py write out some extra placeholder defines: #define CPUID_BITFIELD_11 bool :1, :1, lfence_dispatch:1, ... #define CPUID_BITFIELD_12 uint32_t :32 /* placeholder */ #define CPUID_BITFIELD_13 uint32_t :32 /* placeholder */ #define CPUID_BITFIELD_14 uint32_t :32 /* placeholder */ #define CPUID_BITFIELD_15 uint32_t :32 /* placeholder */ This allows DECL_BITFIELD() to be added to struct cpuid_policy without requiring a XEN_CPUFEATURE() declared for the leaf. The choice of 4 is arbitrary, and allows us to add more than one leaf at a time if necessary. Second, rework generic_identify() to not use feature leaf names. The choice of deriving the index from a feature was to avoid mismatches, but its correctness depends on bugs like c/s 249e0f1d8f20 ("x86/cpuid: Fix TSXLDTRK definition") not happening. Switch to using FEATURESET_* just like the policy/featureset helpers. This breaks the cognitive complexity of needing to know which leaf a specifically named feature should reside in, and is shorter to write. It is also far easier to identify as correct at a glance, given the correlation with the CPUID leaf being read. In addition, tidy up some other bits of generic_identify() * Drop leading zeros from leaf numbers. * Don't use a locked update for X86_FEATURE_APERFMPERF. * Rework extended_cpuid_level calculation to avoid setting it twice. * Use "leaf >=3D $N" consistently so $N matches with the CPUID input. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu --- xen/arch/x86/cpu/common.c | 54 +++++++++++++++++++++++--------------------= ---- xen/tools/gen-cpuid.py | 2 ++ 2 files changed, 29 insertions(+), 27 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 4a163afbfc7e..c6773c85fd3e 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -379,7 +379,7 @@ static void generic_identify(struct cpuinfo_x86 *c) u32 eax, ebx, ecx, edx, tmp; =20 /* Get vendor name */ - cpuid(0x00000000, &c->cpuid_level, &ebx, &ecx, &edx); + cpuid(0, &c->cpuid_level, &ebx, &ecx, &edx); *(u32 *)&c->x86_vendor_id[0] =3D ebx; *(u32 *)&c->x86_vendor_id[8] =3D ecx; *(u32 *)&c->x86_vendor_id[4] =3D edx; @@ -394,7 +394,7 @@ static void generic_identify(struct cpuinfo_x86 *c) /* Note that the vendor-specific code below might override */ =20 /* Model and family information. */ - cpuid(0x00000001, &eax, &ebx, &ecx, &edx); + cpuid(1, &eax, &ebx, &ecx, &edx); c->x86 =3D get_cpu_family(eax, &c->x86_model, &c->x86_mask); c->apicid =3D phys_pkg_id((ebx >> 24) & 0xFF, 0); c->phys_proc_id =3D c->apicid; @@ -404,53 +404,53 @@ static void generic_identify(struct cpuinfo_x86 *c) =20 /* c_early_init() may have adjusted cpuid levels/features. Reread. */ c->cpuid_level =3D cpuid_eax(0); - cpuid(0x00000001, &eax, &ebx, &ecx, &edx); - c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] =3D edx; - c->x86_capability[cpufeat_word(X86_FEATURE_SSE3)] =3D ecx; + cpuid(1, &eax, &ebx, + &c->x86_capability[FEATURESET_1c], + &c->x86_capability[FEATURESET_1d]); =20 if ( cpu_has(c, X86_FEATURE_CLFLUSH) ) c->x86_clflush_size =3D ((ebx >> 8) & 0xff) * 8; =20 if ( (c->cpuid_level >=3D CPUID_PM_LEAF) && (cpuid_ecx(CPUID_PM_LEAF) & CPUID6_ECX_APERFMPERF_CAPABILITY) ) - set_bit(X86_FEATURE_APERFMPERF, c->x86_capability); + __set_bit(X86_FEATURE_APERFMPERF, c->x86_capability); + + eax =3D cpuid_eax(0x80000000); + if ((eax >> 16) =3D=3D 0x8000) + c->extended_cpuid_level =3D eax; =20 /* AMD-defined flags: level 0x80000001 */ - c->extended_cpuid_level =3D cpuid_eax(0x80000000); - if ((c->extended_cpuid_level >> 16) !=3D 0x8000) - c->extended_cpuid_level =3D 0; - if (c->extended_cpuid_level > 0x80000000) + if (c->extended_cpuid_level >=3D 0x80000001) cpuid(0x80000001, &tmp, &tmp, - &c->x86_capability[cpufeat_word(X86_FEATURE_LAHF_LM)], - &c->x86_capability[cpufeat_word(X86_FEATURE_SYSCALL)]); + &c->x86_capability[FEATURESET_e1c], + &c->x86_capability[FEATURESET_e1d]); =20 if (c->extended_cpuid_level >=3D 0x80000004) get_model_name(c); /* Default name */ if (c->extended_cpuid_level >=3D 0x80000007) - c->x86_capability[cpufeat_word(X86_FEATURE_ITSC)] - =3D cpuid_edx(0x80000007); + c->x86_capability[FEATURESET_e7d] =3D cpuid_edx(0x80000007); if (c->extended_cpuid_level >=3D 0x80000008) - c->x86_capability[cpufeat_word(X86_FEATURE_CLZERO)] - =3D cpuid_ebx(0x80000008); + c->x86_capability[FEATURESET_e8b] =3D cpuid_ebx(0x80000008); if (c->extended_cpuid_level >=3D 0x80000021) - c->x86_capability[cpufeat_word(X86_FEATURE_LFENCE_DISPATCH)] - =3D cpuid_eax(0x80000021); + c->x86_capability[FEATURESET_e21a] =3D cpuid_eax(0x80000021); =20 /* Intel-defined flags: level 0x00000007 */ - if ( c->cpuid_level >=3D 0x00000007 ) { - cpuid_count(0x00000007, 0, &eax, - &c->x86_capability[cpufeat_word(X86_FEATURE_FSGSBASE)], - &c->x86_capability[cpufeat_word(X86_FEATURE_PKU)], - &c->x86_capability[cpufeat_word(X86_FEATURE_AVX512_4VNNIW)]); - if (eax > 0) - cpuid_count(0x00000007, 1, - &c->x86_capability[cpufeat_word(X86_FEATURE_AVX512_BF16)], + if (c->cpuid_level >=3D 7) { + uint32_t max_subleaf; + + cpuid_count(7, 0, &max_subleaf, + &c->x86_capability[FEATURESET_7b0], + &c->x86_capability[FEATURESET_7c0], + &c->x86_capability[FEATURESET_7d0]); + if (max_subleaf >=3D 1) + cpuid_count(7, 1, + &c->x86_capability[FEATURESET_7a1], &tmp, &tmp, &tmp); } =20 if (c->cpuid_level >=3D 0xd) cpuid_count(0xd, 1, - &c->x86_capability[cpufeat_word(X86_FEATURE_XSAVEOPT)], + &c->x86_capability[FEATURESET_Da1], &tmp, &tmp, &tmp); } =20 diff --git a/xen/tools/gen-cpuid.py b/xen/tools/gen-cpuid.py index b953648b6572..470cd76d1c52 100755 --- a/xen/tools/gen-cpuid.py +++ b/xen/tools/gen-cpuid.py @@ -423,6 +423,8 @@ def write_results(state): =20 """) =20 + state.bitfields +=3D ["uint32_t :32 /* placeholder */"] * 4 + for idx, text in enumerate(state.bitfields): state.output.write( "#define CPUID_BITFIELD_%d \\\n %s\n\n" --=20 2.11.0