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client-ip=40.67.248.234; helo=nebula.arm.com; From: Penny Zheng To: , , CC: , , Subject: [PATCH 09/11] xen/arm: if 1:1 direct-map domain use native UART address and IRQ number for vPL011 Date: Thu, 23 Sep 2021 03:11:13 +0000 Message-ID: <20210923031115.1429719-10-penny.zheng@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210923031115.1429719-1-penny.zheng@arm.com> References: <20210923031115.1429719-1-penny.zheng@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 1 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 35b66eb1-e189-4e68-bb77-08d97e3fe6f4 X-MS-TrafficTypeDiagnostic: AM0PR08MB3137:|DB9PR08MB6876: X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true NoDisclaimer: true X-MS-Oob-TLC-OOBClassifiers: OLM:9508;OLM:9508; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: +gvpXnSrQEDEXBET3ZqY/6IWO7ZXSB6V8r7f9mJ/vxxWKulcYBDZQZPItP/x0FubJB3sT+m7wWKuEsAnDy9asxpXhtVkOFujEjA+FdTJL+vJYR3b5EE2TLVfOtIsFeI5E5CfjDSAyQOIT6booKtYnk0Jizh+FfNX0hXoFJPHXelZqM/1pQWaGWAv1bsg0PKIu6blYDKWZ+aATvnbxKRSj5RgHhcJeAu5NfTyrGTXeTTT5n1gEZRKbQE1kNIzPnq9xHtzzb0TbcFnBlPhDjwB3w0FIgycFGyPTxjtUfz9Y8aiGK2uvmNd2aOnMhWh6vp0Sc4TgSEe4/juxGMY/RMKLZHrQjAogJSCkORi6+BZ4MwFxi2nFbLbToibCcp4LVlL4teSZAyBRfi7tmookYvtdcxZyS8iYYCx4CPq/IDVYk1ttqxs6k+JzQtJEpFLbh7cNpgIfxZ0+U8a5ob3KvbTrT1jlFn0KfC4NipfGhTie+xOg3ufFCzHPQLG2gOuL2AD0gt+CQgVaA3vvM6VfhTLe285DfQzVgPDFoQF6L36zXhZC62KEVI4X2L1giRfALEa0qA1IYGX7zU1iwIzWtkXx+bL1Zg4FAx7UR1iwiFlW6jg460vbo4OMnWWmXtueOv4vV8XzGxRJdfuKz2FsMpxuIW7J/iMSEYDxXlKZFL0jHL7nKkZFAV+kYaKLNbtLT9WPuWj1e4kPQKQr3OZG4eNAjHyjVCet7FIgYQweLhAjKk= X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(36840700001)(46966006)(47076005)(2906002)(2616005)(1076003)(36756003)(82310400003)(4326008)(316002)(54906003)(5660300002)(8936002)(426003)(356005)(508600001)(26005)(6666004)(7696005)(86362001)(36860700001)(70586007)(186003)(8676002)(81166007)(70206006)(44832011)(83380400001)(336012)(110136005)(36900700001);DIR:OUT;SFP:1101; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Sep 2021 03:11:57.1714 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 35b66eb1-e189-4e68-bb77-08d97e3fe6f4 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.33.187.114];Helo=[64aa7808-outbound-2.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT008.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB6876 X-ZohoMail-DKIM: pass (identity @armh.onmicrosoft.com) X-ZM-MESSAGEID: 1632366753947100001 Content-Type: text/plain; charset="utf-8" From: Stefano Stabellini We always use a fix address to map the vPL011 to domains. The address could be a problem for domains that are directly mapped. So, for domains that are directly mapped, reuse the address of the physical UART on the platform to avoid potential clashes. Do the same for the virtual IRQ number: instead of always using GUEST_VPL011_SPI, try to reuse the physical SPI number if possible. Signed-off-by: Stefano Stabellini Signed-off-by: Penny Zheng --- xen/arch/arm/domain_build.c | 34 +++++++++++++++++++++++++++------- xen/arch/arm/vpl011.c | 34 +++++++++++++++++++++++++++------- xen/include/asm-arm/vpl011.h | 2 ++ 3 files changed, 56 insertions(+), 14 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 120f1ae575..c92e510ae7 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -30,6 +30,7 @@ =20 #include #include +#include =20 static unsigned int __initdata opt_dom0_max_vcpus; integer_param("dom0_max_vcpus", opt_dom0_max_vcpus); @@ -1942,8 +1943,11 @@ static int __init make_vpl011_uart_node(struct kerne= l_info *kinfo) gic_interrupt_t intr; __be32 reg[GUEST_ROOT_ADDRESS_CELLS + GUEST_ROOT_SIZE_CELLS]; __be32 *cells; + struct domain *d =3D kinfo->d; + char buf[27]; =20 - res =3D fdt_begin_node(fdt, "sbsa-uart@"__stringify(GUEST_PL011_BASE)); + snprintf(buf, sizeof(buf), "sbsa-uart@%"PRIx64, d->arch.vpl011.base_ad= dr); + res =3D fdt_begin_node(fdt, buf); if ( res ) return res; =20 @@ -1953,14 +1957,14 @@ static int __init make_vpl011_uart_node(struct kern= el_info *kinfo) =20 cells =3D ®[0]; dt_child_set_range(&cells, GUEST_ROOT_ADDRESS_CELLS, - GUEST_ROOT_SIZE_CELLS, GUEST_PL011_BASE, + GUEST_ROOT_SIZE_CELLS, d->arch.vpl011.base_addr, GUEST_PL011_SIZE); =20 res =3D fdt_property(fdt, "reg", reg, sizeof(reg)); if ( res ) return res; =20 - set_interrupt(intr, GUEST_VPL011_SPI, 0xf, DT_IRQ_TYPE_LEVEL_HIGH); + set_interrupt(intr, d->arch.vpl011.virq, 0xf, DT_IRQ_TYPE_LEVEL_HIGH); =20 res =3D fdt_property(fdt, "interrupts", intr, sizeof (intr)); if ( res ) @@ -2670,6 +2674,13 @@ static int __init construct_domU(struct domain *d, else allocate_static_memory(d, &kinfo, node); =20 + /* + * Initialization before creating its device + * tree node in prepare_dtb_domU. + */ + if ( kinfo.vpl011 ) + rc =3D domain_vpl011_init(d, NULL); + rc =3D prepare_dtb_domU(d, &kinfo); if ( rc < 0 ) return rc; @@ -2678,9 +2689,6 @@ static int __init construct_domU(struct domain *d, if ( rc < 0 ) return rc; =20 - if ( kinfo.vpl011 ) - rc =3D domain_vpl011_init(d, NULL); - return rc; } =20 @@ -2723,15 +2731,27 @@ void __init create_domUs(void) =20 if ( !dt_property_read_u32(node, "nr_spis", &d_cfg.arch.nr_spis) ) { + unsigned int vpl011_virq =3D GUEST_VPL011_SPI; d_cfg.arch.nr_spis =3D gic_number_lines() - 32; =20 + /* + * The VPL011 virq is GUEST_VPL011_SPI, unless direct-map in + * set, in which case we'll try to match the hardware. + * + * Typically, d->arch.vpl011.virq has the vpl011 irq number + * but at this point of the boot sequence it is not + * initialized yet. + */ + if ( direct_map && serial_irq(SERHND_DTUART) > 0 ) + vpl011_virq =3D serial_irq(SERHND_DTUART); + /* * vpl011 uses one emulated SPI. If vpl011 is requested, make * sure that we allocate enough SPIs for it. */ if ( dt_property_read_bool(node, "vpl011") ) d_cfg.arch.nr_spis =3D MAX(d_cfg.arch.nr_spis, - GUEST_VPL011_SPI - 32 + 1); + vpl011_virq - 32 + 1); } =20 /* diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c index 895f436cc4..10df25f098 100644 --- a/xen/arch/arm/vpl011.c +++ b/xen/arch/arm/vpl011.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -71,11 +72,11 @@ static void vpl011_update_interrupt_status(struct domai= n *d) * status bit has been set since the last time. */ if ( uartmis & ~vpl011->shadow_uartmis ) - vgic_inject_irq(d, NULL, GUEST_VPL011_SPI, true); + vgic_inject_irq(d, NULL, vpl011->virq, true); =20 vpl011->shadow_uartmis =3D uartmis; #else - vgic_inject_irq(d, NULL, GUEST_VPL011_SPI, uartmis); + vgic_inject_irq(d, NULL, vpl011->virq, uartmis); #endif } =20 @@ -347,7 +348,8 @@ static int vpl011_mmio_read(struct vcpu *v, void *priv) { struct hsr_dabt dabt =3D info->dabt; - uint32_t vpl011_reg =3D (uint32_t)(info->gpa - GUEST_PL011_BASE); + uint32_t vpl011_reg =3D (uint32_t)(info->gpa - + v->domain->arch.vpl011.base_addr); struct vpl011 *vpl011 =3D &v->domain->arch.vpl011; struct domain *d =3D v->domain; unsigned long flags; @@ -430,7 +432,8 @@ static int vpl011_mmio_write(struct vcpu *v, void *priv) { struct hsr_dabt dabt =3D info->dabt; - uint32_t vpl011_reg =3D (uint32_t)(info->gpa - GUEST_PL011_BASE); + uint32_t vpl011_reg =3D (uint32_t)(info->gpa - + v->domain->arch.vpl011.base_addr); struct vpl011 *vpl011 =3D &v->domain->arch.vpl011; struct domain *d =3D v->domain; unsigned long flags; @@ -622,10 +625,27 @@ int domain_vpl011_init(struct domain *d, struct vpl01= 1_init_info *info) { int rc; struct vpl011 *vpl011 =3D &d->arch.vpl011; + const struct vuart_info *uart =3D serial_vuart_info(SERHND_DTUART); =20 if ( vpl011->backend.dom.ring_buf ) return -EINVAL; =20 + vpl011->base_addr =3D GUEST_PL011_BASE; + vpl011->virq =3D GUEST_VPL011_SPI; + if ( is_domain_direct_mapped(d) ) + { + if ( uart !=3D NULL && serial_irq(SERHND_DTUART) > 0 ) + { + vpl011->base_addr =3D uart->base_addr; + vpl011->virq =3D serial_irq(SERHND_DTUART); + } + else + printk(XENLOG_ERR + "Unable to reuse physical UART address and irq for vPL0= 11.\n" + "Defaulting to addr %#"PRIpaddr" and IRQ %u\n", + vpl011->base_addr, vpl011->virq); + } + /* * info is NULL when the backend is in Xen. * info is !=3D NULL when the backend is in a domain. @@ -661,7 +681,7 @@ int domain_vpl011_init(struct domain *d, struct vpl011_= init_info *info) } } =20 - rc =3D vgic_reserve_virq(d, GUEST_VPL011_SPI); + rc =3D vgic_reserve_virq(d, vpl011->virq); if ( !rc ) { rc =3D -EINVAL; @@ -673,12 +693,12 @@ int domain_vpl011_init(struct domain *d, struct vpl01= 1_init_info *info) spin_lock_init(&vpl011->lock); =20 register_mmio_handler(d, &vpl011_mmio_handler, - GUEST_PL011_BASE, GUEST_PL011_SIZE, NULL); + vpl011->base_addr, GUEST_PL011_SIZE, NULL); =20 return 0; =20 out2: - vgic_free_virq(d, GUEST_VPL011_SPI); + vgic_free_virq(d, vpl011->virq); =20 out1: if ( vpl011->backend_in_domain ) diff --git a/xen/include/asm-arm/vpl011.h b/xen/include/asm-arm/vpl011.h index e6c7ab7381..c09abcd7a9 100644 --- a/xen/include/asm-arm/vpl011.h +++ b/xen/include/asm-arm/vpl011.h @@ -53,6 +53,8 @@ struct vpl011 { uint32_t uarticr; /* Interrupt clear register */ uint32_t uartris; /* Raw interrupt status register */ uint32_t shadow_uartmis; /* shadow masked interrupt register */ + paddr_t base_addr; + unsigned int virq; spinlock_t lock; evtchn_port_t evtchn; }; --=20 2.25.1