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a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1601462479; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fg2n4En+8hTvTykx+q5VMiSwKU3OIKUaqIxvn9D7J6g=; b=MBaKJVFqjT1QSCZxsBXoksF+U3Dupyky7PfsUyExiqAZS203OdKuS1m4 LaVkTXcsMMqj7SpQW/tmlkY2sHo9sIZyGqOmUcDW4AhSCr8MOHbL6X1Ww zK8AIIMf6f5EbKnn7NRKQsfUMqna3Np8zwnmzZHeGB4pZSk+gGp+qZGRb Q=; Authentication-Results: esa2.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: Cc3krNVpuXZTcFEsccDXCa+c1jIVPGsLt/9fSSm+VKrnjXdz9PpEadutCUL5LlH2zp0rKIZKLu CMOuXtZ75Mxjgv1brsqN/4ddSlTWb2okiwWDYP9iSdf8nZsAj6s/D+PbBqVqqYupCv8YcDyduP 1YUX3qAjtzVG1mTxRxgMayzDhCbFGr8fXbBDMDE/PksJvHiKMzs84mz2ue3bQjBizRhb0+GjeJ lPttDq2cCRw8bwAhnFXgPbHC5PMyOs4fyiev6F9kvO3+ukceG7YY1z4r52ipIeFliEqldtRsnV cY0= X-SBRS: None X-MesageID: 27954185 X-Ironport-Server: esa2.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.77,322,1596513600"; d="scan'208";a="27954185" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu , Paul Durrant , Paul Durrant Subject: [PATCH v2 01/11] x86/hvm: drop vcpu parameter from vlapic EOI callbacks Date: Wed, 30 Sep 2020 12:40:58 +0200 Message-ID: <20200930104108.35969-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200930104108.35969-1-roger.pau@citrix.com> References: <20200930104108.35969-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) EOIs are always executed in guest vCPU context, so there's no reason to pass a vCPU parameter around as can be fetched from current. While there make the vector parameter of both callbacks unsigned int. No functional change intended. Suggested-by: Paul Durrant Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Paul Durrant --- Changes since v1: - New in this version. --- xen/arch/x86/hvm/vioapic.c | 5 +++-- xen/arch/x86/hvm/vlapic.c | 7 ++----- xen/drivers/passthrough/io.c | 4 +++- xen/include/asm-x86/hvm/io.h | 2 +- xen/include/asm-x86/hvm/vioapic.h | 2 +- 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index 67d4a6237f..0fb9147d99 100644 --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -353,7 +353,7 @@ static int vioapic_write( =20 #if VIOAPIC_VERSION_ID >=3D 0x20 case VIOAPIC_REG_EOI: - vioapic_update_EOI(v->domain, val); + vioapic_update_EOI(val); break; #endif =20 @@ -495,8 +495,9 @@ void vioapic_irq_positive_edge(struct domain *d, unsign= ed int irq) } } =20 -void vioapic_update_EOI(struct domain *d, u8 vector) +void vioapic_update_EOI(unsigned int vector) { + struct domain *d =3D current->domain; struct hvm_irq *hvm_irq =3D hvm_domain_irq(d); union vioapic_redir_entry *ent; unsigned int i; diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 4e3861eb7d..ae737403f3 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -459,13 +459,10 @@ void vlapic_EOI_set(struct vlapic *vlapic) =20 void vlapic_handle_EOI(struct vlapic *vlapic, u8 vector) { - struct vcpu *v =3D vlapic_vcpu(vlapic); - struct domain *d =3D v->domain; - if ( vlapic_test_vector(vector, &vlapic->regs->data[APIC_TMR]) ) - vioapic_update_EOI(d, vector); + vioapic_update_EOI(vector); =20 - hvm_dpci_msi_eoi(d, vector); + hvm_dpci_msi_eoi(vector); } =20 static bool_t is_multicast_dest(struct vlapic *vlapic, unsigned int short_= hand, diff --git a/xen/drivers/passthrough/io.c b/xen/drivers/passthrough/io.c index 6b1305a3e5..54f3e7b540 100644 --- a/xen/drivers/passthrough/io.c +++ b/xen/drivers/passthrough/io.c @@ -874,8 +874,10 @@ static int _hvm_dpci_msi_eoi(struct domain *d, return 0; } =20 -void hvm_dpci_msi_eoi(struct domain *d, int vector) +void hvm_dpci_msi_eoi(unsigned int vector) { + struct domain *d =3D current->domain; + if ( !is_iommu_enabled(d) || (!hvm_domain_irq(d)->dpci && !is_hardware_domain(d)) ) return; diff --git a/xen/include/asm-x86/hvm/io.h b/xen/include/asm-x86/hvm/io.h index 558426b772..adec0f566a 100644 --- a/xen/include/asm-x86/hvm/io.h +++ b/xen/include/asm-x86/hvm/io.h @@ -159,7 +159,7 @@ struct hvm_hw_stdvga { void stdvga_init(struct domain *d); void stdvga_deinit(struct domain *d); =20 -extern void hvm_dpci_msi_eoi(struct domain *d, int vector); +extern void hvm_dpci_msi_eoi(unsigned int vector); =20 /* Decode a PCI port IO access into a bus/slot/func/reg. */ unsigned int hvm_pci_decode_addr(unsigned int cf8, unsigned int addr, diff --git a/xen/include/asm-x86/hvm/vioapic.h b/xen/include/asm-x86/hvm/vi= oapic.h index d6f4e12d54..fd602f8830 100644 --- a/xen/include/asm-x86/hvm/vioapic.h +++ b/xen/include/asm-x86/hvm/vioapic.h @@ -64,7 +64,7 @@ int vioapic_init(struct domain *d); void vioapic_deinit(struct domain *d); void vioapic_reset(struct domain *d); void vioapic_irq_positive_edge(struct domain *d, unsigned int irq); -void vioapic_update_EOI(struct domain *d, u8 vector); +void vioapic_update_EOI(unsigned int vector); =20 int vioapic_get_mask(const struct domain *d, unsigned int gsi); int vioapic_get_vector(const struct domain *d, unsigned int gsi); --=20 2.28.0 From nobody Sat May 4 04:32:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1601462507; cv=none; d=zohomail.com; s=zohoarc; b=BAMjMKbiiI4hX2p+CZMk6F6+Zus1u47DsF1hp5PZQ8tHEsAmKOaZtZ+Ioo+fPTQ9dcCRoiFDgE2eHtj7LTgwjnWGXm9LDHmsitWFETWGaW5hHj3WutXDUadF7tFScPXfXe2UJEUCU/kQ4lLvcdA6eqYekNjzgjZPjQq6qB8WKNQ= ARC-Message-Signature: i=1; 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d="scan'208";a="27954186" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu , Paul Durrant Subject: [PATCH v2 02/11] x86/hvm: drop domain parameter from vioapic/vpic EOI callbacks Date: Wed, 30 Sep 2020 12:40:59 +0200 Message-ID: <20200930104108.35969-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200930104108.35969-1-roger.pau@citrix.com> References: <20200930104108.35969-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) EOIs are always executed in guest vCPU context, so there's no reason to pass a domain parameter around as can be fetched from current->domain. No functional change intended. Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Paul Durrant --- Changes since v1: - New in this version. --- xen/arch/x86/hvm/vioapic.c | 2 +- xen/arch/x86/hvm/vpic.c | 3 +-- xen/drivers/passthrough/io.c | 4 ++-- xen/include/asm-x86/hvm/io.h | 3 +-- 4 files changed, 5 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index 0fb9147d99..752fc410db 100644 --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -522,7 +522,7 @@ void vioapic_update_EOI(unsigned int vector) if ( is_iommu_enabled(d) ) { spin_unlock(&d->arch.hvm.irq_lock); - hvm_dpci_eoi(d, vioapic->base_gsi + pin, ent); + hvm_dpci_eoi(vioapic->base_gsi + pin, ent); spin_lock(&d->arch.hvm.irq_lock); } =20 diff --git a/xen/arch/x86/hvm/vpic.c b/xen/arch/x86/hvm/vpic.c index 3cf12581e9..26f74f4471 100644 --- a/xen/arch/x86/hvm/vpic.c +++ b/xen/arch/x86/hvm/vpic.c @@ -262,8 +262,7 @@ static void vpic_ioport_write( /* Release lock and EOI the physical interrupt (if any). */ vpic_update_int_output(vpic); vpic_unlock(vpic); - hvm_dpci_eoi(current->domain, - hvm_isa_irq_to_gsi((addr >> 7) ? (pin | 8) : = pin), + hvm_dpci_eoi(hvm_isa_irq_to_gsi((addr >> 7) ? (pin | 8) : = pin), NULL); return; /* bail immediately */ case 6: /* Set Priority */ diff --git a/xen/drivers/passthrough/io.c b/xen/drivers/passthrough/io.c index 54f3e7b540..536e91ad76 100644 --- a/xen/drivers/passthrough/io.c +++ b/xen/drivers/passthrough/io.c @@ -1003,9 +1003,9 @@ static void hvm_gsi_eoi(struct domain *d, unsigned in= t gsi, hvm_pirq_eoi(pirq, ent); } =20 -void hvm_dpci_eoi(struct domain *d, unsigned int guest_gsi, - const union vioapic_redir_entry *ent) +void hvm_dpci_eoi(unsigned int guest_gsi, const union vioapic_redir_entry = *ent) { + struct domain *d =3D current->domain; const struct hvm_irq_dpci *hvm_irq_dpci; const struct hvm_girq_dpci_mapping *girq; =20 diff --git a/xen/include/asm-x86/hvm/io.h b/xen/include/asm-x86/hvm/io.h index adec0f566a..b05f619435 100644 --- a/xen/include/asm-x86/hvm/io.h +++ b/xen/include/asm-x86/hvm/io.h @@ -118,8 +118,7 @@ bool handle_mmio_with_translation(unsigned long gla, un= signed long gpfn, struct npfec); bool handle_pio(uint16_t port, unsigned int size, int dir); void hvm_interrupt_post(struct vcpu *v, int vector, int type); -void hvm_dpci_eoi(struct domain *d, unsigned int guest_irq, - const union vioapic_redir_entry *ent); +void hvm_dpci_eoi(unsigned int guest_irq, const union vioapic_redir_entry = *ent); void msix_write_completion(struct vcpu *); =20 #ifdef CONFIG_HVM --=20 2.28.0 From nobody Sat May 4 04:32:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1601462503; cv=none; d=zohomail.com; s=zohoarc; b=n7MUmV3voTNxa+HRtHUIWfJrTrI8YzyeN4Saqdg0OKQ39Xm8KiErxpV3BD9XrV40AkeK/2r54yQe4aT2deBOMaDAoNPuZvm26wZZIdMax8gpltHUJhO3YLbNs2tf9vFd5OeU1MyYL8Ujrv1xJ/+LHz9uifEHPkCz2YRJxAPw0qo= ARC-Message-Signature: i=1; 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Authentication-Results: esa4.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: joPNBrV9dk8Rx4MW40YH3ivXnpl4KduRRZkPjSL8QDX27Kxy7jtX0slRBLxZO68xzP+J80GJDd j+CstnA3Pt7R5o4ktEuE1wiyHt7n+GkW+nQFh1wHX46+5QKxiR0etcxYcxfDprjZMgAV2SkpGM n420wASsgyt0/R+AE+ete2mANQos/vXvYy2/m1oQ8SakymUn06ototzXZ4S92IcjTITJclWPTG F1bIhJUinbGjWAW9jbTvtt0G3TcFhxiXiK93L9r6k0I+WR1725lP6K/dfveVPtsXbTZPPH6qFq Zew= X-SBRS: None X-MesageID: 28960234 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.77,322,1596513600"; d="scan'208";a="28960234" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu Subject: [PATCH v2 03/11] x86/vlapic: introduce an EOI callback mechanism Date: Wed, 30 Sep 2020 12:41:00 +0200 Message-ID: <20200930104108.35969-4-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200930104108.35969-1-roger.pau@citrix.com> References: <20200930104108.35969-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) Add a new vlapic_set_irq_callback helper in order to inject a vector and set a callback to be executed when the guest performs the end of interrupt acknowledgment. Such functionality will be used to migrate the current ad hoc handling done in vlapic_handle_EOI for the vectors that require some logic to be executed when the end of interrupt is performed. No current users are migrated to use this new functionality yet, so not functional change expected as a result. Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v1: - Make vlapic_set_irq an inline function on the header. - Clear the callback hook in vlapic_handle_EOI. - Introduce a helper to set the callback without injecting a vector. - Remove unneeded parentheses. - Reduce callback table by 16. - Use %pv to print domain/vcpu ID. --- RFC: should callbacks also be executed in vlapic_do_init (which is called by vlapic_reset). We would need to make sure ISR and IRR are cleared using some kind of test and clear atomic functionality to make this race free. --- xen/arch/x86/hvm/vlapic.c | 62 ++++++++++++++++++++++++++++++-- xen/include/asm-x86/hvm/vlapic.h | 18 +++++++++- 2 files changed, 77 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index ae737403f3..38c62a02e6 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -144,7 +144,32 @@ bool vlapic_test_irq(const struct vlapic *vlapic, uint= 8_t vec) return vlapic_test_vector(vec, &vlapic->regs->data[APIC_IRR]); } =20 -void vlapic_set_irq(struct vlapic *vlapic, uint8_t vec, uint8_t trig) +void vlapic_set_callback(struct vlapic *vlapic, unsigned int vec, + vlapic_eoi_callback_t *callback, void *data) +{ + unsigned long flags; + unsigned int index =3D vec - 16; + + if ( !callback || vec < 16 || vec >=3D X86_NR_VECTORS ) + { + ASSERT_UNREACHABLE(); + return; + } + + spin_lock_irqsave(&vlapic->callback_lock, flags); + if ( vlapic->callbacks[index].callback && + vlapic->callbacks[index].callback !=3D callback ) + printk(XENLOG_G_WARNING + "%pv overriding vector %#x callback %ps (%p) with %ps (%p)\= n", + vlapic_vcpu(vlapic), vec, vlapic->callbacks[index].callback, + vlapic->callbacks[index].callback, callback, callback); + vlapic->callbacks[index].callback =3D callback; + vlapic->callbacks[index].data =3D data; + spin_unlock_irqrestore(&vlapic->callback_lock, flags); +} + +void vlapic_set_irq_callback(struct vlapic *vlapic, uint8_t vec, uint8_t t= rig, + vlapic_eoi_callback_t *callback, void *data) { struct vcpu *target =3D vlapic_vcpu(vlapic); =20 @@ -159,8 +184,12 @@ void vlapic_set_irq(struct vlapic *vlapic, uint8_t vec= , uint8_t trig) else vlapic_clear_vector(vec, &vlapic->regs->data[APIC_TMR]); =20 + if ( callback ) + vlapic_set_callback(vlapic, vec, callback, data); + if ( hvm_funcs.update_eoi_exit_bitmap ) - alternative_vcall(hvm_funcs.update_eoi_exit_bitmap, target, vec, t= rig); + alternative_vcall(hvm_funcs.update_eoi_exit_bitmap, target, vec, + trig || callback); =20 if ( hvm_funcs.deliver_posted_intr ) alternative_vcall(hvm_funcs.deliver_posted_intr, target, vec); @@ -459,10 +488,24 @@ void vlapic_EOI_set(struct vlapic *vlapic) =20 void vlapic_handle_EOI(struct vlapic *vlapic, u8 vector) { + vlapic_eoi_callback_t *callback; + void *data; + unsigned long flags; + unsigned int index =3D vector - 16; + if ( vlapic_test_vector(vector, &vlapic->regs->data[APIC_TMR]) ) vioapic_update_EOI(vector); =20 hvm_dpci_msi_eoi(vector); + + spin_lock_irqsave(&vlapic->callback_lock, flags); + callback =3D vlapic->callbacks[index].callback; + vlapic->callbacks[index].callback =3D NULL; + data =3D vlapic->callbacks[index].data; + spin_unlock_irqrestore(&vlapic->callback_lock, flags); + + if ( callback ) + callback(vector, data); } =20 static bool_t is_multicast_dest(struct vlapic *vlapic, unsigned int short_= hand, @@ -1629,9 +1672,23 @@ int vlapic_init(struct vcpu *v) } clear_page(vlapic->regs); =20 + if ( !vlapic->callbacks ) + { + vlapic->callbacks =3D xmalloc_array(typeof(*vlapic->callbacks), + X86_NR_VECTORS - 16); + if ( !vlapic->callbacks ) + { + dprintk(XENLOG_ERR, "%pv: alloc vlapic callbacks error\n", v); + return -ENOMEM; + } + } + memset(vlapic->callbacks, 0, sizeof(*vlapic->callbacks) * + (X86_NR_VECTORS - 16)); + vlapic_reset(vlapic); =20 spin_lock_init(&vlapic->esr_lock); + spin_lock_init(&vlapic->callback_lock); =20 tasklet_init(&vlapic->init_sipi.tasklet, vlapic_init_sipi_action, v); =20 @@ -1653,6 +1710,7 @@ void vlapic_destroy(struct vcpu *v) destroy_periodic_time(&vlapic->pt); unmap_domain_page_global(vlapic->regs); free_domheap_page(vlapic->regs_page); + XFREE(vlapic->callbacks); } =20 /* diff --git a/xen/include/asm-x86/hvm/vlapic.h b/xen/include/asm-x86/hvm/vla= pic.h index 8f908928c3..c380127a71 100644 --- a/xen/include/asm-x86/hvm/vlapic.h +++ b/xen/include/asm-x86/hvm/vlapic.h @@ -73,6 +73,8 @@ #define vlapic_clear_vector(vec, bitmap) \ clear_bit(VEC_POS(vec), (uint32_t *)((bitmap) + REG_POS(vec))) =20 +typedef void vlapic_eoi_callback_t(unsigned int vector, void *data); + struct vlapic { struct hvm_hw_lapic hw; struct hvm_hw_lapic_regs *regs; @@ -89,6 +91,11 @@ struct vlapic { uint32_t icr, dest; struct tasklet tasklet; } init_sipi; + struct { + vlapic_eoi_callback_t *callback; + void *data; + } *callbacks; + spinlock_t callback_lock; }; =20 /* vlapic's frequence is 100 MHz */ @@ -111,7 +118,16 @@ void vlapic_reg_write(struct vcpu *v, unsigned int reg= , uint32_t val); bool_t is_vlapic_lvtpc_enabled(struct vlapic *vlapic); =20 bool vlapic_test_irq(const struct vlapic *vlapic, uint8_t vec); -void vlapic_set_irq(struct vlapic *vlapic, uint8_t vec, uint8_t trig); +void vlapic_set_callback(struct vlapic *vlapic, unsigned int vec, + vlapic_eoi_callback_t *callback, void *data); +void vlapic_set_irq_callback(struct vlapic *vlapic, uint8_t vec, uint8_t t= rig, + vlapic_eoi_callback_t *callback, void *data); + +static inline void vlapic_set_irq(struct vlapic *vlapic, uint8_t vec, + uint8_t trig) +{ + vlapic_set_irq_callback(vlapic, vec, trig, NULL, NULL); +} =20 int vlapic_has_pending_irq(struct vcpu *v); int vlapic_ack_pending_irq(struct vcpu *v, int vector, bool_t force_ack); --=20 2.28.0 From nobody Sat May 4 04:32:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1601462505; cv=none; d=zohomail.com; s=zohoarc; b=DXQIdLIRqHyjimLohopGAnbCqu7UHmPlqJ/StGspJKO8GT3WH5ZPJDK5BOf9ZTxK0GNkmeYQXgA3CzJmV1dwvgEY//0iF0GvGqfLWciE2GT1xL4/NyCKDQnD6l0lz3z1JetqJlXdSYvRHMB4YNeQEK7eryFUWpp6MMYwUA+CYk8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1601462505; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1601462484; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DOoYCUCIJY+vFlpg+nSL1rviBn+NUIR7lMLQ2Z29s3s=; b=M/Uy37wQB2A21MY9vcKe9fSOurTWAFS+aeFIqKbONXKyY9FWrgXaLCNJ 3cFey2DebBJx0+3Tp/3l6kVbWGq0mLtXapbviA94zyXwuDCFR3rJwxK8Z hs8rp/kY6hK7GLSbHdrfOWxQOFFHAyfHvBmHffE3eqatGaP57OvOvdq6J Q=; Authentication-Results: esa3.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: c4EK/t+K8VPBhs5eUFrHDaDOZVzjSOAoUR4J7qTDDFy+kSOSnuiAJGUSe/x02v4spUtIZ24Uz0 icgbJ8TDK9Geaoh+MvJFBKcH1fhavhTOBQc+HelrFUbjQ8jIDwuhnpTwp/5hjbSNzDzul7d/+v CqZT8WLV1DaELWnLIu47OBjmWll8o9ndmBPFZmW+GZOr87YlPNlj2ktN8gFoGxOXwg5gMx86Bl U0D+UCD5+hdR+hqeV3DwLJZ96vdV2YIN+cJnGuY8QG8rBBkxBevIr0Iej5+OuMYx3heHpcJuP/ 5eA= X-SBRS: None X-MesageID: 27927008 X-Ironport-Server: esa3.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.77,322,1596513600"; d="scan'208";a="27927008" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu , Paul Durrant Subject: [PATCH v2 04/11] x86/vmsi: use the newly introduced EOI callbacks Date: Wed, 30 Sep 2020 12:41:01 +0200 Message-ID: <20200930104108.35969-5-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200930104108.35969-1-roger.pau@citrix.com> References: <20200930104108.35969-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) Remove the unconditional call to hvm_dpci_msi_eoi in vlapic_handle_EOI and instead use the newly introduced EOI callback mechanism in order to register a callback for MSI vectors injected from passed through devices. Signed-off-by: Roger Pau Monn=C3=A9 --- xen/arch/x86/hvm/vlapic.c | 2 -- xen/arch/x86/hvm/vmsi.c | 36 ++++++++++++++++++++++-------------- xen/drivers/passthrough/io.c | 2 +- xen/include/asm-x86/hvm/io.h | 2 +- 4 files changed, 24 insertions(+), 18 deletions(-) diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 38c62a02e6..8a18b33428 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -496,8 +496,6 @@ void vlapic_handle_EOI(struct vlapic *vlapic, u8 vector) if ( vlapic_test_vector(vector, &vlapic->regs->data[APIC_TMR]) ) vioapic_update_EOI(vector); =20 - hvm_dpci_msi_eoi(vector); - spin_lock_irqsave(&vlapic->callback_lock, flags); callback =3D vlapic->callbacks[index].callback; vlapic->callbacks[index].callback =3D NULL; diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 7ca19353ab..e192c4c6da 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -44,11 +44,9 @@ #include #include =20 -static void vmsi_inj_irq( - struct vlapic *target, - uint8_t vector, - uint8_t trig_mode, - uint8_t delivery_mode) +static void vmsi_inj_irq(struct vlapic *target, uint8_t vector, + uint8_t trig_mode, uint8_t delivery_mode, + vlapic_eoi_callback_t *callback, void *data) { HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "vmsi_inj_irq: vec %02x trig %d dm %d\n", vector, trig_mode, delivery_mode); @@ -57,17 +55,17 @@ static void vmsi_inj_irq( { case dest_Fixed: case dest_LowestPrio: - vlapic_set_irq(target, vector, trig_mode); + vlapic_set_irq_callback(target, vector, trig_mode, callback, data); break; default: BUG(); } } =20 -int vmsi_deliver( - struct domain *d, int vector, - uint8_t dest, uint8_t dest_mode, - uint8_t delivery_mode, uint8_t trig_mode) +static int vmsi_deliver_callback(struct domain *d, int vector, uint8_t des= t, + uint8_t dest_mode, uint8_t delivery_mode, + uint8_t trig_mode, + vlapic_eoi_callback_t *callback, void *da= ta) { struct vlapic *target; struct vcpu *v; @@ -78,7 +76,8 @@ int vmsi_deliver( target =3D vlapic_lowest_prio(d, NULL, 0, dest, dest_mode); if ( target !=3D NULL ) { - vmsi_inj_irq(target, vector, trig_mode, delivery_mode); + vmsi_inj_irq(target, vector, trig_mode, delivery_mode, callbac= k, + data); break; } HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "null MSI round robin: vector=3D%02x= \n", @@ -89,8 +88,8 @@ int vmsi_deliver( for_each_vcpu ( d, v ) if ( vlapic_match_dest(vcpu_vlapic(v), NULL, 0, dest, dest_mode) ) - vmsi_inj_irq(vcpu_vlapic(v), vector, - trig_mode, delivery_mode); + vmsi_inj_irq(vcpu_vlapic(v), vector, trig_mode, delivery_m= ode, + callback, data); break; =20 default: @@ -103,6 +102,14 @@ int vmsi_deliver( return 0; } =20 + +int vmsi_deliver(struct domain *d, int vector, uint8_t dest, uint8_t dest_= mode, + uint8_t delivery_mode, uint8_t trig_mode) +{ + return vmsi_deliver_callback(d, vector, dest, dest_mode, delivery_mode, + trig_mode, NULL, NULL); +} + void vmsi_deliver_pirq(struct domain *d, const struct hvm_pirq_dpci *pirq_= dpci) { uint32_t flags =3D pirq_dpci->gmsi.gflags; @@ -119,7 +126,8 @@ void vmsi_deliver_pirq(struct domain *d, const struct h= vm_pirq_dpci *pirq_dpci) =20 ASSERT(pirq_dpci->flags & HVM_IRQ_DPCI_GUEST_MSI); =20 - vmsi_deliver(d, vector, dest, dest_mode, delivery_mode, trig_mode); + vmsi_deliver_callback(d, vector, dest, dest_mode, delivery_mode, trig_= mode, + hvm_dpci_msi_eoi, NULL); } =20 /* Return value, -1 : multi-dests, non-negative value: dest_vcpu_id */ diff --git a/xen/drivers/passthrough/io.c b/xen/drivers/passthrough/io.c index 536e91ad76..bff0f6628a 100644 --- a/xen/drivers/passthrough/io.c +++ b/xen/drivers/passthrough/io.c @@ -874,7 +874,7 @@ static int _hvm_dpci_msi_eoi(struct domain *d, return 0; } =20 -void hvm_dpci_msi_eoi(unsigned int vector) +void hvm_dpci_msi_eoi(unsigned int vector, void *data) { struct domain *d =3D current->domain; =20 diff --git a/xen/include/asm-x86/hvm/io.h b/xen/include/asm-x86/hvm/io.h index b05f619435..759ee486af 100644 --- a/xen/include/asm-x86/hvm/io.h +++ b/xen/include/asm-x86/hvm/io.h @@ -158,7 +158,7 @@ struct hvm_hw_stdvga { void stdvga_init(struct domain *d); void stdvga_deinit(struct domain *d); =20 -extern void hvm_dpci_msi_eoi(unsigned int vector); +void hvm_dpci_msi_eoi(unsigned int vector, void *data); =20 /* Decode a PCI port IO access into a bus/slot/func/reg. */ unsigned int hvm_pci_decode_addr(unsigned int cf8, unsigned int addr, --=20 2.28.0 From nobody Sat May 4 04:32:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; 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a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1601462486; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9kBBlKUOnFSovScUXA31eNkc28ns/2tqeO6kHQVGijE=; b=GaV+V2faWRXBdmwit/4/WQpOzUHomVdkNicdqivHrs7P2fTyECrXBmFW Yq0QBKTf8A7xQfdbb+WrwIOSjNFHEohVI4uri91Zu0PXc3P5SmMtgnV0H HJnhycwHixIweyV+DuCl7Pjq1tP3UdVXjaBQm7lz4Tswxsi+Dq40mlhdM k=; Authentication-Results: esa1.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: vtRqDyWjDSJ3VkIBlJVb+KLRdjJb9Ayqc49eCg1d6odZAYLTiSsUVf31yDC25L5f+wCepjKssY J9eHNcdgZkXTlEGPotHY6MkCLv81n8MeHF4bCm70+JfJjgmfDEyyZX9Jg/AV+0cm1C+W75/obI phaulJACStAaG1GX5qDf1xEJRcq7NlquS8ryfjmlMRWaOQvIvgKgJ34JcMxZsG/E5sdlVqU6/P ZBCmXE6iw7/J3JxAexnK+YdDY4xa7o6qbOG/YYb+QNGZ5IqUgiAA9XeETuHOiIhodoG1HkfkV8 5ys= X-SBRS: None X-MesageID: 28283487 X-Ironport-Server: esa1.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.77,322,1596513600"; d="scan'208";a="28283487" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu Subject: [PATCH v2 05/11] x86/vioapic: switch to use the EOI callback mechanism Date: Wed, 30 Sep 2020 12:41:02 +0200 Message-ID: <20200930104108.35969-6-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200930104108.35969-1-roger.pau@citrix.com> References: <20200930104108.35969-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) Switch the emulated IO-APIC code to use the local APIC EOI callback mechanism. This allows to remove the last hardcoded callback from vlapic_handle_EOI. Removing the hardcoded vIO-APIC callback also allows to getting rid of setting the EOI exit bitmap based on the triggering mode, as now all users that require an EOI action use the newly introduced callback mechanism. Move and rename the vioapic_update_EOI now that it can be made static. Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v1: - Remove the triggering check in the update_eoi_exit_bitmap call. - Register the vlapic callbacks when loading the vIO-APIC state. - Reduce scope of ent. --- xen/arch/x86/hvm/vioapic.c | 131 ++++++++++++++++++++++++------------- xen/arch/x86/hvm/vlapic.c | 5 +- 2 files changed, 86 insertions(+), 50 deletions(-) diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index 752fc410db..dce98b1479 100644 --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -375,6 +375,50 @@ static const struct hvm_mmio_ops vioapic_mmio_ops =3D { .write =3D vioapic_write }; =20 +static void eoi_callback(unsigned int vector, void *data) +{ + struct domain *d =3D current->domain; + struct hvm_irq *hvm_irq =3D hvm_domain_irq(d); + unsigned int i; + + ASSERT(has_vioapic(d)); + + spin_lock(&d->arch.hvm.irq_lock); + + for ( i =3D 0; i < d->arch.hvm.nr_vioapics; i++ ) + { + struct hvm_vioapic *vioapic =3D domain_vioapic(d, i); + unsigned int pin; + + for ( pin =3D 0; pin < vioapic->nr_pins; pin++ ) + { + union vioapic_redir_entry *ent =3D &vioapic->redirtbl[pin]; + + if ( ent->fields.vector !=3D vector ) + continue; + + ent->fields.remote_irr =3D 0; + + if ( is_iommu_enabled(d) ) + { + spin_unlock(&d->arch.hvm.irq_lock); + hvm_dpci_eoi(vioapic->base_gsi + pin, ent); + spin_lock(&d->arch.hvm.irq_lock); + } + + if ( (ent->fields.trig_mode =3D=3D VIOAPIC_LEVEL_TRIG) && + !ent->fields.mask && + hvm_irq->gsi_assert_count[vioapic->base_gsi + pin] ) + { + ent->fields.remote_irr =3D 1; + vioapic_deliver(vioapic, pin); + } + } + } + + spin_unlock(&d->arch.hvm.irq_lock); +} + static void ioapic_inj_irq( struct hvm_vioapic *vioapic, struct vlapic *target, @@ -388,7 +432,8 @@ static void ioapic_inj_irq( ASSERT((delivery_mode =3D=3D dest_Fixed) || (delivery_mode =3D=3D dest_LowestPrio)); =20 - vlapic_set_irq(target, vector, trig_mode); + vlapic_set_irq_callback(target, vector, trig_mode, + trig_mode ? eoi_callback : NULL, NULL); } =20 static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin) @@ -495,50 +540,6 @@ void vioapic_irq_positive_edge(struct domain *d, unsig= ned int irq) } } =20 -void vioapic_update_EOI(unsigned int vector) -{ - struct domain *d =3D current->domain; - struct hvm_irq *hvm_irq =3D hvm_domain_irq(d); - union vioapic_redir_entry *ent; - unsigned int i; - - ASSERT(has_vioapic(d)); - - spin_lock(&d->arch.hvm.irq_lock); - - for ( i =3D 0; i < d->arch.hvm.nr_vioapics; i++ ) - { - struct hvm_vioapic *vioapic =3D domain_vioapic(d, i); - unsigned int pin; - - for ( pin =3D 0; pin < vioapic->nr_pins; pin++ ) - { - ent =3D &vioapic->redirtbl[pin]; - if ( ent->fields.vector !=3D vector ) - continue; - - ent->fields.remote_irr =3D 0; - - if ( is_iommu_enabled(d) ) - { - spin_unlock(&d->arch.hvm.irq_lock); - hvm_dpci_eoi(vioapic->base_gsi + pin, ent); - spin_lock(&d->arch.hvm.irq_lock); - } - - if ( (ent->fields.trig_mode =3D=3D VIOAPIC_LEVEL_TRIG) && - !ent->fields.mask && - hvm_irq->gsi_assert_count[vioapic->base_gsi + pin] ) - { - ent->fields.remote_irr =3D 1; - vioapic_deliver(vioapic, pin); - } - } - } - - spin_unlock(&d->arch.hvm.irq_lock); -} - int vioapic_get_mask(const struct domain *d, unsigned int gsi) { unsigned int pin =3D 0; /* See gsi_vioapic */ @@ -592,6 +593,8 @@ static int ioapic_save(struct vcpu *v, hvm_domain_conte= xt_t *h) static int ioapic_load(struct domain *d, hvm_domain_context_t *h) { struct hvm_vioapic *s; + unsigned int i; + int rc; =20 if ( !has_vioapic(d) ) return -ENODEV; @@ -602,7 +605,43 @@ static int ioapic_load(struct domain *d, hvm_domain_co= ntext_t *h) d->arch.hvm.nr_vioapics !=3D 1 ) return -EOPNOTSUPP; =20 - return hvm_load_entry(IOAPIC, h, &s->domU); + rc =3D hvm_load_entry(IOAPIC, h, &s->domU); + if ( rc ) + return rc; + + for ( i =3D 0; i < ARRAY_SIZE(s->domU.redirtbl); i++ ) + { + const union vioapic_redir_entry *ent =3D &s->domU.redirtbl[i]; + unsigned int vector =3D ent->fields.vector; + unsigned int delivery_mode =3D ent->fields.delivery_mode; + struct vcpu *v; + + /* + * Add a callback for each possible vector injected by a redirecti= on + * entry. + */ + if ( vector < 16 || !ent->fields.remote_irr || + (delivery_mode !=3D dest_LowestPrio && delivery_mode !=3D des= t_Fixed) ) + continue; + + for_each_vcpu ( d, v ) + { + struct vlapic *vlapic =3D vcpu_vlapic(v); + + /* + * NB: if the vlapic registers where restored before the vio-a= pic + * ones we could test whether the vector is set in the vlapic = IRR + * or ISR registers before unconditionally setting the callbac= k. + * This is harmless as eoi_callback is capable of dealing with + * spurious callbacks. + */ + if ( vlapic_match_dest(vlapic, NULL, 0, ent->fields.dest_id, + ent->fields.dest_mode) ) + vlapic_set_callback(vlapic, vector, eoi_callback, NULL); + } + } + + return 0; } =20 HVM_REGISTER_SAVE_RESTORE(IOAPIC, ioapic_save, ioapic_load, 1, HVMSR_PER_D= OM); diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 8a18b33428..35f12e0909 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -189,7 +189,7 @@ void vlapic_set_irq_callback(struct vlapic *vlapic, uin= t8_t vec, uint8_t trig, =20 if ( hvm_funcs.update_eoi_exit_bitmap ) alternative_vcall(hvm_funcs.update_eoi_exit_bitmap, target, vec, - trig || callback); + callback); =20 if ( hvm_funcs.deliver_posted_intr ) alternative_vcall(hvm_funcs.deliver_posted_intr, target, vec); @@ -493,9 +493,6 @@ void vlapic_handle_EOI(struct vlapic *vlapic, u8 vector) unsigned long flags; unsigned int index =3D vector - 16; =20 - if ( vlapic_test_vector(vector, &vlapic->regs->data[APIC_TMR]) ) - vioapic_update_EOI(vector); - spin_lock_irqsave(&vlapic->callback_lock, flags); callback =3D vlapic->callbacks[index].callback; vlapic->callbacks[index].callback =3D NULL; --=20 2.28.0 From nobody Sat May 4 04:32:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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Wed, 30 Sep 2020 10:41:28 +0000 (UTC) Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kNZYD-0000iF-TU for xen-devel@lists.xenproject.org; Wed, 30 Sep 2020 10:41:33 +0000 Received: from esa5.hc3370-68.iphmx.com (unknown [216.71.155.168]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id 69106dbb-003e-4fc1-a932-2ff73a249f3c; Wed, 30 Sep 2020 10:41:28 +0000 (UTC) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 69106dbb-003e-4fc1-a932-2ff73a249f3c DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1601462488; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qWWnnw4nKqeB59UsimYiwSnUtGamxVFo5YVY8HDEpeQ=; b=T4rACLpq0FpJ/UEtZTnoTNIwKzwBTR735rQSa42cfuBHTx/R6XkIgSBu Oxmv9KGOQeJ+7TFhmKzWx1dXzZh0L8Bw5hccWWUR8NNANZqdnjrJAyiTt xG5Du7jkraeR+Tdkieg7XyTs78RuyUSkSHMuc1GuP6eXJxsWsRoDKPHQI 8=; Authentication-Results: esa5.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: lkwkuh7J+v051oB/+0af56KTL7Yea/naDIiYCcPuR86KbIp9eHtmePtKTAYzrvtbcPKkSPGcdQ 1eiBowB9EXGOc4MVXf4xe8shBp5ciQF+SVRuel3MvjZ3afQBkK49QpY6qJIofbGTk7Tprql2iN 5V8d9VVMs8bpCQyCzDo3nrCmqS90vhsq+mQooPMgYvv5Zfz+p82CkuWAi2cQRnxnva2uogxbnB xRI4BVZibTawEBFfdMAHNW4Ue/Tvz/z2T1g7tvSnCOD2sD+ViA7uXji54wHAmKNBQldjb0S6hu SOs= X-SBRS: None X-MesageID: 28041979 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.77,322,1596513600"; d="scan'208";a="28041979" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu Subject: [PATCH v2 06/11] x86/hvm: allowing registering EOI callbacks for GSIs Date: Wed, 30 Sep 2020 12:41:03 +0200 Message-ID: <20200930104108.35969-7-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200930104108.35969-1-roger.pau@citrix.com> References: <20200930104108.35969-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) Such callbacks will be executed once a EOI is performed by the guest, regardless of whether the interrupts are injected from the vIO-APIC or the vPIC, as ISA IRQs are translated to GSIs and then the corresponding callback is executed at EOI. The vIO-APIC infrastructure for handling EOIs is build on top of the existing vlapic EOI callback functionality, while the vPIC one is handled when writing to the vPIC EOI register. Note that such callbacks need to be registered and de-registered, and that a single GSI can have multiple callbacks associated. That's because GSIs can be level triggered and shared, as that's the case with legacy PCI interrupts shared between several devices. Strictly speaking this is a non-functional change, since there are no users of this new interface introduced by this change. Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v1: - New in this version. --- xen/arch/x86/hvm/hvm.c | 15 ++++++++- xen/arch/x86/hvm/irq.c | 60 +++++++++++++++++++++++++++++++++++ xen/arch/x86/hvm/vioapic.c | 22 +++++++++---- xen/arch/x86/hvm/vpic.c | 5 +++ xen/include/asm-x86/hvm/irq.h | 20 ++++++++++++ 5 files changed, 114 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 2dfda93e09..9636ac6bf1 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -608,7 +608,7 @@ static int hvm_print_line( =20 int hvm_domain_initialise(struct domain *d) { - unsigned int nr_gsis; + unsigned int nr_gsis, i; int rc; =20 if ( !hvm_enabled ) @@ -655,6 +655,14 @@ int hvm_domain_initialise(struct domain *d) BUILD_BUG_ON(NR_HVM_DOMU_IRQS < NR_ISAIRQS); ASSERT(hvm_domain_irq(d)->nr_gsis >=3D NR_ISAIRQS); =20 + /* Initialize the EOI callback list. */ + hvm_domain_irq(d)->gsi_callbacks =3D xmalloc_array(struct list_head, n= r_gsis); + if ( !hvm_domain_irq(d)->gsi_callbacks ) + goto fail1; + rwlock_init(&hvm_domain_irq(d)->gsi_callbacks_lock); + for ( i =3D 0; i < nr_gsis; i++ ) + INIT_LIST_HEAD(&hvm_domain_irq(d)->gsi_callbacks[i]); + /* need link to containing domain */ d->arch.hvm.pl_time->domain =3D d; =20 @@ -714,6 +722,8 @@ int hvm_domain_initialise(struct domain *d) fail1: if ( is_hardware_domain(d) ) xfree(d->arch.hvm.io_bitmap); + if ( hvm_domain_irq(d) ) + XFREE(hvm_domain_irq(d)->gsi_callbacks); XFREE(d->arch.hvm.io_handler); XFREE(d->arch.hvm.params); XFREE(d->arch.hvm.pl_time); @@ -776,6 +786,9 @@ void hvm_domain_destroy(struct domain *d) vioapic_deinit(d); =20 XFREE(d->arch.hvm.pl_time); + + if ( hvm_domain_irq(d) ) + XFREE(hvm_domain_irq(d)->gsi_callbacks); XFREE(d->arch.hvm.irq); =20 list_for_each_safe ( ioport_list, tmp, &d->arch.hvm.g2m_ioport_list ) diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c index 38ac5fb6c7..aedd390163 100644 --- a/xen/arch/x86/hvm/irq.c +++ b/xen/arch/x86/hvm/irq.c @@ -595,6 +595,66 @@ int hvm_local_events_need_delivery(struct vcpu *v) return !hvm_interrupt_blocked(v, intack); } =20 +int hvm_gsi_register_callback(struct domain *d, unsigned int gsi, + struct hvm_gsi_eoi_callback *cb) +{ + if ( gsi >=3D hvm_domain_irq(d)->nr_gsis ) + { + ASSERT_UNREACHABLE(); + return -EINVAL; + } + + write_lock(&hvm_domain_irq(d)->gsi_callbacks_lock); + list_add(&cb->list, &hvm_domain_irq(d)->gsi_callbacks[gsi]); + write_unlock(&hvm_domain_irq(d)->gsi_callbacks_lock); + + return 0; +} + +void hvm_gsi_unregister_callback(struct domain *d, unsigned int gsi, + struct hvm_gsi_eoi_callback *cb) +{ + struct list_head *tmp; + + if ( gsi >=3D hvm_domain_irq(d)->nr_gsis ) + { + ASSERT_UNREACHABLE(); + return; + } + + write_lock(&hvm_domain_irq(d)->gsi_callbacks_lock); + list_for_each ( tmp, &hvm_domain_irq(d)->gsi_callbacks[gsi] ) + if ( tmp =3D=3D &cb->list ) + { + list_del(tmp); + break; + } + write_unlock(&hvm_domain_irq(d)->gsi_callbacks_lock); +} + +void hvm_gsi_execute_callbacks(unsigned int gsi, void *data) +{ + struct domain *currd =3D current->domain; + struct hvm_gsi_eoi_callback *cb; + + read_lock(&hvm_domain_irq(currd)->gsi_callbacks_lock); + list_for_each_entry ( cb, &hvm_domain_irq(currd)->gsi_callbacks[gsi], + list ) + cb->callback(gsi, cb->data ?: data); + read_unlock(&hvm_domain_irq(currd)->gsi_callbacks_lock); +} + +bool hvm_gsi_has_callbacks(struct domain *d, unsigned int gsi) +{ + bool has_callbacks; + + read_lock(&hvm_domain_irq(d)->gsi_callbacks_lock); + has_callbacks =3D !list_empty(&hvm_domain_irq(d)->gsi_callbacks[gsi]); + read_unlock(&hvm_domain_irq(d)->gsi_callbacks_lock); + + return has_callbacks; +} + static void irq_dump(struct domain *d) { struct hvm_irq *hvm_irq =3D hvm_domain_irq(d); diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index dce98b1479..03b1350c04 100644 --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -393,6 +393,7 @@ static void eoi_callback(unsigned int vector, void *dat= a) for ( pin =3D 0; pin < vioapic->nr_pins; pin++ ) { union vioapic_redir_entry *ent =3D &vioapic->redirtbl[pin]; + unsigned int gsi =3D vioapic->base_gsi + pin; =20 if ( ent->fields.vector !=3D vector ) continue; @@ -402,13 +403,17 @@ static void eoi_callback(unsigned int vector, void *d= ata) if ( is_iommu_enabled(d) ) { spin_unlock(&d->arch.hvm.irq_lock); - hvm_dpci_eoi(vioapic->base_gsi + pin, ent); + hvm_dpci_eoi(gsi, ent); spin_lock(&d->arch.hvm.irq_lock); } =20 + spin_unlock(&d->arch.hvm.irq_lock); + hvm_gsi_execute_callbacks(gsi, ent); + spin_lock(&d->arch.hvm.irq_lock); + if ( (ent->fields.trig_mode =3D=3D VIOAPIC_LEVEL_TRIG) && !ent->fields.mask && - hvm_irq->gsi_assert_count[vioapic->base_gsi + pin] ) + hvm_irq->gsi_assert_count[gsi] ) { ent->fields.remote_irr =3D 1; vioapic_deliver(vioapic, pin); @@ -424,7 +429,8 @@ static void ioapic_inj_irq( struct vlapic *target, uint8_t vector, uint8_t trig_mode, - uint8_t delivery_mode) + uint8_t delivery_mode, + bool callback) { HVM_DBG_LOG(DBG_LEVEL_IOAPIC, "irq %d trig %d deliv %d", vector, trig_mode, delivery_mode); @@ -433,7 +439,7 @@ static void ioapic_inj_irq( (delivery_mode =3D=3D dest_LowestPrio)); =20 vlapic_set_irq_callback(target, vector, trig_mode, - trig_mode ? eoi_callback : NULL, NULL); + callback ? eoi_callback : NULL, NULL); } =20 static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin) @@ -447,6 +453,7 @@ static void vioapic_deliver(struct hvm_vioapic *vioapic= , unsigned int pin) struct vlapic *target; struct vcpu *v; unsigned int irq =3D vioapic->base_gsi + pin; + bool callback =3D trig_mode || hvm_gsi_has_callbacks(d, irq); =20 ASSERT(spin_is_locked(&d->arch.hvm.irq_lock)); =20 @@ -473,7 +480,8 @@ static void vioapic_deliver(struct hvm_vioapic *vioapic= , unsigned int pin) target =3D vlapic_lowest_prio(d, NULL, 0, dest, dest_mode); if ( target !=3D NULL ) { - ioapic_inj_irq(vioapic, target, vector, trig_mode, delivery_mo= de); + ioapic_inj_irq(vioapic, target, vector, trig_mode, delivery_mo= de, + callback); } else { @@ -488,7 +496,7 @@ static void vioapic_deliver(struct hvm_vioapic *vioapic= , unsigned int pin) for_each_vcpu ( d, v ) if ( vlapic_match_dest(vcpu_vlapic(v), NULL, 0, dest, dest_mod= e) ) ioapic_inj_irq(vioapic, vcpu_vlapic(v), vector, trig_mode, - delivery_mode); + delivery_mode, callback); break; =20 case dest_NMI: @@ -620,7 +628,7 @@ static int ioapic_load(struct domain *d, hvm_domain_con= text_t *h) * Add a callback for each possible vector injected by a redirecti= on * entry. */ - if ( vector < 16 || !ent->fields.remote_irr || + if ( vector < 16 || (delivery_mode !=3D dest_LowestPrio && delivery_mode !=3D des= t_Fixed) ) continue; =20 diff --git a/xen/arch/x86/hvm/vpic.c b/xen/arch/x86/hvm/vpic.c index 26f74f4471..09c937c322 100644 --- a/xen/arch/x86/hvm/vpic.c +++ b/xen/arch/x86/hvm/vpic.c @@ -262,9 +262,14 @@ static void vpic_ioport_write( /* Release lock and EOI the physical interrupt (if any). */ vpic_update_int_output(vpic); vpic_unlock(vpic); + + hvm_gsi_execute_callbacks( + hvm_isa_irq_to_gsi((addr >> 7) ? (pin | 8) : pin), + NULL); hvm_dpci_eoi(hvm_isa_irq_to_gsi((addr >> 7) ? (pin | 8) : = pin), NULL); return; /* bail immediately */ + case 6: /* Set Priority */ vpic->priority_add =3D (val + 1) & 7; break; diff --git a/xen/include/asm-x86/hvm/irq.h b/xen/include/asm-x86/hvm/irq.h index 532880d497..db38c3e119 100644 --- a/xen/include/asm-x86/hvm/irq.h +++ b/xen/include/asm-x86/hvm/irq.h @@ -21,6 +21,7 @@ #ifndef __ASM_X86_HVM_IRQ_H__ #define __ASM_X86_HVM_IRQ_H__ =20 +#include #include =20 #include @@ -79,6 +80,10 @@ struct hvm_irq { =20 struct hvm_irq_dpci *dpci; =20 + /* List of callbacks for GSI EOI events. Protected by irq_lock. */ + struct list_head *gsi_callbacks; + rwlock_t gsi_callbacks_lock; + /* * Number of wires asserting each GSI. * @@ -140,6 +145,13 @@ struct hvm_gmsi_info { bool posted; /* directly deliver to guest via VT-d PI? */ }; =20 +typedef void hvm_gsi_eoi_callback_t(unsigned int gsi, void *data); +struct hvm_gsi_eoi_callback { + hvm_gsi_eoi_callback_t *callback; + void *data; + struct list_head list; +}; + struct hvm_girq_dpci_mapping { struct list_head list; uint8_t bus; @@ -230,4 +242,12 @@ void hvm_set_callback_via(struct domain *d, uint64_t v= ia); struct pirq; bool hvm_domain_use_pirq(const struct domain *, const struct pirq *); =20 +int hvm_gsi_register_callback(struct domain *d, unsigned int gsi, + struct hvm_gsi_eoi_callback *cb); +void hvm_gsi_unregister_callback(struct domain *d, unsigned int gsi, + struct hvm_gsi_eoi_callback *cb); +/* data is an opaque blob to pass to the callback if it has no private dat= a. */ +void hvm_gsi_execute_callbacks(unsigned int gsi, void *data); +bool hvm_gsi_has_callbacks(struct domain *d, unsigned int gsi); + #endif /* __ASM_X86_HVM_IRQ_H__ */ --=20 2.28.0 From nobody Sat May 4 04:32:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1601462517; cv=none; d=zohomail.com; s=zohoarc; b=IwIoxUG/n6hASbIeeC1aRad5lXf59fYEn4okAFQ9R3reh3bRLpgRyJ3V03K9YItuODWVEP09YF/SCorwGKeu/a66eG2aK8/5WkBL+kt7/qi8e6iBpy/X+cnWxeuYwQQa7z8ASnRXO/9cleWKiTuamZdbQsZAr0H5PvOK79fi93I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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Authentication-Results: esa3.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: FuJee6easIHdYzXWuN2ZL2b/VBPSAV3wYWmQf8lfWUlWHEGX1UUSRmPVvyeJzlQJgKNVJz4UGX RcWSrSHaybpC4S8UxqNh6C3XJCS2HHiIjtQAXEdfbysD2KU0twToVGL6fy89aC1HWBmCA6t9Jc 4HDbt5NCdExlEAu//ghyb80iwfOrCS/SG9PA6vqU9e77X9TNrw1t3+b/K1AtQBCGFa1BbHQn2t WUvgC21JUbOAFDe+jEixexjV+ahzIaD/pAMyQQlIm/wjzONuG1MpaeNIl1K5jThl07YpXpHVBj jdc= X-SBRS: None X-MesageID: 27927012 X-Ironport-Server: esa3.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.77,322,1596513600"; d="scan'208";a="27927012" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Paul Durrant Subject: [PATCH v2 07/11] x86/dpci: move code Date: Wed, 30 Sep 2020 12:41:04 +0200 Message-ID: <20200930104108.35969-8-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200930104108.35969-1-roger.pau@citrix.com> References: <20200930104108.35969-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) This is code movement in order to simply further changes. No functional change intended. Signed-off-by: Roger Pau Monn=C3=A9 Acked-by: Jan Beulich --- Changes since v1: - New in this version. --- xen/drivers/passthrough/io.c | 172 +++++++++++++++++------------------ 1 file changed, 86 insertions(+), 86 deletions(-) diff --git a/xen/drivers/passthrough/io.c b/xen/drivers/passthrough/io.c index bff0f6628a..770a5cce6b 100644 --- a/xen/drivers/passthrough/io.c +++ b/xen/drivers/passthrough/io.c @@ -276,6 +276,92 @@ static struct vcpu *vector_hashing_dest(const struct d= omain *d, return dest; } =20 +static void hvm_pirq_eoi(struct pirq *pirq, + const union vioapic_redir_entry *ent) +{ + struct hvm_pirq_dpci *pirq_dpci; + + if ( !pirq ) + { + ASSERT_UNREACHABLE(); + return; + } + + pirq_dpci =3D pirq_dpci(pirq); + + /* + * No need to get vector lock for timer + * since interrupt is still not EOIed + */ + if ( --pirq_dpci->pending || + (ent && ent->fields.mask) || + !pt_irq_need_timer(pirq_dpci->flags) ) + return; + + stop_timer(&pirq_dpci->timer); + pirq_guest_eoi(pirq); +} + +static void __hvm_dpci_eoi(struct domain *d, + const struct hvm_girq_dpci_mapping *girq, + const union vioapic_redir_entry *ent) +{ + struct pirq *pirq =3D pirq_info(d, girq->machine_gsi); + + if ( !hvm_domain_use_pirq(d, pirq) ) + hvm_pci_intx_deassert(d, girq->device, girq->intx); + + hvm_pirq_eoi(pirq, ent); +} + +static void hvm_gsi_eoi(struct domain *d, unsigned int gsi, + const union vioapic_redir_entry *ent) +{ + struct pirq *pirq =3D pirq_info(d, gsi); + + /* Check if GSI is actually mapped. */ + if ( !pirq_dpci(pirq) ) + return; + + hvm_gsi_deassert(d, gsi); + hvm_pirq_eoi(pirq, ent); +} + +void hvm_dpci_eoi(unsigned int guest_gsi, const union vioapic_redir_entry = *ent) +{ + struct domain *d =3D current->domain; + const struct hvm_irq_dpci *hvm_irq_dpci; + const struct hvm_girq_dpci_mapping *girq; + + if ( !is_iommu_enabled(d) ) + return; + + if ( is_hardware_domain(d) ) + { + spin_lock(&d->event_lock); + hvm_gsi_eoi(d, guest_gsi, ent); + goto unlock; + } + + if ( guest_gsi < NR_ISAIRQS ) + { + hvm_dpci_isairq_eoi(d, guest_gsi); + return; + } + + spin_lock(&d->event_lock); + hvm_irq_dpci =3D domain_get_irq_dpci(d); + + if ( !hvm_irq_dpci ) + goto unlock; + + list_for_each_entry ( girq, &hvm_irq_dpci->girq[guest_gsi], list ) + __hvm_dpci_eoi(d, girq, ent); + +unlock: + spin_unlock(&d->event_lock); +} + int pt_irq_create_bind( struct domain *d, const struct xen_domctl_bind_pt_irq *pt_irq_bind) { @@ -952,92 +1038,6 @@ static void hvm_dirq_assist(struct domain *d, struct = hvm_pirq_dpci *pirq_dpci) spin_unlock(&d->event_lock); } =20 -static void hvm_pirq_eoi(struct pirq *pirq, - const union vioapic_redir_entry *ent) -{ - struct hvm_pirq_dpci *pirq_dpci; - - if ( !pirq ) - { - ASSERT_UNREACHABLE(); - return; - } - - pirq_dpci =3D pirq_dpci(pirq); - - /* - * No need to get vector lock for timer - * since interrupt is still not EOIed - */ - if ( --pirq_dpci->pending || - (ent && ent->fields.mask) || - !pt_irq_need_timer(pirq_dpci->flags) ) - return; - - stop_timer(&pirq_dpci->timer); - pirq_guest_eoi(pirq); -} - -static void __hvm_dpci_eoi(struct domain *d, - const struct hvm_girq_dpci_mapping *girq, - const union vioapic_redir_entry *ent) -{ - struct pirq *pirq =3D pirq_info(d, girq->machine_gsi); - - if ( !hvm_domain_use_pirq(d, pirq) ) - hvm_pci_intx_deassert(d, girq->device, girq->intx); - - hvm_pirq_eoi(pirq, ent); -} - -static void hvm_gsi_eoi(struct domain *d, unsigned int gsi, - const union vioapic_redir_entry *ent) -{ - struct pirq *pirq =3D pirq_info(d, gsi); - - /* Check if GSI is actually mapped. */ - if ( !pirq_dpci(pirq) ) - return; - - hvm_gsi_deassert(d, gsi); - hvm_pirq_eoi(pirq, ent); -} - -void hvm_dpci_eoi(unsigned int guest_gsi, const union vioapic_redir_entry = *ent) -{ - struct domain *d =3D current->domain; - const struct hvm_irq_dpci *hvm_irq_dpci; - const struct hvm_girq_dpci_mapping *girq; - - if ( !is_iommu_enabled(d) ) - return; - - if ( is_hardware_domain(d) ) - { - spin_lock(&d->event_lock); - hvm_gsi_eoi(d, guest_gsi, ent); - goto unlock; - } - - if ( guest_gsi < NR_ISAIRQS ) - { - hvm_dpci_isairq_eoi(d, guest_gsi); - return; - } - - spin_lock(&d->event_lock); - hvm_irq_dpci =3D domain_get_irq_dpci(d); - - if ( !hvm_irq_dpci ) - goto unlock; - - list_for_each_entry ( girq, &hvm_irq_dpci->girq[guest_gsi], list ) - __hvm_dpci_eoi(d, girq, ent); - -unlock: - spin_unlock(&d->event_lock); -} - /* * Note: 'pt_pirq_softirq_reset' can clear the STATE_SCHED before we get to * doing it. If that is the case we let 'pt_pirq_softirq_reset' do ref-cou= nting. --=20 2.28.0 From nobody Sat May 4 04:32:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1601462519; cv=none; d=zohomail.com; s=zohoarc; b=HX6VN1fgsX7QRnKJ2FZEkfD3MGYkkBzl99vAgSzTi+bxF8TMVGanpE45tjn975fRpE/3TamsLMgPZMD+apaf2j0wmlBoVMOOygMeldD+ZJMm498MW97f43f58/V6+96c9mrqhE7B4gAfFXXaOpoJ99kkPstGs+Mxb8NhBMxyodA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1601462519; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1601462491; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JIoT3R0CK2KnQJuWyOhX8m7nC6Gtx138LXoxJJO92Vk=; b=WJkHvc/eBSt4+LCyoZAavBYdPhhxWm11Y9KC5U05WQgl9It4g6n8yZ/c 3IQTTroog/QzX01weYHvU90yxh1uC+KT/Z3A3K0ypzz/7JCZ/MVGQsu/L nXP7GiwzaWaWtM9ngqi0X3K2bNWSmWJr5wpDZD1W6v8Sr/YOBRtW6wNol w=; Authentication-Results: esa3.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: OGzsdGGit/gwXLAzmOo0k5+XX7s+vLXu3Ct4cqCVMywXmwlq9MUCan27KHP3gFnoNau46WkQGb kKwffjuHXyrnAe5oFu9VXTWc6v65tVzeIZll5N++DEJbOsVbMzk5lRJ4xrTexhD34phDzoACW2 Suju+EkrvgIw00apUC+otwYDkE1y9mr1q4qoPlPsLzIVx2oVpIli/+/2RKA45DF47mH4n9dAV8 rp8xDAKN+r7OrvBHuBl8XXhMexlib2aOq3qZTZbshwQ/ILJhJWF89Gs0sh/cfT1VazM38pwRKD A90= X-SBRS: None X-MesageID: 27927013 X-Ironport-Server: esa3.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.77,322,1596513600"; d="scan'208";a="27927013" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu , Paul Durrant Subject: [PATCH v2 08/11] x86/dpci: switch to use a GSI EOI callback Date: Wed, 30 Sep 2020 12:41:05 +0200 Message-ID: <20200930104108.35969-9-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200930104108.35969-1-roger.pau@citrix.com> References: <20200930104108.35969-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) Switch the dpci GSI EOI callback hooks to use the newly introduced generic callback functionality, and remove the custom dpci calls found on the vPIC and vIO-APIC implementations. Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v1: - New in this version. --- xen/arch/x86/hvm/vioapic.c | 7 ------ xen/arch/x86/hvm/vpic.c | 2 -- xen/drivers/passthrough/io.c | 41 ++++++++++++++++++++++++++++++++--- xen/include/asm-x86/hvm/io.h | 1 - xen/include/asm-x86/hvm/irq.h | 1 + 5 files changed, 39 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index 03b1350c04..ea4d60d33e 100644 --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -400,13 +400,6 @@ static void eoi_callback(unsigned int vector, void *da= ta) =20 ent->fields.remote_irr =3D 0; =20 - if ( is_iommu_enabled(d) ) - { - spin_unlock(&d->arch.hvm.irq_lock); - hvm_dpci_eoi(gsi, ent); - spin_lock(&d->arch.hvm.irq_lock); - } - spin_unlock(&d->arch.hvm.irq_lock); hvm_gsi_execute_callbacks(gsi, ent); spin_lock(&d->arch.hvm.irq_lock); diff --git a/xen/arch/x86/hvm/vpic.c b/xen/arch/x86/hvm/vpic.c index 09c937c322..3c01c638fa 100644 --- a/xen/arch/x86/hvm/vpic.c +++ b/xen/arch/x86/hvm/vpic.c @@ -266,8 +266,6 @@ static void vpic_ioport_write( hvm_gsi_execute_callbacks( hvm_isa_irq_to_gsi((addr >> 7) ? (pin | 8) : pin), NULL); - hvm_dpci_eoi(hvm_isa_irq_to_gsi((addr >> 7) ? (pin | 8) : = pin), - NULL); return; /* bail immediately */ =20 case 6: /* Set Priority */ diff --git a/xen/drivers/passthrough/io.c b/xen/drivers/passthrough/io.c index 770a5cce6b..6908438a94 100644 --- a/xen/drivers/passthrough/io.c +++ b/xen/drivers/passthrough/io.c @@ -327,9 +327,10 @@ static void hvm_gsi_eoi(struct domain *d, unsigned int= gsi, hvm_pirq_eoi(pirq, ent); } =20 -void hvm_dpci_eoi(unsigned int guest_gsi, const union vioapic_redir_entry = *ent) +static void dpci_eoi(unsigned int guest_gsi, void *data) { struct domain *d =3D current->domain; + const union vioapic_redir_entry *ent =3D data; const struct hvm_irq_dpci *hvm_irq_dpci; const struct hvm_girq_dpci_mapping *girq; =20 @@ -565,7 +566,7 @@ int pt_irq_create_bind( unsigned int link; =20 digl =3D xmalloc(struct dev_intx_gsi_link); - girq =3D xmalloc(struct hvm_girq_dpci_mapping); + girq =3D xzalloc(struct hvm_girq_dpci_mapping); =20 if ( !digl || !girq ) { @@ -578,11 +579,22 @@ int pt_irq_create_bind( girq->bus =3D digl->bus =3D pt_irq_bind->u.pci.bus; girq->device =3D digl->device =3D pt_irq_bind->u.pci.device; girq->intx =3D digl->intx =3D pt_irq_bind->u.pci.intx; - list_add_tail(&digl->list, &pirq_dpci->digl_list); + girq->cb.callback =3D dpci_eoi; =20 guest_gsi =3D hvm_pci_intx_gsi(digl->device, digl->intx); link =3D hvm_pci_intx_link(digl->device, digl->intx); =20 + rc =3D hvm_gsi_register_callback(d, guest_gsi, &girq->cb); + if ( rc ) + { + spin_unlock(&d->event_lock); + xfree(girq); + xfree(digl); + return rc; + } + + list_add_tail(&digl->list, &pirq_dpci->digl_list); + hvm_irq_dpci->link_cnt[link]++; =20 girq->machine_gsi =3D pirq; @@ -590,8 +602,17 @@ int pt_irq_create_bind( } else { + struct hvm_gsi_eoi_callback *cb =3D + xzalloc(struct hvm_gsi_eoi_callback); + ASSERT(is_hardware_domain(d)); =20 + if ( !cb ) + { + spin_unlock(&d->event_lock); + return -ENOMEM; + } + /* MSI_TRANSLATE is not supported for the hardware domain. */ if ( pt_irq_bind->irq_type !=3D PT_IRQ_TYPE_PCI || pirq >=3D hvm_domain_irq(d)->nr_gsis ) @@ -601,6 +622,19 @@ int pt_irq_create_bind( return -EINVAL; } guest_gsi =3D pirq; + + cb->callback =3D dpci_eoi; + /* + * IRQ binds created for the hardware domain are never destroy= ed, + * so it's fine to not keep a reference to cb here. + */ + rc =3D hvm_gsi_register_callback(d, guest_gsi, cb); + if ( rc ) + { + spin_unlock(&d->event_lock); + xfree(cb); + return rc; + } } =20 /* Bind the same mirq once in the same domain */ @@ -789,6 +823,7 @@ int pt_irq_destroy_bind( girq->machine_gsi =3D=3D machine_gsi ) { list_del(&girq->list); + hvm_gsi_unregister_callback(d, guest_gsi, &girq->cb); xfree(girq); girq =3D NULL; break; diff --git a/xen/include/asm-x86/hvm/io.h b/xen/include/asm-x86/hvm/io.h index 759ee486af..e1bc556613 100644 --- a/xen/include/asm-x86/hvm/io.h +++ b/xen/include/asm-x86/hvm/io.h @@ -118,7 +118,6 @@ bool handle_mmio_with_translation(unsigned long gla, un= signed long gpfn, struct npfec); bool handle_pio(uint16_t port, unsigned int size, int dir); void hvm_interrupt_post(struct vcpu *v, int vector, int type); -void hvm_dpci_eoi(unsigned int guest_irq, const union vioapic_redir_entry = *ent); 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Authentication-Results: esa4.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: NjV7scSq3YsOUudpATyOV3iABqMLAICASCxGpBBrHImuyOzsZuGn7Fc4RgAPm9TV+j83A15tnD YlTDWolI1nVT6RmtPj6U4Or0srhig5B4ZpmfxUJ1WnoCspWA1Gi9H8vE+v2SyC1lN/S9JotGv4 ToOyEBL9LfTZWZqVLrGX9y5y4vhkt7oMpRCMymiqSw8a2P0MmPGSY92lKjzK4f+6IiJksxWti9 jT3kNT+ZlM4mzTbM824k6lc41L/4zplF3jxjnw5zpdKMmqyhVpakomT4ogbUjUQx+iDDxaJNF4 zmM= X-SBRS: None X-MesageID: 28960245 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.77,322,1596513600"; d="scan'208";a="28960245" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu , Jun Nakajima , Kevin Tian Subject: [PATCH v2 09/11] x86/vpt: switch interrupt injection model Date: Wed, 30 Sep 2020 12:41:06 +0200 Message-ID: <20200930104108.35969-10-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200930104108.35969-1-roger.pau@citrix.com> References: <20200930104108.35969-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) Currently vPT relies on timers being assigned to a vCPU and performing checks on every return to HVM guest in order to check if an interrupt from a vPT timer assigned to the vCPU is currently being injected. This model doesn't work properly since the interrupt destination vCPU of a vPT timer can be different from the vCPU where the timer is currently assigned, in which case the timer would get stuck because it never sees the interrupt as being injected. Knowing when a vPT interrupt is injected is relevant for the guest timer modes where missed vPT interrupts are not discarded and instead are accumulated and injected when possible. This change aims to modify the logic described above, so that vPT doesn't need to check on every return to HVM guest if a vPT interrupt is being injected. In order to achieve this the vPT code is modified to make use of the new EOI callbacks, so that virtual timers can detect when a interrupt has been serviced by the guest by waiting for the EOI callback to execute. This model also simplifies some of the logic, as when executing the timer EOI callback Xen can try to inject another interrupt if the timer has interrupts pending for delivery. Note that timers are still bound to a vCPU for the time being, this relation however doesn't limit the interrupt destination anymore, and will be removed by further patches. This model has been tested with Windows 7 guests without showing any timer delay, even when the guest was limited to have very little CPU capacity and pending virtual timer interrupts accumulate. Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v1: - New in this version. --- Sorry, this is a big change, but I'm having issues splitting it into smaller pieces as the functionality needs to be changed in one go, or else timers would be broken. If this approach seems sensible I can try to split it up. --- xen/arch/x86/hvm/svm/intr.c | 3 - xen/arch/x86/hvm/vmx/intr.c | 59 ------ xen/arch/x86/hvm/vpt.c | 326 ++++++++++++++-------------------- xen/include/asm-x86/hvm/vpt.h | 5 +- 4 files changed, 135 insertions(+), 258 deletions(-) diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 7f815d2307..2ee2332253 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -146,8 +146,6 @@ void svm_intr_assist(void) return; =20 /* Crank the handle on interrupt state. */ - pt_update_irq(v); - do { intack =3D hvm_vcpu_has_pending_irq(v); if ( likely(intack.source =3D=3D hvm_intsrc_none) ) @@ -219,7 +217,6 @@ void svm_intr_assist(void) { HVMTRACE_2D(INJ_VIRQ, intack.vector, /*fake=3D*/ 0); svm_inject_extint(v, intack.vector); - pt_intr_post(v, intack); } =20 /* Is there another IRQ to queue up behind this one? */ diff --git a/xen/arch/x86/hvm/vmx/intr.c b/xen/arch/x86/hvm/vmx/intr.c index 80bfbb4787..3fcc7073db 100644 --- a/xen/arch/x86/hvm/vmx/intr.c +++ b/xen/arch/x86/hvm/vmx/intr.c @@ -203,7 +203,6 @@ static int nvmx_intr_intercept(struct vcpu *v, struct h= vm_intack intack) { /* for now, duplicate the ack path in vmx_intr_assist */ hvm_vcpu_ack_pending_irq(v, intack); - pt_intr_post(v, intack); =20 intack =3D hvm_vcpu_has_pending_irq(v); if ( unlikely(intack.source !=3D hvm_intsrc_none) ) @@ -242,7 +241,6 @@ void vmx_intr_assist(void) struct vcpu *v =3D current; unsigned int tpr_threshold =3D 0; enum hvm_intblk intblk; - int pt_vector; =20 /* Block event injection when single step with MTF. */ if ( unlikely(v->arch.hvm.single_step) ) @@ -263,8 +261,6 @@ void vmx_intr_assist(void) #endif =20 /* Crank the handle on interrupt state. */ - pt_vector =3D pt_update_irq(v); - do { unsigned long intr_info; =20 @@ -337,58 +333,6 @@ void vmx_intr_assist(void) { unsigned long status; =20 - /* - * intack.vector is the highest priority vector. So we set eoi_exit= _bitmap - * for intack.vector - give a chance to post periodic time interrup= ts when - * periodic time interrupts become the highest one - */ - if ( pt_vector !=3D -1 ) - { -#ifndef NDEBUG - /* - * We assert that intack.vector is the highest priority vector= for - * only an interrupt from vlapic can reach this point and the - * highest vector is chosen in hvm_vcpu_has_pending_irq(). - * But, in fact, the assertion failed sometimes. It is suspect= ed - * that PIR is not synced to vIRR which makes pt_vector is lef= t in - * PIR. In order to verify this suspicion, dump some informati= on - * when the assertion fails. - */ - if ( unlikely(intack.vector < pt_vector) ) - { - const struct vlapic *vlapic; - const struct pi_desc *pi_desc; - const uint32_t *word; - unsigned int i; - - printk(XENLOG_ERR "%pv: intack: %u:%02x pt: %02x\n", - current, intack.source, intack.vector, pt_vector); - - vlapic =3D vcpu_vlapic(v); - if ( vlapic && vlapic->regs ) - { - word =3D (const void *)&vlapic->regs->data[APIC_IRR]; - printk(XENLOG_ERR "vIRR:"); - for ( i =3D X86_NR_VECTORS / 32; i-- ; ) - printk(" %08x", word[i*4]); - printk("\n"); - } - - pi_desc =3D &v->arch.hvm.vmx.pi_desc; - if ( pi_desc ) - { - word =3D (const void *)&pi_desc->pir; - printk(XENLOG_ERR " PIR:"); - for ( i =3D X86_NR_VECTORS / 32; i-- ; ) - printk(" %08x", word[i]); - printk("\n"); - } - } -#endif - ASSERT(intack.vector >=3D pt_vector); - vmx_set_eoi_exit_bitmap(v, intack.vector); - } - /* we need update the RVI field */ __vmread(GUEST_INTR_STATUS, &status); status &=3D ~VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK; @@ -397,14 +341,11 @@ void vmx_intr_assist(void) __vmwrite(GUEST_INTR_STATUS, status); =20 vmx_sync_exit_bitmap(v); - - pt_intr_post(v, intack); } else { HVMTRACE_2D(INJ_VIRQ, intack.vector, /*fake=3D*/ 0); vmx_inject_extint(intack.vector, intack.source); - pt_intr_post(v, intack); } =20 /* Is there another IRQ to queue up behind this one? */ diff --git a/xen/arch/x86/hvm/vpt.c b/xen/arch/x86/hvm/vpt.c index 867deb4da5..787931d7bb 100644 --- a/xen/arch/x86/hvm/vpt.c +++ b/xen/arch/x86/hvm/vpt.c @@ -27,6 +27,8 @@ #define mode_is(d, name) \ ((d)->arch.hvm.params[HVM_PARAM_TIMER_MODE] =3D=3D HVMPTM_##name) =20 +static bool inject_interrupt(struct periodic_time *pt); + void hvm_init_guest_time(struct domain *d) { struct pl_time *pl =3D d->arch.hvm.pl_time; @@ -76,35 +78,6 @@ void hvm_set_guest_time(struct vcpu *v, u64 guest_time) } } =20 -static int pt_irq_vector(struct periodic_time *pt, enum hvm_intsrc src) -{ - struct vcpu *v =3D pt->vcpu; - unsigned int gsi, isa_irq; - int vector; - - if ( pt->source =3D=3D PTSRC_lapic ) - return pt->irq; - - isa_irq =3D pt->irq; - - if ( src =3D=3D hvm_intsrc_pic ) - return (v->domain->arch.hvm.vpic[isa_irq >> 3].irq_base - + (isa_irq & 7)); - - ASSERT(src =3D=3D hvm_intsrc_lapic); - gsi =3D pt->source =3D=3D PTSRC_isa ? hvm_isa_irq_to_gsi(isa_irq) : pt= ->irq; - vector =3D vioapic_get_vector(v->domain, gsi); - if ( vector < 0 ) - { - dprintk(XENLOG_WARNING, "d%u: invalid GSI (%u) for platform timer\= n", - v->domain->domain_id, gsi); - domain_crash(v->domain); - return -1; - } - - return vector; -} - static int pt_irq_masked(struct periodic_time *pt) { struct vcpu *v =3D pt->vcpu; @@ -247,34 +220,14 @@ void pt_restore_timer(struct vcpu *v) pt_vcpu_lock(v); =20 list_for_each_entry ( pt, head, list ) - { if ( pt->pending_intr_nr =3D=3D 0 ) - { - pt_process_missed_ticks(pt); set_timer(&pt->timer, pt->scheduled); - } - } =20 pt_thaw_time(v); =20 pt_vcpu_unlock(v); } =20 -static void pt_timer_fn(void *data) -{ - struct periodic_time *pt =3D data; - - pt_lock(pt); - - pt->pending_intr_nr++; - pt->scheduled +=3D pt->period; - pt->do_not_freeze =3D 0; - - vcpu_kick(pt->vcpu); - - pt_unlock(pt); -} - static void pt_irq_fired(struct vcpu *v, struct periodic_time *pt) { pt->irq_issued =3D false; @@ -285,89 +238,108 @@ static void pt_irq_fired(struct vcpu *v, struct peri= odic_time *pt) list_del(&pt->list); pt->on_list =3D false; pt->pending_intr_nr =3D 0; + + return; } - else if ( mode_is(v->domain, one_missed_tick_pending) || - mode_is(v->domain, no_missed_ticks_pending) ) + + if ( mode_is(v->domain, one_missed_tick_pending) || + mode_is(v->domain, no_missed_ticks_pending) ) { - pt->last_plt_gtime =3D hvm_get_guest_time(v); pt_process_missed_ticks(pt); pt->pending_intr_nr =3D 0; /* 'collapse' all missed ticks */ + } + else if ( !pt->pending_intr_nr ) + pt_process_missed_ticks(pt); + + if ( !pt->pending_intr_nr ) set_timer(&pt->timer, pt->scheduled); +} + +static void pt_timer_fn(void *data) +{ + struct periodic_time *pt =3D data; + struct vcpu *v; + time_cb *cb =3D NULL; + void *cb_priv; + unsigned int irq; + + pt_lock(pt); + + v =3D pt->vcpu; + irq =3D pt->irq; + + if ( inject_interrupt(pt) ) + { + pt->scheduled +=3D pt->period; + pt->do_not_freeze =3D 0; + cb =3D pt->cb; + cb_priv =3D pt->priv; } else { - pt->last_plt_gtime +=3D pt->period; - if ( --pt->pending_intr_nr =3D=3D 0 ) - { - pt_process_missed_ticks(pt); - if ( pt->pending_intr_nr =3D=3D 0 ) - set_timer(&pt->timer, pt->scheduled); - } + /* Masked. */ + if ( pt->on_list ) + list_del(&pt->list); + pt->on_list =3D false; + pt->pending_intr_nr++; } =20 - if ( mode_is(v->domain, delay_for_missed_ticks) && - (hvm_get_guest_time(v) < pt->last_plt_gtime) ) - hvm_set_guest_time(v, pt->last_plt_gtime); + pt_unlock(pt); + + if ( cb ) + cb(v, cb_priv); } =20 -int pt_update_irq(struct vcpu *v) +/* + * The same callback is shared between LAPIC and PIC/IO-APIC based timers,= as + * we ignore the first parameter that's different between them. + */ +static void eoi_callback(unsigned int unused, void *data) { - struct list_head *head =3D &v->arch.hvm.tm_list; - struct periodic_time *pt, *temp, *earliest_pt; - uint64_t max_lag; - int irq, pt_vector =3D -1; - bool level; + struct periodic_time *pt =3D data; + struct vcpu *v; + time_cb *cb =3D NULL; + void *cb_priv; =20 - pt_vcpu_lock(v); + pt_lock(pt); =20 - earliest_pt =3D NULL; - max_lag =3D -1ULL; - list_for_each_entry_safe ( pt, temp, head, list ) + pt_irq_fired(pt->vcpu, pt); + if ( pt->pending_intr_nr ) { - if ( pt->pending_intr_nr ) + if ( inject_interrupt(pt) ) + { + pt->pending_intr_nr--; + cb =3D pt->cb; + cb_priv =3D pt->priv; + v =3D pt->vcpu; + } + else { - /* RTC code takes care of disabling the timer itself. */ - if ( (pt->irq !=3D RTC_IRQ || !pt->priv) && pt_irq_masked(pt) = && - /* Level interrupts should be asserted even if masked. */ - !pt->level ) - { - /* suspend timer emulation */ + /* Masked. */ + if ( pt->on_list ) list_del(&pt->list); - pt->on_list =3D 0; - } - else - { - if ( (pt->last_plt_gtime + pt->period) < max_lag ) - { - max_lag =3D pt->last_plt_gtime + pt->period; - earliest_pt =3D pt; - } - } + pt->on_list =3D false; } } =20 - if ( earliest_pt =3D=3D NULL ) - { - pt_vcpu_unlock(v); - return -1; - } + pt_unlock(pt); =20 - earliest_pt->irq_issued =3D 1; - irq =3D earliest_pt->irq; - level =3D earliest_pt->level; + if ( cb !=3D NULL ) + cb(v, cb_priv); +} =20 - pt_vcpu_unlock(v); +static bool inject_interrupt(struct periodic_time *pt) +{ + struct vcpu *v =3D pt->vcpu; + unsigned int irq =3D pt->irq; =20 - switch ( earliest_pt->source ) + if ( pt_irq_masked(pt) ) + return false; + + switch ( pt->source ) { case PTSRC_lapic: - /* - * If periodic timer interrupt is handled by lapic, its vector in - * IRR is returned and used to set eoi_exit_bitmap for virtual - * interrupt delivery case. Otherwise return -1 to do nothing. - */ - vlapic_set_irq(vcpu_vlapic(v), irq, 0); - pt_vector =3D irq; + vlapic_set_irq_callback(vcpu_vlapic(v), pt->irq, 0, eoi_callback, = pt); break; =20 case PTSRC_isa: @@ -376,98 +348,26 @@ int pt_update_irq(struct vcpu *v) v->domain->arch.hvm.vpic[irq >> 3].int_output ) hvm_isa_irq_assert(v->domain, irq, NULL); else - { - pt_vector =3D hvm_isa_irq_assert(v->domain, irq, vioapic_get_v= ector); - /* - * hvm_isa_irq_assert may not set the corresponding bit in vIRR - * when mask field of IOAPIC RTE is set. Check it again. - */ - if ( pt_vector < 0 || !vlapic_test_irq(vcpu_vlapic(v), pt_vect= or) ) - pt_vector =3D -1; - } + hvm_isa_irq_assert(v->domain, irq, vioapic_get_vector); break; =20 case PTSRC_ioapic: - pt_vector =3D hvm_ioapic_assert(v->domain, irq, level); - if ( pt_vector < 0 || !vlapic_test_irq(vcpu_vlapic(v), pt_vector) ) - { - pt_vector =3D -1; - if ( level ) - { - /* - * Level interrupts are always asserted because the pin as= sert - * count is incremented regardless of whether the pin is m= asked - * or the vector latched in IRR, so also execute the callb= ack - * associated with the timer. - */ - time_cb *cb =3D NULL; - void *cb_priv; - - pt_vcpu_lock(v); - /* Make sure the timer is still on the list. */ - list_for_each_entry ( pt, &v->arch.hvm.tm_list, list ) - if ( pt =3D=3D earliest_pt ) - { - pt_irq_fired(v, pt); - cb =3D pt->cb; - cb_priv =3D pt->priv; - break; - } - pt_vcpu_unlock(v); - - if ( cb !=3D NULL ) - cb(v, cb_priv); - } - } + hvm_ioapic_assert(v->domain, irq, pt->level); break; } =20 - return pt_vector; -} - -static struct periodic_time *is_pt_irq( - struct vcpu *v, struct hvm_intack intack) -{ - struct list_head *head =3D &v->arch.hvm.tm_list; - struct periodic_time *pt; - - list_for_each_entry ( pt, head, list ) - { - if ( pt->pending_intr_nr && pt->irq_issued && - (intack.vector =3D=3D pt_irq_vector(pt, intack.source)) ) - return pt; - } - - return NULL; -} - -void pt_intr_post(struct vcpu *v, struct hvm_intack intack) -{ - struct periodic_time *pt; - time_cb *cb; - void *cb_priv; - - if ( intack.source =3D=3D hvm_intsrc_vector ) - return; - - pt_vcpu_lock(v); - - pt =3D is_pt_irq(v, intack); - if ( pt =3D=3D NULL ) - { - pt_vcpu_unlock(v); - return; - } - - pt_irq_fired(v, pt); - - cb =3D pt->cb; - cb_priv =3D pt->priv; + /* Update time when an interrupt is injected. */ + if ( mode_is(v->domain, one_missed_tick_pending) || + mode_is(v->domain, no_missed_ticks_pending) ) + pt->last_plt_gtime =3D hvm_get_guest_time(v); + else + pt->last_plt_gtime +=3D pt->period; =20 - pt_vcpu_unlock(v); + if ( mode_is(v->domain, delay_for_missed_ticks) && + hvm_get_guest_time(v) < pt->last_plt_gtime ) + hvm_set_guest_time(v, pt->last_plt_gtime); =20 - if ( cb !=3D NULL ) - cb(v, cb_priv); + return true; } =20 void pt_migrate(struct vcpu *v) @@ -543,6 +443,24 @@ void create_periodic_time( pt->cb =3D cb; pt->priv =3D data; =20 + switch ( pt->source ) + { + int rc; + + case PTSRC_isa: + irq =3D hvm_isa_irq_to_gsi(irq); + /* fallthrough */ + case PTSRC_ioapic: + pt->eoi_cb.callback =3D eoi_callback; + pt->eoi_cb.data =3D pt; + rc =3D hvm_gsi_register_callback(v->domain, irq, &pt->eoi_cb); + if ( rc ) + gdprintk(XENLOG_WARNING, + "unable to register callback for timer GSI %u: %d\n", + irq, rc); + break; + } + pt->on_list =3D 1; list_add(&pt->list, &v->arch.hvm.tm_list); =20 @@ -554,6 +472,8 @@ void create_periodic_time( =20 void destroy_periodic_time(struct periodic_time *pt) { + unsigned int gsi; + /* Was this structure previously initialised by create_periodic_time()= ? */ if ( pt->vcpu =3D=3D NULL ) return; @@ -563,6 +483,17 @@ void destroy_periodic_time(struct periodic_time *pt) list_del(&pt->list); pt->on_list =3D 0; pt->pending_intr_nr =3D 0; + + gsi =3D pt->irq; + switch ( pt->source ) + { + case PTSRC_isa: + gsi =3D hvm_isa_irq_to_gsi(pt->irq); + /* fallthrough */ + case PTSRC_ioapic: + hvm_gsi_unregister_callback(pt->vcpu->domain, gsi, &pt->eoi_cb); + break; + } pt_unlock(pt); =20 /* @@ -617,20 +548,29 @@ void pt_adjust_global_vcpu_target(struct vcpu *v) write_unlock(&pl_time->vhpet.lock); } =20 - static void pt_resume(struct periodic_time *pt) { + struct vcpu *v; + time_cb *cb =3D NULL; + void *cb_priv; + if ( pt->vcpu =3D=3D NULL ) return; =20 pt_lock(pt); - if ( pt->pending_intr_nr && !pt->on_list ) + if ( pt->pending_intr_nr && !pt->on_list && inject_interrupt(pt) ) { + pt->pending_intr_nr--; + cb =3D pt->cb; + cb_priv =3D pt->priv; + v =3D pt->vcpu; pt->on_list =3D 1; list_add(&pt->list, &pt->vcpu->arch.hvm.tm_list); - vcpu_kick(pt->vcpu); } pt_unlock(pt); + + if ( cb ) + cb(v, cb_priv); } =20 void pt_may_unmask_irq(struct domain *d, struct periodic_time *vlapic_pt) diff --git a/xen/include/asm-x86/hvm/vpt.h b/xen/include/asm-x86/hvm/vpt.h index 39d26cbda4..9440fe4ac7 100644 --- a/xen/include/asm-x86/hvm/vpt.h +++ b/xen/include/asm-x86/hvm/vpt.h @@ -23,6 +23,7 @@ #include #include #include +#include =20 /* * Abstract layer of periodic time, one short time. @@ -50,6 +51,7 @@ struct periodic_time { struct timer timer; /* ac_timer */ time_cb *cb; void *priv; /* point back to platform time source */ + struct hvm_gsi_eoi_callback eoi_cb; /* EOI callback registration data = */ }; =20 =20 @@ -145,9 +147,6 @@ struct pl_time { /* platform time */ =20 void pt_save_timer(struct vcpu *v); void pt_restore_timer(struct vcpu *v); -int pt_update_irq(struct vcpu *v); -struct hvm_intack; -void pt_intr_post(struct vcpu *v, struct hvm_intack intack); void pt_migrate(struct vcpu *v); =20 void pt_adjust_global_vcpu_target(struct vcpu *v); --=20 2.28.0 From nobody Sat May 4 04:32:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1601462495; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=u0qlvgEoh18Z1ueoenyGkoQGiMXqtDDyv8+pdlc35lA=; b=QIjKsRqJGscvnj44aQ0PV2quTtavIxDW/bQP8+ivBuN9OZcXlaskGCH1 s7BdGPFisUVmMOoTr/mzBD5SL0XfY5C+cLgcstFjkMsLjF8UEvQHPYI/Y mGvATAeMBG05NvkbZiXgIGpn/X6Y0ReyhOCqhGfeui0CqecLdl+FUnIWt 4=; Authentication-Results: esa5.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: j6atUa/G02FS5MgB9bqwixp2tW7+OKIdlsMD1t2B2gfoB3F0E8D0P0Nqxq8nFut5lA0vJnDCTG gRs47h4l0JBPeS2L0UdCA23qsMNnhhHJ25MwKKBMHewJs2jMlK4o76jcfxzVKCEXbqqO++ERD/ 5k7X78sK1fZmgfDuSBJoDX1GcQyz5Vj40sFg5DLot5BGx4yVjUHIxalPeYb4JWgAs5RJZ9aYfE xX/Lf8NpvnB6Z4tEnpCLM+hmBLjVLMjmv4Uoz7KkTrQuFqUYHDf/RGXFiezGNwlLgjEoxZ6Ruf PnU= X-SBRS: None X-MesageID: 28041988 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.77,322,1596513600"; d="scan'208";a="28041988" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu Subject: [PATCH v2 10/11] x86/vpt: remove vPT timers per-vCPU lists Date: Wed, 30 Sep 2020 12:41:07 +0200 Message-ID: <20200930104108.35969-11-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200930104108.35969-1-roger.pau@citrix.com> References: <20200930104108.35969-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) No longer add vPT timers to lists on specific vCPUs, since there's no need anymore to check if timer interrupts have been injected on return to HVM guest. Such change allows to get rid of virtual timers vCPU migration, and also cleanup some of the virtual timers fields that are no longer required. The model is also slightly different now in that timers are not stopped when a vCPU is de-scheduled. Such timers will continue running, and when triggered the function will try to inject the corresponding interrupt to the guest (which might be different than the currently running one). Note that the timer triggering when the guest is no longer running can only happen once, as the timer callback will not reset the interrupt to fire again. Such resetting if required will be done by the EOI callback. Since virtual timers are no longer added to per-VCPU lists when active a new 'masked' field is added to the structure, to signal whether a timer has it's interrupt source currently masked. Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v1: - New in this version. --- xen/arch/x86/domain.c | 2 +- xen/arch/x86/hvm/hvm.c | 2 - xen/arch/x86/hvm/vlapic.c | 1 - xen/arch/x86/hvm/vpt.c | 153 ++++----------------------------- xen/include/asm-x86/hvm/vcpu.h | 3 +- xen/include/asm-x86/hvm/vpt.h | 9 +- 6 files changed, 23 insertions(+), 147 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index e8e91cf080..f373431105 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1964,7 +1964,7 @@ void context_switch(struct vcpu *prev, struct vcpu *n= ext) vpmu_switch_from(prev); np2m_schedule(NP2M_SCHEDLE_OUT); =20 - if ( is_hvm_domain(prevd) && !list_empty(&prev->arch.hvm.tm_list) ) + if ( is_hvm_domain(prevd) ) pt_save_timer(prev); =20 local_irq_disable(); diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 9636ac6bf1..5a0448aa13 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -489,7 +489,6 @@ void hvm_set_info_guest(struct vcpu *v) void hvm_migrate_timers(struct vcpu *v) { rtc_migrate_timers(v); - pt_migrate(v); } =20 void hvm_migrate_pirq(struct hvm_pirq_dpci *pirq_dpci, const struct vcpu *= v) @@ -1558,7 +1557,6 @@ int hvm_vcpu_initialise(struct vcpu *v) hvm_asid_flush_vcpu(v); =20 spin_lock_init(&v->arch.hvm.tm_lock); - INIT_LIST_HEAD(&v->arch.hvm.tm_list); =20 rc =3D hvm_vcpu_cacheattr_init(v); /* teardown: vcpu_cacheattr_destroy= */ if ( rc !=3D 0 ) diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 35f12e0909..9afcb239af 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1330,7 +1330,6 @@ void vlapic_adjust_i8259_target(struct domain *d) if ( d->arch.hvm.i8259_target =3D=3D v ) return; d->arch.hvm.i8259_target =3D v; - pt_adjust_global_vcpu_target(v); } =20 int vlapic_has_pending_irq(struct vcpu *v) diff --git a/xen/arch/x86/hvm/vpt.c b/xen/arch/x86/hvm/vpt.c index 787931d7bb..76ace8da80 100644 --- a/xen/arch/x86/hvm/vpt.c +++ b/xen/arch/x86/hvm/vpt.c @@ -126,18 +126,6 @@ static int pt_irq_masked(struct periodic_time *pt) return 1; } =20 -static void pt_vcpu_lock(struct vcpu *v) -{ - read_lock(&v->domain->arch.hvm.pl_time->pt_migrate); - spin_lock(&v->arch.hvm.tm_lock); -} - -static void pt_vcpu_unlock(struct vcpu *v) -{ - spin_unlock(&v->arch.hvm.tm_lock); - read_unlock(&v->domain->arch.hvm.pl_time->pt_migrate); -} - static void pt_lock(struct periodic_time *pt) { /* @@ -151,7 +139,8 @@ static void pt_lock(struct periodic_time *pt) =20 static void pt_unlock(struct periodic_time *pt) { - pt_vcpu_unlock(pt->vcpu); + spin_unlock(&pt->vcpu->arch.hvm.tm_lock); + read_unlock(&pt->vcpu->domain->arch.hvm.pl_time->pt_migrate); } =20 static void pt_process_missed_ticks(struct periodic_time *pt) @@ -166,9 +155,7 @@ static void pt_process_missed_ticks(struct periodic_tim= e *pt) return; =20 missed_ticks =3D missed_ticks / (s_time_t) pt->period + 1; - if ( mode_is(pt->vcpu->domain, no_missed_ticks_pending) ) - pt->do_not_freeze =3D !pt->pending_intr_nr; - else + if ( !mode_is(pt->vcpu->domain, no_missed_ticks_pending) ) pt->pending_intr_nr +=3D missed_ticks; pt->scheduled +=3D missed_ticks * pt->period; } @@ -195,50 +182,20 @@ static void pt_thaw_time(struct vcpu *v) =20 void pt_save_timer(struct vcpu *v) { - struct list_head *head =3D &v->arch.hvm.tm_list; - struct periodic_time *pt; - - if ( v->pause_flags & VPF_blocked ) - return; - - pt_vcpu_lock(v); - - list_for_each_entry ( pt, head, list ) - if ( !pt->do_not_freeze ) - stop_timer(&pt->timer); =20 pt_freeze_time(v); - - pt_vcpu_unlock(v); } =20 void pt_restore_timer(struct vcpu *v) { - struct list_head *head =3D &v->arch.hvm.tm_list; - struct periodic_time *pt; - - pt_vcpu_lock(v); - - list_for_each_entry ( pt, head, list ) - if ( pt->pending_intr_nr =3D=3D 0 ) - set_timer(&pt->timer, pt->scheduled); - pt_thaw_time(v); - - pt_vcpu_unlock(v); } =20 static void pt_irq_fired(struct vcpu *v, struct periodic_time *pt) { - pt->irq_issued =3D false; - if ( pt->one_shot ) { - if ( pt->on_list ) - list_del(&pt->list); - pt->on_list =3D false; pt->pending_intr_nr =3D 0; - return; } =20 @@ -252,7 +209,11 @@ static void pt_irq_fired(struct vcpu *v, struct period= ic_time *pt) pt_process_missed_ticks(pt); =20 if ( !pt->pending_intr_nr ) + { + /* Make sure timer follows vCPU. */ + migrate_timer(&pt->timer, current->processor); set_timer(&pt->timer, pt->scheduled); + } } =20 static void pt_timer_fn(void *data) @@ -268,21 +229,16 @@ static void pt_timer_fn(void *data) v =3D pt->vcpu; irq =3D pt->irq; =20 - if ( inject_interrupt(pt) ) + pt->masked =3D !inject_interrupt(pt); + pt->scheduled +=3D pt->period; + + if ( pt->masked ) + pt->pending_intr_nr++; + else { - pt->scheduled +=3D pt->period; - pt->do_not_freeze =3D 0; cb =3D pt->cb; cb_priv =3D pt->priv; } - else - { - /* Masked. */ - if ( pt->on_list ) - list_del(&pt->list); - pt->on_list =3D false; - pt->pending_intr_nr++; - } =20 pt_unlock(pt); =20 @@ -306,20 +262,14 @@ static void eoi_callback(unsigned int unused, void *d= ata) pt_irq_fired(pt->vcpu, pt); if ( pt->pending_intr_nr ) { - if ( inject_interrupt(pt) ) + pt->masked =3D !inject_interrupt(pt); + if ( !pt->masked ) { pt->pending_intr_nr--; cb =3D pt->cb; cb_priv =3D pt->priv; v =3D pt->vcpu; } - else - { - /* Masked. */ - if ( pt->on_list ) - list_del(&pt->list); - pt->on_list =3D false; - } } =20 pt_unlock(pt); @@ -370,19 +320,6 @@ static bool inject_interrupt(struct periodic_time *pt) return true; } =20 -void pt_migrate(struct vcpu *v) -{ - struct list_head *head =3D &v->arch.hvm.tm_list; - struct periodic_time *pt; - - pt_vcpu_lock(v); - - list_for_each_entry ( pt, head, list ) - migrate_timer(&pt->timer, v->processor); - - pt_vcpu_unlock(v); -} - void create_periodic_time( struct vcpu *v, struct periodic_time *pt, uint64_t delta, uint64_t period, uint8_t irq, time_cb *cb, void *data, bool level) @@ -402,8 +339,7 @@ void create_periodic_time( write_lock(&v->domain->arch.hvm.pl_time->pt_migrate); =20 pt->pending_intr_nr =3D 0; - pt->do_not_freeze =3D 0; - pt->irq_issued =3D 0; + pt->masked =3D false; =20 /* Periodic timer must be at least 0.1ms. */ if ( (period < 100000) && period ) @@ -461,9 +397,6 @@ void create_periodic_time( break; } =20 - pt->on_list =3D 1; - list_add(&pt->list, &v->arch.hvm.tm_list); - init_timer(&pt->timer, pt_timer_fn, pt, v->processor); set_timer(&pt->timer, pt->scheduled); =20 @@ -479,10 +412,8 @@ void destroy_periodic_time(struct periodic_time *pt) return; =20 pt_lock(pt); - if ( pt->on_list ) - list_del(&pt->list); - pt->on_list =3D 0; pt->pending_intr_nr =3D 0; + pt->masked =3D false; =20 gsi =3D pt->irq; switch ( pt->source ) @@ -503,51 +434,6 @@ void destroy_periodic_time(struct periodic_time *pt) kill_timer(&pt->timer); } =20 -static void pt_adjust_vcpu(struct periodic_time *pt, struct vcpu *v) -{ - ASSERT(pt->source =3D=3D PTSRC_isa || pt->source =3D=3D PTSRC_ioapic); - - if ( pt->vcpu =3D=3D NULL ) - return; - - write_lock(&pt->vcpu->domain->arch.hvm.pl_time->pt_migrate); - pt->vcpu =3D v; - if ( pt->on_list ) - { - list_del(&pt->list); - list_add(&pt->list, &v->arch.hvm.tm_list); - migrate_timer(&pt->timer, v->processor); - } - write_unlock(&pt->vcpu->domain->arch.hvm.pl_time->pt_migrate); -} - -void pt_adjust_global_vcpu_target(struct vcpu *v) -{ - struct PITState *vpit; - struct pl_time *pl_time; - int i; - - if ( !v || !has_vpit(v->domain) ) - return; - - vpit =3D &v->domain->arch.vpit; - - spin_lock(&vpit->lock); - pt_adjust_vcpu(&vpit->pt0, v); - spin_unlock(&vpit->lock); - - pl_time =3D v->domain->arch.hvm.pl_time; - - spin_lock(&pl_time->vrtc.lock); - pt_adjust_vcpu(&pl_time->vrtc.pt, v); - spin_unlock(&pl_time->vrtc.lock); - - write_lock(&pl_time->vhpet.lock); - for ( i =3D 0; i < HPET_TIMER_NUM; i++ ) - pt_adjust_vcpu(&pl_time->vhpet.pt[i], v); - write_unlock(&pl_time->vhpet.lock); -} - static void pt_resume(struct periodic_time *pt) { struct vcpu *v; @@ -558,14 +444,13 @@ static void pt_resume(struct periodic_time *pt) return; =20 pt_lock(pt); - if ( pt->pending_intr_nr && !pt->on_list && inject_interrupt(pt) ) + if ( pt->pending_intr_nr && pt->masked && inject_interrupt(pt) ) { pt->pending_intr_nr--; cb =3D pt->cb; cb_priv =3D pt->priv; v =3D pt->vcpu; - pt->on_list =3D 1; - list_add(&pt->list, &pt->vcpu->arch.hvm.tm_list); + pt->masked =3D false; } pt_unlock(pt); =20 diff --git a/xen/include/asm-x86/hvm/vcpu.h b/xen/include/asm-x86/hvm/vcpu.h index 5ccd075815..07a9890ed3 100644 --- a/xen/include/asm-x86/hvm/vcpu.h +++ b/xen/include/asm-x86/hvm/vcpu.h @@ -166,9 +166,8 @@ struct hvm_vcpu { s64 cache_tsc_offset; u64 guest_time; =20 - /* Lock and list for virtual platform timers. */ + /* Lock for virtual platform timers. */ spinlock_t tm_lock; - struct list_head tm_list; =20 bool flag_dr_dirty; bool debug_state_latch; diff --git a/xen/include/asm-x86/hvm/vpt.h b/xen/include/asm-x86/hvm/vpt.h index 9440fe4ac7..7c0322727b 100644 --- a/xen/include/asm-x86/hvm/vpt.h +++ b/xen/include/asm-x86/hvm/vpt.h @@ -31,13 +31,10 @@ typedef void time_cb(struct vcpu *v, void *opaque); =20 struct periodic_time { - struct list_head list; - bool on_list; bool one_shot; - bool do_not_freeze; - bool irq_issued; bool warned_timeout_too_short; bool level; + bool masked; #define PTSRC_isa 1 /* ISA time source */ #define PTSRC_lapic 2 /* LAPIC time source */ #define PTSRC_ioapic 3 /* IOAPIC time source */ @@ -147,9 +144,7 @@ struct pl_time { /* platform time */ =20 void pt_save_timer(struct vcpu *v); void pt_restore_timer(struct vcpu *v); -void pt_migrate(struct vcpu *v); =20 -void pt_adjust_global_vcpu_target(struct vcpu *v); #define pt_global_vcpu_target(d) \ (is_hvm_domain(d) && (d)->arch.hvm.i8259_target ? \ (d)->arch.hvm.i8259_target : \ @@ -158,7 +153,7 @@ void pt_adjust_global_vcpu_target(struct vcpu *v); void pt_may_unmask_irq(struct domain *d, struct periodic_time *vlapic_pt); =20 /* Is given periodic timer active? */ -#define pt_active(pt) ((pt)->on_list || (pt)->pending_intr_nr) +#define pt_active(pt) !(pt)->masked =20 /* * Create/destroy a periodic (or one-shot!) timer. --=20 2.28.0 From nobody Sat May 4 04:32:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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bh=YvWR66vXENt4dXadQOccItvi0fqHZ4YQsWtAm6/3iIg=; b=KZQw4UrBQmTYOJoKjb4ukHNyGvLoDqxfsQogIRf1ZIGR7zQLBjLTyh9s g6MWg+mSeeehUjyq1RszWRDAvzKbWz2jDPRoAxF24fNuY0YnjZctAzpnU PG/gVfXDE4YEDFsMixzKxjXUea8hWWd/pmJpYNu7Lq2/7U40wPT96/b/s M=; Authentication-Results: esa6.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: w3aRJGMM9yGW2qZvpt0FrU58tBPV9LHmi9f125yKBzdiS+pnF7e44ulXUWi7TGfdxUKzKSlCA+ uWPLFIu2rtT3OyxqHgEtlmLO15ahH9czwqhMY6CytIj6ZYeVVkRbPB2QCxG2E86/aQSHm1iqmw ZKc05mHX28Jfa71VcEHfkyRA5K/CLSk9pKeDHZROtRZTeuzHaFtL1X5tOxDPRJzzSraNJhsQbn 1t66EFleVZA516O9PaeeRnPYwGHLqLKSdSMz+fgxD/uT8yAhDgBElIxSf41NJEsMNE+bTpqgXI 1xg= X-SBRS: None X-MesageID: 28223127 X-Ironport-Server: esa6.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.77,322,1596513600"; d="scan'208";a="28223127" From: Roger Pau Monne To: CC: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu Subject: [PATCH v2 11/11] x86/vpt: introduce a per-vPT lock Date: Wed, 30 Sep 2020 12:41:08 +0200 Message-ID: <20200930104108.35969-12-roger.pau@citrix.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200930104108.35969-1-roger.pau@citrix.com> References: <20200930104108.35969-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) Introduce a per virtual timer lock that replaces the existing per-vCPU and per-domain vPT locks. Since virtual timers are no longer assigned or migrated between vCPUs the locking can be simplified to a in-structure spinlock that protects all the fields. This requires introducing a helper to initialize the spinlock, and that could be used to initialize other virtual timer fields in the future. Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Jan Beulich --- Changes since v1: - New in his version. --- xen/arch/x86/emul-i8254.c | 1 + xen/arch/x86/hvm/hpet.c | 8 +++++- xen/arch/x86/hvm/hvm.c | 2 -- xen/arch/x86/hvm/rtc.c | 1 + xen/arch/x86/hvm/vlapic.c | 1 + xen/arch/x86/hvm/vpt.c | 48 +++++++++++++++-------------------- xen/include/asm-x86/hvm/vpt.h | 9 ++----- 7 files changed, 33 insertions(+), 37 deletions(-) diff --git a/xen/arch/x86/emul-i8254.c b/xen/arch/x86/emul-i8254.c index 73be4188ad..a47138cbab 100644 --- a/xen/arch/x86/emul-i8254.c +++ b/xen/arch/x86/emul-i8254.c @@ -484,6 +484,7 @@ void pit_init(struct domain *d, unsigned long cpu_khz) { register_portio_handler(d, PIT_BASE, 4, handle_pit_io); register_portio_handler(d, 0x61, 1, handle_speaker_io); + init_periodic_timer(&pit->pt0); } =20 pit_reset(d); diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index ca94e8b453..20593c3862 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -739,12 +739,18 @@ static void hpet_set(HPETState *h) =20 void hpet_init(struct domain *d) { + HPETState *h =3D domain_vhpet(d); + unsigned int i; + if ( !has_vhpet(d) ) return; =20 - hpet_set(domain_vhpet(d)); + hpet_set(h); register_mmio_handler(d, &hpet_mmio_ops); d->arch.hvm.params[HVM_PARAM_HPET_ENABLED] =3D 1; + + for ( i =3D 0; i < HPET_TIMER_NUM; i++ ) + init_periodic_timer(&h->pt[i]); } =20 void hpet_deinit(struct domain *d) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 5a0448aa13..7cb4511b60 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -665,8 +665,6 @@ int hvm_domain_initialise(struct domain *d) /* need link to containing domain */ d->arch.hvm.pl_time->domain =3D d; =20 - rwlock_init(&d->arch.hvm.pl_time->pt_migrate); - /* Set the default IO Bitmap. */ if ( is_hardware_domain(d) ) { diff --git a/xen/arch/x86/hvm/rtc.c b/xen/arch/x86/hvm/rtc.c index 3150f5f147..2d540b16ac 100644 --- a/xen/arch/x86/hvm/rtc.c +++ b/xen/arch/x86/hvm/rtc.c @@ -846,6 +846,7 @@ void rtc_init(struct domain *d) init_timer(&s->update_timer, rtc_update_timer, s, smp_processor_id()); init_timer(&s->update_timer2, rtc_update_timer2, s, smp_processor_id()= ); init_timer(&s->alarm_timer, rtc_alarm_cb, s, smp_processor_id()); + init_periodic_timer(&s->pt); =20 register_portio_handler(d, RTC_PORT(0), 2, handle_rtc_io); =20 diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 9afcb239af..fa40fca6c9 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1642,6 +1642,7 @@ int vlapic_init(struct vcpu *v) return 0; } =20 + init_periodic_timer(&vlapic->pt); vlapic->pt.source =3D PTSRC_lapic; =20 if (vlapic->regs_page =3D=3D NULL) diff --git a/xen/arch/x86/hvm/vpt.c b/xen/arch/x86/hvm/vpt.c index 76ace8da80..47bd3285e1 100644 --- a/xen/arch/x86/hvm/vpt.c +++ b/xen/arch/x86/hvm/vpt.c @@ -126,23 +126,6 @@ static int pt_irq_masked(struct periodic_time *pt) return 1; } =20 -static void pt_lock(struct periodic_time *pt) -{ - /* - * We cannot use pt_vcpu_lock here, because we need to acquire the - * per-domain lock first and then (re-)fetch the value of pt->vcpu, or - * else we might be using a stale value of pt->vcpu. - */ - read_lock(&pt->vcpu->domain->arch.hvm.pl_time->pt_migrate); - spin_lock(&pt->vcpu->arch.hvm.tm_lock); -} - -static void pt_unlock(struct periodic_time *pt) -{ - spin_unlock(&pt->vcpu->arch.hvm.tm_lock); - read_unlock(&pt->vcpu->domain->arch.hvm.pl_time->pt_migrate); -} - static void pt_process_missed_ticks(struct periodic_time *pt) { s_time_t missed_ticks, now =3D NOW(); @@ -224,7 +207,7 @@ static void pt_timer_fn(void *data) void *cb_priv; unsigned int irq; =20 - pt_lock(pt); + spin_lock(&pt->lock); =20 v =3D pt->vcpu; irq =3D pt->irq; @@ -240,7 +223,7 @@ static void pt_timer_fn(void *data) cb_priv =3D pt->priv; } =20 - pt_unlock(pt); + spin_unlock(&pt->lock); =20 if ( cb ) cb(v, cb_priv); @@ -257,7 +240,7 @@ static void eoi_callback(unsigned int unused, void *dat= a) time_cb *cb =3D NULL; void *cb_priv; =20 - pt_lock(pt); + spin_lock(&pt->lock); =20 pt_irq_fired(pt->vcpu, pt); if ( pt->pending_intr_nr ) @@ -272,7 +255,7 @@ static void eoi_callback(unsigned int unused, void *dat= a) } } =20 - pt_unlock(pt); + spin_unlock(&pt->lock); =20 if ( cb !=3D NULL ) cb(v, cb_priv); @@ -320,6 +303,11 @@ static bool inject_interrupt(struct periodic_time *pt) return true; } =20 +void init_periodic_timer(struct periodic_time *pt) +{ + spin_lock_init(&pt->lock); +} + void create_periodic_time( struct vcpu *v, struct periodic_time *pt, uint64_t delta, uint64_t period, uint8_t irq, time_cb *cb, void *data, bool level) @@ -336,7 +324,7 @@ void create_periodic_time( =20 destroy_periodic_time(pt); =20 - write_lock(&v->domain->arch.hvm.pl_time->pt_migrate); + spin_lock(&pt->lock); =20 pt->pending_intr_nr =3D 0; pt->masked =3D false; @@ -400,18 +388,21 @@ void create_periodic_time( init_timer(&pt->timer, pt_timer_fn, pt, v->processor); set_timer(&pt->timer, pt->scheduled); =20 - write_unlock(&v->domain->arch.hvm.pl_time->pt_migrate); + spin_unlock(&pt->lock); } =20 void destroy_periodic_time(struct periodic_time *pt) { unsigned int gsi; =20 + spin_lock(&pt->lock); /* Was this structure previously initialised by create_periodic_time()= ? */ if ( pt->vcpu =3D=3D NULL ) + { + spin_unlock(&pt->lock); return; + } =20 - pt_lock(pt); pt->pending_intr_nr =3D 0; pt->masked =3D false; =20 @@ -425,7 +416,7 @@ void destroy_periodic_time(struct periodic_time *pt) hvm_gsi_unregister_callback(pt->vcpu->domain, gsi, &pt->eoi_cb); break; } - pt_unlock(pt); + spin_unlock(&pt->lock); =20 /* * pt_timer_fn() can run until this kill_timer() returns. We must do t= his @@ -440,10 +431,13 @@ static void pt_resume(struct periodic_time *pt) time_cb *cb =3D NULL; void *cb_priv; =20 + spin_lock(&pt->lock); if ( pt->vcpu =3D=3D NULL ) + { + spin_unlock(&pt->lock); return; + } =20 - pt_lock(pt); if ( pt->pending_intr_nr && pt->masked && inject_interrupt(pt) ) { pt->pending_intr_nr--; @@ -452,7 +446,7 @@ static void pt_resume(struct periodic_time *pt) v =3D pt->vcpu; pt->masked =3D false; } - pt_unlock(pt); + spin_unlock(&pt->lock); =20 if ( cb ) cb(v, cb_priv); diff --git a/xen/include/asm-x86/hvm/vpt.h b/xen/include/asm-x86/hvm/vpt.h index 7c0322727b..75e0526b17 100644 --- a/xen/include/asm-x86/hvm/vpt.h +++ b/xen/include/asm-x86/hvm/vpt.h @@ -49,6 +49,7 @@ struct periodic_time { time_cb *cb; void *priv; /* point back to platform time source */ struct hvm_gsi_eoi_callback eoi_cb; /* EOI callback registration data = */ + spinlock_t lock; }; =20 =20 @@ -127,13 +128,6 @@ struct pl_time { /* platform time */ struct RTCState vrtc; struct HPETState vhpet; struct PMTState vpmt; - /* - * rwlock to prevent periodic_time vCPU migration. Take the lock in re= ad - * mode in order to prevent the vcpu field of periodic_time from chang= ing. - * Lock must be taken in write mode when changes to the vcpu field are - * performed, as it allows exclusive access to all the timers of a dom= ain. - */ - rwlock_t pt_migrate; /* guest_time =3D Xen sys time + stime_offset */ int64_t stime_offset; /* Ensures monotonicity in appropriate timer modes. */ @@ -168,6 +162,7 @@ void create_periodic_time( struct vcpu *v, struct periodic_time *pt, uint64_t delta, uint64_t period, uint8_t irq, time_cb *cb, void *data, bool level); void destroy_periodic_time(struct periodic_time *pt); +void init_periodic_timer(struct periodic_time *pt); =20 int pv_pit_handler(int port, int data, int write); void pit_reset(struct domain *d); --=20 2.28.0