From nobody Mon Feb 9 09:34:29 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1591789914; cv=none; d=zohomail.com; s=zohoarc; b=fywQUIuoWpEtpG0Q7Q+X8yVH5qevGeSAgQwOc+v17fKWB1MutmhXC+byFW6HtdOenD4O4qAKhkbmrBY5eCMYBiGLOhffsDfqUX3cmmQN8t9cQv9WOMaadJwzNGfMOIkXTiAXivtbQsWq6wkNrSLRMmPBITUq4B5CEjhSlL5Luew= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591789914; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=pwf/wQeI83cWOL8hlf8Ei55162qLuv16docsrSS/cT8=; b=GF+S3NEJtQyigkSA24mqHl1OlF5kfJJAwvtQTo3ZoXym1O7orfpsLtC9m7WSh1PIWkwQO5GsXxvwDgP9k5KF8bcxCeddQadfXWn8xPOz6FRBVY+mJYjyKdO2Q6JQRWC5IHpPmRrrOwOM6NBXjcV02IJPfegXr9DOST2St0fptts= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1591789914093301.8972142034346; Wed, 10 Jun 2020 04:51:54 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1jizGg-0008BO-Ch; Wed, 10 Jun 2020 11:51:42 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1jizGf-000894-5e for xen-devel@lists.xenproject.org; Wed, 10 Jun 2020 11:51:41 +0000 Received: from esa2.hc3370-68.iphmx.com (unknown [216.71.145.153]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id bc778184-ab10-11ea-bb8b-bc764e2007e4; Wed, 10 Jun 2020 11:51:36 +0000 (UTC) X-Inumbo-ID: bc778184-ab10-11ea-bb8b-bc764e2007e4 Authentication-Results: esa2.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: c+5iYyULtN6MmJAxB9TxPcrmkNfHgal4+8BuiEm2tC/wgr23aYplq31C8WJQeoJGHLZ79omQiN 4c93Rc4dAIIFaFZI5z033JpEuZYVvJqTPBCWCpqo3Y8LLdAdnIfHNo8raGIH3UP37MyHfgMsyP /W1Qxzl7m2NDU+4OWCLrKacObIhQzktx3CP5RoPZObW3YMNftQXuDQqmpIVoZMH+ZCl0++NLgF gdgm048dekes7sP8cnvKn9Q3AKo6PPVjSZ+LZDgYc36gWERsfy87X/EAIqa1CCBdB+8vntcn/c rjI= X-SBRS: 2.7 X-MesageID: 19690637 X-Ironport-Server: esa2.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.73,495,1583211600"; d="scan'208";a="19690637" From: Roger Pau Monne To: Subject: [PATCH for-4.14 2/2] x86/passthrough: introduce a flag for GSIs not requiring an EOI or unmask Date: Wed, 10 Jun 2020 13:51:03 +0200 Message-ID: <20200610115103.7592-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200610115103.7592-1-roger.pau@citrix.com> References: <20200610115103.7592-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Roger Pau Monne , Wei Liu , Jan Beulich , paul@xen.org Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" There's no need to setup a timer for GSIs that are edge triggered, since those don't require any EIO or unmask, and hence couldn't block other interrupts. Note this is only used by PVH dom0, that can setup the passthrough of edge triggered interrupts from the vIO-APIC. One example of such kind of interrupt that can be used by a PVH dom0 would be the RTC timer. Signed-off-by: Roger Pau Monn=C3=A9 --- xen/drivers/passthrough/io.c | 14 +++++++++++++- xen/include/asm-x86/hvm/irq.h | 2 ++ 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/xen/drivers/passthrough/io.c b/xen/drivers/passthrough/io.c index b292e79382..be1d5b1434 100644 --- a/xen/drivers/passthrough/io.c +++ b/xen/drivers/passthrough/io.c @@ -138,7 +138,8 @@ static void pt_pirq_softirq_reset(struct hvm_pirq_dpci = *pirq_dpci) =20 bool pt_irq_need_timer(uint32_t flags) { - return !(flags & (HVM_IRQ_DPCI_GUEST_MSI | HVM_IRQ_DPCI_TRANSLATE)); + return !(flags & (HVM_IRQ_DPCI_GUEST_MSI | HVM_IRQ_DPCI_TRANSLATE | + HVM_IRQ_DPCI_NO_EOI)); } =20 static int pt_irq_guest_eoi(struct domain *d, struct hvm_pirq_dpci *pirq_d= pci, @@ -558,6 +559,12 @@ int pt_irq_create_bind( */ ASSERT(!mask); share =3D trigger_mode; + if ( !trigger_mode ) + /* + * Edge IO-APIC interrupt, no EOI or unmask to per= form + * and hence no timer needed. + */ + pirq_dpci->flags |=3D HVM_IRQ_DPCI_NO_EOI; } } =20 @@ -920,6 +927,11 @@ static void hvm_dirq_assist(struct domain *d, struct h= vm_pirq_dpci *pirq_dpci) if ( pirq_dpci->flags & HVM_IRQ_DPCI_IDENTITY_GSI ) { hvm_gsi_assert(d, pirq->pirq); + if ( pirq_dpci->flags & HVM_IRQ_DPCI_NO_EOI ) + { + spin_unlock(&d->event_lock); + return; + } pirq_dpci->pending++; } =20 diff --git a/xen/include/asm-x86/hvm/irq.h b/xen/include/asm-x86/hvm/irq.h index d306cfeade..532880d497 100644 --- a/xen/include/asm-x86/hvm/irq.h +++ b/xen/include/asm-x86/hvm/irq.h @@ -121,6 +121,7 @@ struct dev_intx_gsi_link { #define _HVM_IRQ_DPCI_GUEST_PCI_SHIFT 4 #define _HVM_IRQ_DPCI_GUEST_MSI_SHIFT 5 #define _HVM_IRQ_DPCI_IDENTITY_GSI_SHIFT 6 +#define _HVM_IRQ_DPCI_NO_EOI_SHIFT 7 #define _HVM_IRQ_DPCI_TRANSLATE_SHIFT 15 #define HVM_IRQ_DPCI_MACH_PCI (1u << _HVM_IRQ_DPCI_MACH_PCI_SHIFT) #define HVM_IRQ_DPCI_MACH_MSI (1u << _HVM_IRQ_DPCI_MACH_MSI_SHIFT) @@ -129,6 +130,7 @@ struct dev_intx_gsi_link { #define HVM_IRQ_DPCI_GUEST_PCI (1u << _HVM_IRQ_DPCI_GUEST_PCI_SHIFT) #define HVM_IRQ_DPCI_GUEST_MSI (1u << _HVM_IRQ_DPCI_GUEST_MSI_SHIFT) #define HVM_IRQ_DPCI_IDENTITY_GSI (1u << _HVM_IRQ_DPCI_IDENTITY_GSI_SHI= FT) +#define HVM_IRQ_DPCI_NO_EOI (1u << _HVM_IRQ_DPCI_NO_EOI_SHIFT) #define HVM_IRQ_DPCI_TRANSLATE (1u << _HVM_IRQ_DPCI_TRANSLATE_SHIFT) =20 struct hvm_gmsi_info { --=20 2.26.2