From nobody Fri Apr 19 22:51:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1590135006; cv=none; d=zohomail.com; s=zohoarc; b=mb12pjCtpsRD7KuzdEt0YKJ5pmQoDrCrRpI0plP6+OADIQrNfJ7yGdmaCVPkv0QfSM7Mljyjd1ffrlMOre5MAcYyrkEMithVgnb8t5dHncEODah/6kr06wMINNQ8vKf2maivJgePfK5F754YLZbmdi64oPQbszrySt1KhVYoy90= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1590135006; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:To; bh=0otMmhkTTVRCu3F2A4FtmC5MDFbJXmfogclUCk6qTX4=; b=VIxKA1bkXEeYi+9dYZbs3p9HWYIS+hKvllI9YW28ngP/asS3pXsLUNpMLo2T7OgJaiwsIGyU7w6H8fhvPe02yXzglC8hJAIWeDrFyryTZf9h+Iit8tGyEW7/CMF8hOmcTQaPb78H+I+vGoVdgdD6yyh7L1KvqGNFpss1wQwXxY8= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1590135006730586.8942107153829; Fri, 22 May 2020 01:10:06 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1jc2kS-0005NJ-GL; Fri, 22 May 2020 08:09:44 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1jc2kR-0005NE-6d for xen-devel@lists.xenproject.org; Fri, 22 May 2020 08:09:43 +0000 Received: from esa6.hc3370-68.iphmx.com (unknown [216.71.155.175]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id 96ddfa96-9c03-11ea-b07b-bc764e2007e4; Fri, 22 May 2020 08:09:42 +0000 (UTC) X-Inumbo-ID: 96ddfa96-9c03-11ea-b07b-bc764e2007e4 Authentication-Results: esa6.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none IronPort-SDR: YOZoPeQ1Ubz6UHRo9X+yoS1foh4kVrSzE2tRnSH2NkMy/QxYRi99DRgFD3cuznlITZAZZMFKKN hMKbaRTSh0QC5Alis3eT/kBxQ+UrxlPaUOHP7OvLSkR/k73GabypOt6hpgWVBzim3K6E03vosK zcke2Aumn3k7unHOy9PFAZVULP226y/TB1nd5zmSTMlK+LQcL7XJF4QLykmkpSlyku2euXLiCj apRbl7VYbJCHScub3YAZSfU8qKGrZ6XETV2Q1WCjtEtpVprpdHISL8TM2pF50MLFkAXZngHv7l IUg= X-SBRS: 2.7 X-MesageID: 18521085 X-Ironport-Server: esa6.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.73,420,1583211600"; d="scan'208";a="18521085" From: Roger Pau Monne To: Subject: [PATCH] x86/idle: prevent entering C3/C6 on some Intel CPUs due to errata Date: Fri, 22 May 2020 10:09:28 +0200 Message-ID: <20200522080928.87786-1-roger.pau@citrix.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , Jan Beulich , Roger Pau Monne Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Apply a workaround for errata BA80, AAK120, AAM108, AAO67, BD59, AAY54: Rapid Core C3/C6 Transition May Cause Unpredictable System Behavior. Limit maximum C state to C2 when SMT is enabled on the affected CPUs. Signed-off-by: Roger Pau Monn=C3=A9 Acked-by: Andrew Cooper --- xen/arch/x86/cpu/intel.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index b77c1a78ed..69e99bb358 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -296,6 +296,41 @@ static void early_init_intel(struct cpuinfo_x86 *c) ctxt_switch_levelling(NULL); } =20 +/* + * Errata BA80, AAK120, AAM108, AAO67, BD59, AAY54: Rapid Core C3/C6 Trans= ition + * May Cause Unpredictable System Behavior + * + * Under a complex set of internal conditions, cores rapidly performing C3= /C6 + * transitions in a system with Intel Hyper-Threading Technology enabled m= ay + * cause a machine check error (IA32_MCi_STATUS.MCACOD =3D 0x0106), system= hang + * or unpredictable system behavior. + */ +static void probe_c3_errata(const struct cpuinfo_x86 *c) +{ +#define INTEL_FAM6_MODEL(m) { X86_VENDOR_INTEL, 6, m, X86_FEATURE_ALWAYS } + static const struct x86_cpu_id models[] =3D { + /* Nehalem */ + INTEL_FAM6_MODEL(0x1a), + INTEL_FAM6_MODEL(0x1e), + INTEL_FAM6_MODEL(0x1f), + INTEL_FAM6_MODEL(0x2e), + /* Westmere (note Westmere-EX is not affected) */ + INTEL_FAM6_MODEL(0x2c), + INTEL_FAM6_MODEL(0x25), + { } + }; +#undef INTEL_FAM6_MODEL + + /* Serialized by the AP bringup code. */ + if ( max_cstate > 1 && (c->apicid & (c->x86_num_siblings - 1)) && + x86_match_cpu(models) ) + { + printk(XENLOG_WARNING + "Disabling C-states C3 and C6 due to CPU errata\n"); + max_cstate =3D 1; + } +} + /* * P4 Xeon errata 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. @@ -323,6 +358,8 @@ static void Intel_errata_workarounds(struct cpuinfo_x86= *c) =20 if (cpu_has_tsx_force_abort && opt_rtm_abort) wrmsrl(MSR_TSX_FORCE_ABORT, TSX_FORCE_ABORT_RTM); + + probe_c3_errata(c); } =20 =20 --=20 2.26.2