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x-conformance=sidf_compatible IronPort-SDR: B5hLawbR4HB9Pr7f13fsNoWoltvdpm5NHqWqNLF8nNM2yVHxq1MXXdaGLgsKFLyWNEUxgQ/FsE KOpUi8Ay5Ram+pp+1b2xee9om5baeZbGN5nn09b/M+2mXw37nZhSYE0FsJTGrrMQSqN3Pjchsz hWHuigXOCpok5iPCibWaSGhQdSr7pe5XESjUNpoXCz5TmiH/Y5/abNSSrvPISN2duDt8lUDPjC TM/j7PImt6ZjB7vhHGblx4wcJyw+2vbBFm8c+Y89maed6vjmnBmFUhgBAraPMreqyoWKPqzPG4 aII= X-SBRS: 2.7 X-MesageID: 13524163 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.70,479,1574139600"; d="scan'208";a="13524163" From: Roger Pau Monne To: Date: Mon, 24 Feb 2020 11:46:41 +0100 Message-ID: <20200224104645.96381-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200224104645.96381-1-roger.pau@citrix.com> References: <20200224104645.96381-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 1/5] x86: introduce a nmi_count tracking variable X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , Jan Beulich , Roger Pau Monne Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) This is modeled after the irq_count variable, and is used to account for all the NMIs handled by the system. This will allow to repurpose the nmi_count() helper so it can be used in a similar manner as local_irq_count(): account for the NMIs currently in service. Signed-off-by: Roger Pau Monn=C3=A9 --- xen/arch/x86/nmi.c | 11 +++++------ xen/arch/x86/traps.c | 4 +++- xen/include/asm-x86/nmi.h | 2 ++ 3 files changed, 10 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c index a69b91a924..c3f92ed231 100644 --- a/xen/arch/x86/nmi.c +++ b/xen/arch/x86/nmi.c @@ -151,15 +151,14 @@ int nmi_active; =20 static void __init wait_for_nmis(void *p) { - unsigned int cpu =3D smp_processor_id(); - unsigned int start_count =3D nmi_count(cpu); + unsigned int start_count =3D this_cpu(nmi_count); unsigned long ticks =3D 10 * 1000 * cpu_khz / nmi_hz; unsigned long s, e; =20 s =3D rdtsc(); do { cpu_relax(); - if ( nmi_count(cpu) >=3D start_count + 2 ) + if ( this_cpu(nmi_count) >=3D start_count + 2 ) break; e =3D rdtsc(); } while( e - s < ticks ); @@ -177,7 +176,7 @@ void __init check_nmi_watchdog(void) printk("Testing NMI watchdog on all CPUs:"); =20 for_each_online_cpu ( cpu ) - prev_nmi_count[cpu] =3D nmi_count(cpu); + prev_nmi_count[cpu] =3D per_cpu(nmi_count, cpu); =20 /* * Wait at most 10 ticks for 2 watchdog NMIs on each CPU. @@ -188,7 +187,7 @@ void __init check_nmi_watchdog(void) =20 for_each_online_cpu ( cpu ) { - if ( nmi_count(cpu) - prev_nmi_count[cpu] < 2 ) + if ( per_cpu(nmi_count, cpu) - prev_nmi_count[cpu] < 2 ) { printk(" %d", cpu); ok =3D false; @@ -593,7 +592,7 @@ static void do_nmi_stats(unsigned char key) =20 printk("CPU\tNMI\n"); for_each_online_cpu ( cpu ) - printk("%3u\t%3u\n", cpu, nmi_count(cpu)); + printk("%3u\t%3u\n", cpu, per_cpu(nmi_count, cpu)); =20 if ( !hardware_domain || !(v =3D domain_vcpu(hardware_domain, 0)) ) return; diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 56067f85d1..3dbc66bb64 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1683,13 +1683,15 @@ static int dummy_nmi_callback(const struct cpu_user= _regs *regs, int cpu) =20 static nmi_callback_t *nmi_callback =3D dummy_nmi_callback; =20 +DEFINE_PER_CPU(unsigned int, nmi_count); + void do_nmi(const struct cpu_user_regs *regs) { unsigned int cpu =3D smp_processor_id(); unsigned char reason =3D 0; bool handle_unknown =3D false; =20 - ++nmi_count(cpu); + this_cpu(nmi_count)++; =20 if ( nmi_callback(regs, cpu) ) return; diff --git a/xen/include/asm-x86/nmi.h b/xen/include/asm-x86/nmi.h index f9dfca6afb..a288f02a50 100644 --- a/xen/include/asm-x86/nmi.h +++ b/xen/include/asm-x86/nmi.h @@ -31,5 +31,7 @@ nmi_callback_t *set_nmi_callback(nmi_callback_t *callback= ); * Remove the handler previously set. */ void unset_nmi_callback(void); + +DECLARE_PER_CPU(unsigned int, nmi_count); =20 #endif /* ASM_NMI_H */ --=20 2.25.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sun May 5 14:18:57 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zohomail.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=citrix.com ARC-Seal: i=1; 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x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 ip4:209.167.231.154 ip4:178.63.86.133 ip4:195.66.111.40/30 ip4:85.115.9.32/28 ip4:199.102.83.4 ip4:192.28.146.160 ip4:192.28.146.107 ip4:216.52.6.88 ip4:216.52.6.188 ip4:162.221.158.21 ip4:162.221.156.83 ip4:168.245.78.127 ~all" Received-SPF: None (esa5.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa5.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: AN9iZEfhtX8i4tJ5QYK7IOk1OXNMp5Hu6tLS9AUJjQo8NKU7/5E6prgdWvF9C8EkiTkZPaaLAr pDLBmbzRqiFITbnxOh37FvM2ycWbUle5Nck9rmVTJBesoOA0C/17Uq1S+OGJc/FDsxLZmob0ST pMyra9SdluymrJh+Fw9unlynHU30JiLWzFkU0JXIPM2F1/OK9M7KpwpuMLS2NGEX/n5JXEm0xP B3yUXxjSKn+a58ddiPgtwBPle4kX8SCZoR8VcUb0zmNx8pFRIkd3P+D/DGBGYcyR7XMK5R+D8C +vU= X-SBRS: 2.7 X-MesageID: 13255827 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.70,479,1574139600"; d="scan'208";a="13255827" From: Roger Pau Monne To: Date: Mon, 24 Feb 2020 11:46:42 +0100 Message-ID: <20200224104645.96381-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200224104645.96381-1-roger.pau@citrix.com> References: <20200224104645.96381-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 2/5] x86: track when in #NMI context X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , Julien Grall , Wei Liu , Konrad Rzeszutek Wilk , Andrew Cooper , Ian Jackson , George Dunlap , Jan Beulich , Roger Pau Monne Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Add helpers to track when running in #NMI context. This is modeled after the in_irq helpers. The SDM states that no #NMI can be delivered while handling a #NMI until the processor has executed an iret instruction. It's possible however that another fault is received while handling the #NMI (a #MC for example), and thus the iret from that fault would allow further #NMIs to be injected while still processing the previous one, and hence an integer is needed in order to keep track of in service #NMIs. While there move nmi_count() into a x86 specific header and drop the leading underscores from __nmi_count field. Note that there are no users of in_nmi() introduced by the change, further users will be added by followup changes. Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v2: - Use an integer instead of a boolean to keep track of in service #NMIs. - Move nmi_count into x86 specific header. - Drop leading underscores from __nmi_count field. --- xen/arch/x86/traps.c | 6 ++++++ xen/include/asm-x86/hardirq.h | 7 ++++++- xen/include/xen/irq_cpustat.h | 1 - 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 3dbc66bb64..f4f2c13ae9 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1692,9 +1692,13 @@ void do_nmi(const struct cpu_user_regs *regs) bool handle_unknown =3D false; =20 this_cpu(nmi_count)++; + nmi_enter(); =20 if ( nmi_callback(regs, cpu) ) + { + nmi_exit(); return; + } =20 /* * Accessing port 0x61 may trap to SMM which has been actually @@ -1720,6 +1724,8 @@ void do_nmi(const struct cpu_user_regs *regs) if ( !(reason & 0xc0) && handle_unknown ) unknown_nmi_error(regs, reason); } + + nmi_exit(); } =20 nmi_callback_t *set_nmi_callback(nmi_callback_t *callback) diff --git a/xen/include/asm-x86/hardirq.h b/xen/include/asm-x86/hardirq.h index 34e1b49260..6ccce75881 100644 --- a/xen/include/asm-x86/hardirq.h +++ b/xen/include/asm-x86/hardirq.h @@ -7,7 +7,7 @@ typedef struct { unsigned int __softirq_pending; unsigned int __local_irq_count; - unsigned int __nmi_count; + unsigned int nmi_count; bool_t __mwait_wakeup; } __cacheline_aligned irq_cpustat_t; =20 @@ -18,6 +18,11 @@ typedef struct { #define irq_enter() (local_irq_count(smp_processor_id())++) #define irq_exit() (local_irq_count(smp_processor_id())--) =20 +#define nmi_count(cpu) __IRQ_STAT((cpu), nmi_count) +#define in_nmi() (nmi_count(smp_processor_id()) !=3D 0) +#define nmi_enter() (nmi_count(smp_processor_id())++) +#define nmi_exit() (nmi_count(smp_processor_id())--) + void ack_bad_irq(unsigned int irq); =20 extern void apic_intr_init(void); diff --git a/xen/include/xen/irq_cpustat.h b/xen/include/xen/irq_cpustat.h index 73629f6ec8..b9629f25c2 100644 --- a/xen/include/xen/irq_cpustat.h +++ b/xen/include/xen/irq_cpustat.h @@ -24,7 +24,6 @@ extern irq_cpustat_t irq_stat[]; /* arch independent irq_stat fields */ #define softirq_pending(cpu) __IRQ_STAT((cpu), __softirq_pending) #define local_irq_count(cpu) __IRQ_STAT((cpu), __local_irq_count) -#define nmi_count(cpu) __IRQ_STAT((cpu), __nmi_count) #define mwait_wakeup(cpu) __IRQ_STAT((cpu), __mwait_wakeup) =20 #endif /* __irq_cpustat_h */ --=20 2.25.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sun May 5 14:18:57 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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x-conformance=sidf_compatible IronPort-SDR: AbeTJRnocntcbpq2ku7Rbj06wW0cbD3x5M8AYQfu4wfcG0Nd9DaCsT28HgkGxcO4C998Fc4bs5 OhZgut+/RAoh8ITL+OLjpvABtUt6xpPbPHAqO5NL5DrOcp+GUO7ThQlE8JzhkdZQwFCDEnrwNv BpqpwbT+wWmACSTL8trTpI2jR8k3Cv8454PqT8T5yAYem3QS+C/nJiey9rlk7C/v3X10QnED3N HvIvGN9O+63PPSCmgJLzRimqOZ2+fG2QOvEfpJ/SHPGnldKXFYtpVc/ri12Sr8zdaErsFPdI0p vq4= X-SBRS: 2.7 X-MesageID: 13255828 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.70,479,1574139600"; d="scan'208";a="13255828" From: Roger Pau Monne To: Date: Mon, 24 Feb 2020 11:46:43 +0100 Message-ID: <20200224104645.96381-4-roger.pau@citrix.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200224104645.96381-1-roger.pau@citrix.com> References: <20200224104645.96381-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 3/5] x86: track when in #MC context X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , Jan Beulich , Roger Pau Monne Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Add helpers to track when executing in #MC context. This is modeled after the in_irq helpers. Note that there are no users of in_mc() introduced by the change, further users will be added by followup changes. Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v2: - Move definition of mc_count to x86 hardirq.h. --- xen/arch/x86/cpu/mcheck/mce.c | 2 ++ xen/include/asm-x86/hardirq.h | 6 ++++++ 2 files changed, 8 insertions(+) diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c index d61e582af3..93ed5752ac 100644 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -93,7 +93,9 @@ void x86_mce_vector_register(x86_mce_vector_t hdlr) =20 void do_machine_check(const struct cpu_user_regs *regs) { + mc_enter(); _machine_check_vector(regs); + mc_exit(); } =20 /* diff --git a/xen/include/asm-x86/hardirq.h b/xen/include/asm-x86/hardirq.h index 6ccce75881..16dbe27de4 100644 --- a/xen/include/asm-x86/hardirq.h +++ b/xen/include/asm-x86/hardirq.h @@ -8,6 +8,7 @@ typedef struct { unsigned int __softirq_pending; unsigned int __local_irq_count; unsigned int nmi_count; + unsigned int mc_count; bool_t __mwait_wakeup; } __cacheline_aligned irq_cpustat_t; =20 @@ -23,6 +24,11 @@ typedef struct { #define nmi_enter() (nmi_count(smp_processor_id())++) #define nmi_exit() (nmi_count(smp_processor_id())--) =20 +#define mc_count(cpu) __IRQ_STAT((cpu), mc_count) +#define in_mc() (mc_count(smp_processor_id()) !=3D 0) +#define mc_enter() (mc_count(smp_processor_id())++) +#define mc_exit() (mc_count(smp_processor_id())--) + void ack_bad_irq(unsigned int irq); =20 extern void apic_intr_init(void); --=20 2.25.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sun May 5 14:18:57 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zohomail.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1582541269; cv=none; d=zohomail.com; s=zohoarc; b=KMfn4l4pM5FYMgaqpeXClV/R/mBmDgNcRjk0F5hrbilhn27pCPwYUgyEzQZYzr83O7nuFLXfTQvpmttDuS51bLmhK8WmhiPgY/20QeepBjRYVn4aI9rensU01LAc81ZJ2bFbq2VcbDcrhd74+UolcYnMSgqej+7+nb6S9zqGmmA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582541269; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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client-ip=162.221.158.21; receiver=esa4.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: GJZG/dvyvx4OIYRiA9zzcCEOmdD1SkvqdXwP+n2s3THK5yCojsAl+/7aDYl/jNgzSzAz3rCRLr nKwRCHyxwih1oedmOakJgNZqqNwPPBz/AXZAGiaMwzGXGmZVhOyBdSmmWOOqr994KkCOyByYZ/ RGuz7+q9w4yBz8Yyt3VZg4W4f/UlBK6Wg7hld4zT1hbGXpWJSADdI7qfMcNe1xEgbhva0AjmpH tGl9lAHY2HASOGWP2tHFHt6+j2Yp0f52E6/jxrtSFCu6d+g/z8xRePODd+0yrcUb+sA24IcG76 E+Q= X-SBRS: 2.7 X-MesageID: 13524167 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.70,479,1574139600"; d="scan'208";a="13524167" From: Roger Pau Monne To: Date: Mon, 24 Feb 2020 11:46:44 +0100 Message-ID: <20200224104645.96381-5-roger.pau@citrix.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200224104645.96381-1-roger.pau@citrix.com> References: <20200224104645.96381-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 4/5] x86/smp: use a dedicated scratch cpumask in send_IPI_mask X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Sander Eikelenboom , Wei Liu , Jan Beulich , Roger Pau Monne Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Using scratch_cpumask in send_IPI_mask is not safe because it can be called from interrupt context, and hence Xen would have to make sure all the users of the scratch cpumask disable interrupts while using it. Instead introduce a new cpumask to be used by send_IPI_mask, and disable interrupts while using it. Note that such mask cannot be used when non-maskable interrupts are being serviced (#NMI or #MC) and hence fallback to not using the shorthand in that case, like it was done previously. Fixes: 5500d265a2a8 ('x86/smp: use APIC ALLBUT destination shorthand when p= ossible') Reported-by: Sander Eikelenboom Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v2: - Fallback to the previous IPI sending mechanism in #MC or #NMI context. Changes since v1: - Don't use the shorthand when in #MC or #NMI context. --- xen/arch/x86/smp.c | 27 ++++++++++++++++++++++++++- xen/arch/x86/smpboot.c | 9 ++++++++- 2 files changed, 34 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c index 55d08c9d52..53e0de2a70 100644 --- a/xen/arch/x86/smp.c +++ b/xen/arch/x86/smp.c @@ -59,6 +59,7 @@ static void send_IPI_shortcut(unsigned int shortcut, int = vector, apic_write(APIC_ICR, cfg); } =20 +DECLARE_PER_CPU(cpumask_var_t, send_ipi_cpumask); /* * send_IPI_mask(cpumask, vector): sends @vector IPI to CPUs in @cpumask, * excluding the local CPU. @cpumask may be empty. @@ -67,7 +68,21 @@ static void send_IPI_shortcut(unsigned int shortcut, int= vector, void send_IPI_mask(const cpumask_t *mask, int vector) { bool cpus_locked =3D false; - cpumask_t *scratch =3D this_cpu(scratch_cpumask); + cpumask_t *scratch =3D this_cpu(send_ipi_cpumask); + unsigned long flags; + + if ( in_mc() || in_nmi() ) + { + /* + * When in #NMI or #MC context fallback to the old (and simpler) I= PI + * sending routine, and avoid doing any performance optimizations = (like + * using a shorthand). Sending an IPI from such contexts is likely= a + * sign of a crash, and hence we would like to avoid as much compl= exity + * as possible in order to make sure the IPI is delivered. + */ + alternative_vcall(genapic.send_IPI_mask, mask, vector); + return; + } =20 /* * This can only be safely used when no CPU hotplug or unplug operatio= ns @@ -81,7 +96,15 @@ void send_IPI_mask(const cpumask_t *mask, int vector) local_irq_is_enabled() && (cpus_locked =3D get_cpu_maps()) && (park_offline_cpus || cpumask_equal(&cpu_online_map, &cpu_present_map)) ) + { + /* + * send_IPI_mask can be called from interrupt context, and hence we + * need to disable interrupts in order to protect the per-cpu + * send_ipi_cpumask while being used. + */ + local_irq_save(flags); cpumask_or(scratch, mask, cpumask_of(smp_processor_id())); + } else { if ( cpus_locked ) @@ -89,6 +112,7 @@ void send_IPI_mask(const cpumask_t *mask, int vector) put_cpu_maps(); cpus_locked =3D false; } + local_irq_save(flags); cpumask_clear(scratch); } =20 @@ -97,6 +121,7 @@ void send_IPI_mask(const cpumask_t *mask, int vector) else alternative_vcall(genapic.send_IPI_mask, mask, vector); =20 + local_irq_restore(flags); if ( cpus_locked ) put_cpu_maps(); } diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index e83e4564a4..82e89201b3 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -57,6 +57,9 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_mask); DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, scratch_cpumask); static cpumask_t scratch_cpu0mask; =20 +DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, send_ipi_cpumask); +static cpumask_t send_ipi_cpu0mask; + cpumask_t cpu_online_map __read_mostly; EXPORT_SYMBOL(cpu_online_map); =20 @@ -930,6 +933,8 @@ static void cpu_smpboot_free(unsigned int cpu, bool rem= ove) FREE_CPUMASK_VAR(per_cpu(cpu_core_mask, cpu)); if ( per_cpu(scratch_cpumask, cpu) !=3D &scratch_cpu0mask ) FREE_CPUMASK_VAR(per_cpu(scratch_cpumask, cpu)); + if ( per_cpu(send_ipi_cpumask, cpu) !=3D &send_ipi_cpu0mask ) + FREE_CPUMASK_VAR(per_cpu(send_ipi_cpumask, cpu)); } =20 cleanup_cpu_root_pgt(cpu); @@ -1034,7 +1039,8 @@ static int cpu_smpboot_alloc(unsigned int cpu) =20 if ( !(cond_zalloc_cpumask_var(&per_cpu(cpu_sibling_mask, cpu)) && cond_zalloc_cpumask_var(&per_cpu(cpu_core_mask, cpu)) && - cond_alloc_cpumask_var(&per_cpu(scratch_cpumask, cpu))) ) + cond_alloc_cpumask_var(&per_cpu(scratch_cpumask, cpu)) && + cond_alloc_cpumask_var(&per_cpu(send_ipi_cpumask, cpu))) ) goto out; =20 rc =3D 0; @@ -1175,6 +1181,7 @@ void __init smp_prepare_boot_cpu(void) cpumask_set_cpu(cpu, &cpu_present_map); #if NR_CPUS > 2 * BITS_PER_LONG per_cpu(scratch_cpumask, cpu) =3D &scratch_cpu0mask; + per_cpu(send_ipi_cpumask, cpu) =3D &send_ipi_cpu0mask; #endif =20 get_cpu_info()->use_pv_cr3 =3D false; --=20 2.25.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sun May 5 14:18:57 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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x-conformance=sidf_compatible IronPort-SDR: brrJLQlv4eRsM57S4OM5YGZUX2fZaATHGHV4GzEitAq3ZfTtgq+Wo/TuIXMco3br4JtuMOm+L8 yT8OS/24trKJb95P1XLk56pHXbN9GwUUSlBEvARNI77nRBpVchBW/ifU0GnInTb3sL8OUZPvCF pFZXCv7gQStj3z6wakYPCeMuKbocYJK9f2UkJhWWhQNbubuJp3niJlSSUYhRWXcp8KKc3+Bdqy tlSILcvvRbEySpE+7rjzeMTnYpcxUNBVs4qjD7TU4qUTKswz7xIYsDRTI72C1R8MVgpM0otvfy +nw= X-SBRS: 2.7 X-MesageID: 13255833 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.70,479,1574139600"; d="scan'208";a="13255833" From: Roger Pau Monne To: Date: Mon, 24 Feb 2020 11:46:45 +0100 Message-ID: <20200224104645.96381-6-roger.pau@citrix.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200224104645.96381-1-roger.pau@citrix.com> References: <20200224104645.96381-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 5/5] x86: add accessors for scratch cpu mask X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , Jan Beulich , Roger Pau Monne Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Current usage of the per-CPU scratch cpumask is dangerous since there's no way to figure out if the mask is already being used except for manual code inspection of all the callers and possible call paths. This is unsafe and not reliable, so introduce a minimal get/put infrastructure to prevent nested usage of the scratch mask and usage in interrupt context. Move the declaration of scratch_cpumask to smp.c in order to place the declaration and the accessors as close as possible. Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v1: - Use __builtin_return_address(0) instead of __func__. - Move declaration of scratch_cpumask and scratch_cpumask accessor to smp.c. - Do not allow usage in #MC or #NMI context. --- xen/arch/x86/io_apic.c | 6 ++++-- xen/arch/x86/irq.c | 13 ++++++++++--- xen/arch/x86/mm.c | 30 +++++++++++++++++++++--------- xen/arch/x86/msi.c | 4 +++- xen/arch/x86/smp.c | 25 +++++++++++++++++++++++++ xen/arch/x86/smpboot.c | 1 - xen/include/asm-x86/smp.h | 10 ++++++++++ 7 files changed, 73 insertions(+), 16 deletions(-) diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index e98e08e9c8..4ee261b632 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -2236,10 +2236,11 @@ int io_apic_set_pci_routing (int ioapic, int pin, i= nt irq, int edge_level, int a entry.vector =3D vector; =20 if (cpumask_intersects(desc->arch.cpu_mask, TARGET_CPUS)) { - cpumask_t *mask =3D this_cpu(scratch_cpumask); + cpumask_t *mask =3D get_scratch_cpumask(); =20 cpumask_and(mask, desc->arch.cpu_mask, TARGET_CPUS); SET_DEST(entry, logical, cpu_mask_to_apicid(mask)); + put_scratch_cpumask(); } else { printk(XENLOG_ERR "IRQ%d: no target CPU (%*pb vs %*pb)\n", irq, CPUMASK_PR(desc->arch.cpu_mask), CPUMASK_PR(TARGET_CPU= S)); @@ -2433,10 +2434,11 @@ int ioapic_guest_write(unsigned long physbase, unsi= gned int reg, u32 val) =20 if ( cpumask_intersects(desc->arch.cpu_mask, TARGET_CPUS) ) { - cpumask_t *mask =3D this_cpu(scratch_cpumask); + cpumask_t *mask =3D get_scratch_cpumask(); =20 cpumask_and(mask, desc->arch.cpu_mask, TARGET_CPUS); SET_DEST(rte, logical, cpu_mask_to_apicid(mask)); + put_scratch_cpumask(); } else { diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index cc2eb8e925..7ecf5376e3 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -196,7 +196,7 @@ static void _clear_irq_vector(struct irq_desc *desc) { unsigned int cpu, old_vector, irq =3D desc->irq; unsigned int vector =3D desc->arch.vector; - cpumask_t *tmp_mask =3D this_cpu(scratch_cpumask); + cpumask_t *tmp_mask =3D get_scratch_cpumask(); =20 BUG_ON(!valid_irq_vector(vector)); =20 @@ -223,7 +223,10 @@ static void _clear_irq_vector(struct irq_desc *desc) trace_irq_mask(TRC_HW_IRQ_CLEAR_VECTOR, irq, vector, tmp_mask); =20 if ( likely(!desc->arch.move_in_progress) ) + { + put_scratch_cpumask(); return; + } =20 /* If we were in motion, also clear desc->arch.old_vector */ old_vector =3D desc->arch.old_vector; @@ -236,6 +239,7 @@ static void _clear_irq_vector(struct irq_desc *desc) per_cpu(vector_irq, cpu)[old_vector] =3D ~irq; } =20 + put_scratch_cpumask(); release_old_vec(desc); =20 desc->arch.move_in_progress =3D 0; @@ -1152,10 +1156,11 @@ static void irq_guest_eoi_timer_fn(void *data) break; =20 case ACKTYPE_EOI: - cpu_eoi_map =3D this_cpu(scratch_cpumask); + cpu_eoi_map =3D get_scratch_cpumask(); cpumask_copy(cpu_eoi_map, action->cpu_eoi_map); spin_unlock_irq(&desc->lock); on_selected_cpus(cpu_eoi_map, set_eoi_ready, desc, 0); + put_scratch_cpumask(); return; } =20 @@ -2531,12 +2536,12 @@ void fixup_irqs(const cpumask_t *mask, bool verbose) unsigned int irq; static int warned; struct irq_desc *desc; + cpumask_t *affinity =3D get_scratch_cpumask(); =20 for ( irq =3D 0; irq < nr_irqs; irq++ ) { bool break_affinity =3D false, set_affinity =3D true; unsigned int vector; - cpumask_t *affinity =3D this_cpu(scratch_cpumask); =20 if ( irq =3D=3D 2 ) continue; @@ -2640,6 +2645,8 @@ void fixup_irqs(const cpumask_t *mask, bool verbose) irq, CPUMASK_PR(affinity)); } =20 + put_scratch_cpumask(); + /* That doesn't seem sufficient. Give it 1ms. */ local_irq_enable(); mdelay(1); diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 70b87c4830..0320a9ad98 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -1262,7 +1262,7 @@ void put_page_from_l1e(l1_pgentry_t l1e, struct domai= n *l1e_owner) (l1e_owner =3D=3D pg_owner) ) { struct vcpu *v; - cpumask_t *mask =3D this_cpu(scratch_cpumask); + cpumask_t *mask =3D get_scratch_cpumask(); =20 cpumask_clear(mask); =20 @@ -1279,6 +1279,7 @@ void put_page_from_l1e(l1_pgentry_t l1e, struct domai= n *l1e_owner) =20 if ( !cpumask_empty(mask) ) flush_tlb_mask(mask); + put_scratch_cpumask(); } #endif /* CONFIG_PV_LDT_PAGING */ put_page(page); @@ -2903,7 +2904,7 @@ static int _get_page_type(struct page_info *page, uns= igned long type, * vital that no other CPUs are left with mappings of a fr= ame * which is about to become writeable to the guest. */ - cpumask_t *mask =3D this_cpu(scratch_cpumask); + cpumask_t *mask =3D get_scratch_cpumask(); =20 BUG_ON(in_irq()); cpumask_copy(mask, d->dirty_cpumask); @@ -2919,6 +2920,7 @@ static int _get_page_type(struct page_info *page, uns= igned long type, perfc_incr(need_flush_tlb_flush); flush_tlb_mask(mask); } + put_scratch_cpumask(); =20 /* We lose existing type and validity. */ nx &=3D ~(PGT_type_mask | PGT_validated); @@ -3635,7 +3637,7 @@ long do_mmuext_op( case MMUEXT_TLB_FLUSH_MULTI: case MMUEXT_INVLPG_MULTI: { - cpumask_t *mask =3D this_cpu(scratch_cpumask); + cpumask_t *mask =3D get_scratch_cpumask(); =20 if ( unlikely(currd !=3D pg_owner) ) rc =3D -EPERM; @@ -3645,12 +3647,17 @@ long do_mmuext_op( mask)) ) rc =3D -EINVAL; if ( unlikely(rc) ) + { + put_scratch_cpumask(); break; + } =20 if ( op.cmd =3D=3D MMUEXT_TLB_FLUSH_MULTI ) flush_tlb_mask(mask); else if ( __addr_ok(op.arg1.linear_addr) ) flush_tlb_one_mask(mask, op.arg1.linear_addr); + put_scratch_cpumask(); + break; } =20 @@ -3683,7 +3690,7 @@ long do_mmuext_op( else if ( likely(cache_flush_permitted(currd)) ) { unsigned int cpu; - cpumask_t *mask =3D this_cpu(scratch_cpumask); + cpumask_t *mask =3D get_scratch_cpumask(); =20 cpumask_clear(mask); for_each_online_cpu(cpu) @@ -3691,6 +3698,7 @@ long do_mmuext_op( per_cpu(cpu_sibling_mask, cpu= )) ) __cpumask_set_cpu(cpu, mask); flush_mask(mask, FLUSH_CACHE); + put_scratch_cpumask(); } else rc =3D -EINVAL; @@ -4156,12 +4164,13 @@ long do_mmu_update( * Force other vCPU-s of the affected guest to pick up L4 entry * changes (if any). */ - unsigned int cpu =3D smp_processor_id(); - cpumask_t *mask =3D per_cpu(scratch_cpumask, cpu); + cpumask_t *mask =3D get_scratch_cpumask(); =20 - cpumask_andnot(mask, pt_owner->dirty_cpumask, cpumask_of(cpu)); + cpumask_andnot(mask, pt_owner->dirty_cpumask, + cpumask_of(smp_processor_id())); if ( !cpumask_empty(mask) ) flush_mask(mask, FLUSH_TLB_GLOBAL | FLUSH_ROOT_PGTBL); + put_scratch_cpumask(); } =20 perfc_add(num_page_updates, i); @@ -4353,7 +4362,7 @@ static int __do_update_va_mapping( mask =3D d->dirty_cpumask; break; default: - mask =3D this_cpu(scratch_cpumask); + mask =3D get_scratch_cpumask(); rc =3D vcpumask_to_pcpumask(d, const_guest_handle_from_ptr(bma= p_ptr, void), mask); @@ -4373,7 +4382,7 @@ static int __do_update_va_mapping( mask =3D d->dirty_cpumask; break; default: - mask =3D this_cpu(scratch_cpumask); + mask =3D get_scratch_cpumask(); rc =3D vcpumask_to_pcpumask(d, const_guest_handle_from_ptr(bma= p_ptr, void), mask); @@ -4384,6 +4393,9 @@ static int __do_update_va_mapping( break; } =20 + if ( mask && mask !=3D d->dirty_cpumask ) + put_scratch_cpumask(); + return rc; } =20 diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c index 161ee60dbe..6624ea20d0 100644 --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -159,13 +159,15 @@ void msi_compose_msg(unsigned vector, const cpumask_t= *cpu_mask, struct msi_msg =20 if ( cpu_mask ) { - cpumask_t *mask =3D this_cpu(scratch_cpumask); + cpumask_t *mask; =20 if ( !cpumask_intersects(cpu_mask, &cpu_online_map) ) return; =20 + mask =3D get_scratch_cpumask(); cpumask_and(mask, cpu_mask, &cpu_online_map); msg->dest32 =3D cpu_mask_to_apicid(mask); + put_scratch_cpumask(); } =20 msg->address_hi =3D MSI_ADDR_BASE_HI; diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c index 53e0de2a70..4d9640d135 100644 --- a/xen/arch/x86/smp.c +++ b/xen/arch/x86/smp.c @@ -25,6 +25,31 @@ #include #include =20 +DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, scratch_cpumask); + +#ifndef NDEBUG +cpumask_t *scratch_cpumask(bool use) +{ + static DEFINE_PER_CPU(void *, scratch_cpumask_use); + + /* + * Due to reentrancy scratch cpumask cannot be used in IRQ, #MC or #NMI + * context. + */ + BUG_ON(in_irq() || in_mc() || in_nmi()); + + if ( use && unlikely(this_cpu(scratch_cpumask_use)) ) + { + printk("%p: scratch CPU mask already in use by %p\n", + __builtin_return_address(0), this_cpu(scratch_cpumask_use)); + BUG(); + } + this_cpu(scratch_cpumask_use) =3D use ? __builtin_return_address(0) : = NULL; + + return use ? this_cpu(scratch_cpumask) : NULL; +} +#endif + /* Helper functions to prepare APIC register values. */ static unsigned int prepare_ICR(unsigned int shortcut, int vector) { diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index 82e89201b3..a2ac3adb38 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -54,7 +54,6 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_mas= k); /* representing HT and core siblings of each logical CPU */ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_mask); =20 -DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, scratch_cpumask); static cpumask_t scratch_cpu0mask; =20 DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, send_ipi_cpumask); diff --git a/xen/include/asm-x86/smp.h b/xen/include/asm-x86/smp.h index 92d69a5ea0..40ab6c251d 100644 --- a/xen/include/asm-x86/smp.h +++ b/xen/include/asm-x86/smp.h @@ -23,6 +23,16 @@ DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_mask); DECLARE_PER_CPU(cpumask_var_t, cpu_core_mask); DECLARE_PER_CPU(cpumask_var_t, scratch_cpumask); =20 +#ifndef NDEBUG +/* Not to be called directly, use {get/put}_scratch_cpumask(). */ +cpumask_t *scratch_cpumask(bool use); +#define get_scratch_cpumask() scratch_cpumask(true) +#define put_scratch_cpumask() ((void)scratch_cpumask(false)) +#else +#define get_scratch_cpumask() this_cpu(scratch_cpumask) +#define put_scratch_cpumask() +#endif + /* * Do we, for platform reasons, need to actually keep CPUs online when we * would otherwise prefer them to be off? --=20 2.25.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel