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x-conformance=sidf_compatible IronPort-SDR: cE4m9k/zPM5WJf3mhiYs7V1vIfbJXRIS7hzsdgCr8lZX/XKvdSjYcibgbMtwpOHij8q6QMMv5h Phy1Q0YuRyNt/1HJqDoi1KDg7yth+x5jI2skMdnhcP07PVJkCDWH4WwOppzFTmYqygsnnBbj6p txLmaemHrCAOrsb+tQTclaW+5Vx2ayqiIX798WUoixpIVdMJZxc7DdhV7X8CHoEK6gRTqy270y OPdTsxVyGgIZVDLMHynuoOrdtRKDo1QAdH3zQoJjg0CDFPHH2a39OgTmhedQs/cBR0kfacKdYV NAc= X-SBRS: 2.7 X-MesageID: 10897368 X-Ironport-Server: esa2.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.69,432,1571716800"; d="scan'208";a="10897368" From: Andrew Cooper To: Xen-devel Date: Tue, 14 Jan 2020 12:39:21 +0000 Message-ID: <20200114123921.30850-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 Subject: [Xen-devel] [PATCH] tools/libxc: Construct 32bit PV guests with L3 A/D bits set X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Ian Jackson , Wei Liu , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) With the 32 PAE build of Xen gone, 32bit PV guests' top level pagetables no longer behave exactly like PAE in hardware. They should have A/D bits set, for the same performance reasons as apply to other levels. This brings the domain builder in line with how Xen construc= ts a 32bit dom0. As a purely code improvement, make use of range notation to initialise identical values in adjacent array elements. Signed-off-by: Andrew Cooper Acked-by: Wei Liu Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Wei Liu CC: Roger Pau Monn=C3=A9 CC: Ian Jackson It turns out that neither Xen nor libxc sets dirty bits on L1 pagetables, b= ut I can't spot any documented reason for this. My best guess is to avoid hav= ing D/RO mappings of pagetables, but this isn't going to trip up a PV guest to begin with. Thoughts on reducing the performance cost there as well? --- tools/libxc/xc_dom_x86.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/tools/libxc/xc_dom_x86.c b/tools/libxc/xc_dom_x86.c index 1897decedb..425b129146 100644 --- a/tools/libxc/xc_dom_x86.c +++ b/tools/libxc/xc_dom_x86.c @@ -277,8 +277,8 @@ static int alloc_pgtables_x86_32_pae(struct xc_dom_imag= e *dom) .levels =3D PGTBL_LEVELS_I386, .vaddr_mask =3D bits_to_mask(VIRT_BITS_I386), .lvl_prot[0] =3D _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED, - .lvl_prot[1] =3D _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY= |_PAGE_USER, - .lvl_prot[2] =3D _PAGE_PRESENT, + .lvl_prot[1 ... 2] =3D + _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER, }; struct xc_dom_image_x86 *domx86 =3D dom->arch_private; =20 @@ -488,9 +488,8 @@ static int alloc_pgtables_x86_64(struct xc_dom_image *d= om) .levels =3D PGTBL_LEVELS_X86_64, .vaddr_mask =3D bits_to_mask(VIRT_BITS_X86_64), .lvl_prot[0] =3D _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED, - .lvl_prot[1] =3D _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY= |_PAGE_USER, - .lvl_prot[2] =3D _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY= |_PAGE_USER, - .lvl_prot[3] =3D _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY= |_PAGE_USER, + .lvl_prot[1 ... 3] =3D + _PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER, }; struct xc_dom_image_x86 *domx86 =3D dom->arch_private; =20 --=20 2.11.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel