From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571156912; cv=none; d=zoho.com; s=zohoarc; b=LbW3zaFE3Mn0lnE5eB4I5VDz+V+LBRW2HNl94XQ0DyyrIFuXbK4th6qbVFienPjmzJEDtG/cEjG5o5CM2xa7i0/ctxCRCDcYaRw1+iWLGSqDb7n5FMh4OIHf2wklXJOFzsbwmSCTV1INCUNA8Nq+EA/rwc9ieYfybwqE/F8qm4Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571156912; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=rnxjfmFu9mM1NZ4/fC31oF86cWvhOY22D1SqHnSVP8Q=; b=eYj1YfhgZBCc0aKJg/zaU/esL6LenXvTRKgVGqNQL5OpfP0cTYl+MTtyWDRt/tsuzE8KI9L0eYZmKltj7KcSWISkTHhyHeQ3zpnIz/ApBIemOyYYH/nVtFXfPgYbV1g8Gn+Fkb2quSmbFYrQFguPib5L4HBO9YsOzaFg9PhdfWU= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571156912341860.4622491379312; Tue, 15 Oct 2019 09:28:32 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPfW-0002ys-Cy; Tue, 15 Oct 2019 16:27:30 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPfU-0002yb-U3 for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:27:28 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id adb7c6ae-ef68-11e9-9396-12813bfff9fa; Tue, 15 Oct 2019 16:27:28 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BEB018E1CF1; Tue, 15 Oct 2019 16:27:27 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BB9AE19C58; Tue, 15 Oct 2019 16:27:20 +0000 (UTC) X-Inumbo-ID: adb7c6ae-ef68-11e9-9396-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:34 +0200 Message-Id: <20191015162705.28087-2-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.69]); Tue, 15 Oct 2019 16:27:27 +0000 (UTC) Subject: [Xen-devel] [PATCH 01/32] hw/i386: Remove obsolete LoadStateHandler::load_state_old handlers X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Peter Maydell , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" These devices implemented their load_state_old() handler 10 years ago, previous to QEMU v0.12. Since commit cc425b5ddf removed the pc-0.10 and pc-0.11 machines, we can drop this code. Note: the mips_r4k machine started to use the i8254 device just after QEMU v0.5.0, but the MIPS machine types are not versioned, so there is no migration compatibility issue removing this handler. Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/acpi/piix4.c | 40 --------------------------------- hw/intc/apic_common.c | 49 ----------------------------------------- hw/pci-host/piix.c | 25 --------------------- hw/timer/i8254_common.c | 40 --------------------------------- 4 files changed, 154 deletions(-) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 5742c3df87..1d29d438c7 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -42,7 +42,6 @@ #include "hw/acpi/memory_hotplug.h" #include "hw/acpi/acpi_dev_interface.h" #include "hw/xen/xen.h" -#include "migration/qemu-file-types.h" #include "migration/vmstate.h" #include "hw/core/cpu.h" #include "trace.h" @@ -205,43 +204,6 @@ static const VMStateDescription vmstate_pci_status =3D= { } }; =20 -static int acpi_load_old(QEMUFile *f, void *opaque, int version_id) -{ - PIIX4PMState *s =3D opaque; - int ret, i; - uint16_t temp; - - ret =3D pci_device_load(PCI_DEVICE(s), f); - if (ret < 0) { - return ret; - } - qemu_get_be16s(f, &s->ar.pm1.evt.sts); - qemu_get_be16s(f, &s->ar.pm1.evt.en); - qemu_get_be16s(f, &s->ar.pm1.cnt.cnt); - - ret =3D vmstate_load_state(f, &vmstate_apm, &s->apm, 1); - if (ret) { - return ret; - } - - timer_get(f, s->ar.tmr.timer); - qemu_get_sbe64s(f, &s->ar.tmr.overflow_time); - - qemu_get_be16s(f, (uint16_t *)s->ar.gpe.sts); - for (i =3D 0; i < 3; i++) { - qemu_get_be16s(f, &temp); - } - - qemu_get_be16s(f, (uint16_t *)s->ar.gpe.en); - for (i =3D 0; i < 3; i++) { - qemu_get_be16s(f, &temp); - } - - ret =3D vmstate_load_state(f, &vmstate_pci_status, - &s->acpi_pci_hotplug.acpi_pcihp_pci_status[ACPI_PCIHP_BSEL_DEFAULT= ], 1); - return ret; -} - static bool vmstate_test_use_acpi_pci_hotplug(void *opaque, int version_id) { PIIX4PMState *s =3D opaque; @@ -313,8 +275,6 @@ static const VMStateDescription vmstate_acpi =3D { .name =3D "piix4_pm", .version_id =3D 3, .minimum_version_id =3D 3, - .minimum_version_id_old =3D 1, - .load_state_old =3D acpi_load_old, .post_load =3D vmstate_acpi_post_load, .fields =3D (VMStateField[]) { VMSTATE_PCI_DEVICE(parent_obj, PIIX4PMState), diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index aafd8e0e33..375cb6abe9 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -31,7 +31,6 @@ #include "sysemu/kvm.h" #include "hw/qdev-properties.h" #include "hw/sysbus.h" -#include "migration/qemu-file-types.h" #include "migration/vmstate.h" =20 static int apic_irq_delivered; @@ -262,52 +261,6 @@ static void apic_reset_common(DeviceState *dev) apic_init_reset(dev); } =20 -/* This function is only used for old state version 1 and 2 */ -static int apic_load_old(QEMUFile *f, void *opaque, int version_id) -{ - APICCommonState *s =3D opaque; - APICCommonClass *info =3D APIC_COMMON_GET_CLASS(s); - int i; - - if (version_id > 2) { - return -EINVAL; - } - - /* XXX: what if the base changes? (registered memory regions) */ - qemu_get_be32s(f, &s->apicbase); - qemu_get_8s(f, &s->id); - qemu_get_8s(f, &s->arb_id); - qemu_get_8s(f, &s->tpr); - qemu_get_be32s(f, &s->spurious_vec); - qemu_get_8s(f, &s->log_dest); - qemu_get_8s(f, &s->dest_mode); - for (i =3D 0; i < 8; i++) { - qemu_get_be32s(f, &s->isr[i]); - qemu_get_be32s(f, &s->tmr[i]); - qemu_get_be32s(f, &s->irr[i]); - } - for (i =3D 0; i < APIC_LVT_NB; i++) { - qemu_get_be32s(f, &s->lvt[i]); - } - qemu_get_be32s(f, &s->esr); - qemu_get_be32s(f, &s->icr[0]); - qemu_get_be32s(f, &s->icr[1]); - qemu_get_be32s(f, &s->divide_conf); - s->count_shift =3D qemu_get_be32(f); - qemu_get_be32s(f, &s->initial_count); - s->initial_count_load_time =3D qemu_get_be64(f); - s->next_time =3D qemu_get_be64(f); - - if (version_id >=3D 2) { - s->timer_expiry =3D qemu_get_be64(f); - } - - if (info->post_load) { - info->post_load(s); - } - return 0; -} - static const VMStateDescription vmstate_apic_common; =20 static void apic_common_realize(DeviceState *dev, Error **errp) @@ -408,8 +361,6 @@ static const VMStateDescription vmstate_apic_common =3D= { .name =3D "apic", .version_id =3D 3, .minimum_version_id =3D 3, - .minimum_version_id_old =3D 1, - .load_state_old =3D apic_load_old, .pre_load =3D apic_pre_load, .pre_save =3D apic_dispatch_pre_save, .post_load =3D apic_dispatch_post_load, diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 135c645535..2f4cbcbfe9 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -33,7 +33,6 @@ #include "qapi/error.h" #include "qemu/range.h" #include "hw/xen/xen.h" -#include "migration/qemu-file-types.h" #include "migration/vmstate.h" #include "hw/pci-host/pam.h" #include "sysemu/reset.h" @@ -174,28 +173,6 @@ static void i440fx_write_config(PCIDevice *dev, } } =20 -static int i440fx_load_old(QEMUFile* f, void *opaque, int version_id) -{ - PCII440FXState *d =3D opaque; - PCIDevice *pd =3D PCI_DEVICE(d); - int ret, i; - uint8_t smm_enabled; - - ret =3D pci_device_load(pd, f); - if (ret < 0) - return ret; - i440fx_update_memory_mappings(d); - qemu_get_8s(f, &smm_enabled); - - if (version_id =3D=3D 2) { - for (i =3D 0; i < PIIX_NUM_PIRQS; i++) { - qemu_get_be32(f); /* dummy load for compatibility */ - } - } - - return 0; -} - static int i440fx_post_load(void *opaque, int version_id) { PCII440FXState *d =3D opaque; @@ -208,8 +185,6 @@ static const VMStateDescription vmstate_i440fx =3D { .name =3D "I440FX", .version_id =3D 3, .minimum_version_id =3D 3, - .minimum_version_id_old =3D 1, - .load_state_old =3D i440fx_load_old, .post_load =3D i440fx_post_load, .fields =3D (VMStateField[]) { VMSTATE_PCI_DEVICE(parent_obj, PCII440FXState), diff --git a/hw/timer/i8254_common.c b/hw/timer/i8254_common.c index 57bf10cc94..050875b497 100644 --- a/hw/timer/i8254_common.c +++ b/hw/timer/i8254_common.c @@ -29,7 +29,6 @@ #include "qemu/timer.h" #include "hw/timer/i8254.h" #include "hw/timer/i8254_internal.h" -#include "migration/qemu-file-types.h" #include "migration/vmstate.h" =20 /* val must be 0 or 1 */ @@ -202,43 +201,6 @@ static const VMStateDescription vmstate_pit_channel = =3D { } }; =20 -static int pit_load_old(QEMUFile *f, void *opaque, int version_id) -{ - PITCommonState *pit =3D opaque; - PITCommonClass *c =3D PIT_COMMON_GET_CLASS(pit); - PITChannelState *s; - int i; - - if (version_id !=3D 1) { - return -EINVAL; - } - - for (i =3D 0; i < 3; i++) { - s =3D &pit->channels[i]; - s->count =3D qemu_get_be32(f); - qemu_get_be16s(f, &s->latched_count); - qemu_get_8s(f, &s->count_latched); - qemu_get_8s(f, &s->status_latched); - qemu_get_8s(f, &s->status); - qemu_get_8s(f, &s->read_state); - qemu_get_8s(f, &s->write_state); - qemu_get_8s(f, &s->write_latch); - qemu_get_8s(f, &s->rw_mode); - qemu_get_8s(f, &s->mode); - qemu_get_8s(f, &s->bcd); - qemu_get_8s(f, &s->gate); - s->count_load_time =3D qemu_get_be64(f); - s->irq_disabled =3D 0; - if (i =3D=3D 0) { - s->next_transition_time =3D qemu_get_be64(f); - } - } - if (c->post_load) { - c->post_load(pit); - } - return 0; -} - static int pit_dispatch_pre_save(void *opaque) { PITCommonState *s =3D opaque; @@ -266,8 +228,6 @@ static const VMStateDescription vmstate_pit_common =3D { .name =3D "i8254", .version_id =3D 3, .minimum_version_id =3D 2, - .minimum_version_id_old =3D 1, - .load_state_old =3D pit_load_old, .pre_save =3D pit_dispatch_pre_save, .post_load =3D pit_dispatch_post_load, .fields =3D (VMStateField[]) { --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; 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Tue, 15 Oct 2019 16:27:38 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3E3A819C58; Tue, 15 Oct 2019 16:27:28 +0000 (UTC) X-Inumbo-ID: b444d296-ef68-11e9-9396-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:35 +0200 Message-Id: <20191015162705.28087-3-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.70]); Tue, 15 Oct 2019 16:27:39 +0000 (UTC) Subject: [Xen-devel] [PATCH 02/32] hw/i386/pc: Move kvm_i8259_init() declaration to sysemu/kvm.h X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Move the KVM-related call to "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/i386/pc.h | 1 - include/sysemu/kvm.h | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 6df4f4b6fb..09e74e7764 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -158,7 +158,6 @@ typedef struct PCMachineClass { =20 extern DeviceState *isa_pic; qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); -qemu_irq *kvm_i8259_init(ISABus *bus); int pic_read_irq(DeviceState *d); int pic_get_output(DeviceState *d); =20 diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 9d143282bc..da8aa9f5a8 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -513,6 +513,7 @@ void kvm_irqchip_set_qemuirq_gsi(KVMState *s, qemu_irq = irq, int gsi); void kvm_pc_gsi_handler(void *opaque, int n, int level); void kvm_pc_setup_irq_routing(bool pci_enabled); void kvm_init_irq_routing(KVMState *s); +qemu_irq *kvm_i8259_init(ISABus *bus); =20 /** * kvm_arch_irqchip_create: --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571156939; cv=none; d=zoho.com; s=zohoarc; b=Y+UDK8JtbpAXqxbBXN8DbW7UBSPrbHCR0wODpCHwTwfQRuQ9Vp7ZggSUdpgPuVqYIOIExYBaUBG2gGDdYRvCt5qPy5s7DPa2T9yVewAAlD+jn9fIebuBthMqRd4Td5Q1+ZoUwa3Jby6W76a7CkHWltSBYI6HMyduyKfIyYgeyxw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571156939; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=dogH8vyIIDHkvMDENHW908kRf8EZjviLxCn+jJMUrlo=; b=UWYpJoOi09DJOHZ+JTJRpGlNEiHjkrQTWwlkt/ITqs7lC+AGlDi+018MQ+/PVm/9AQCHjEfo22PhnWE49N4MmlxzlIFWoEw/zRL60lIbuf/2c+ygxtgddHKAbB3yOMMIxb+iIX9pD8E18BLU8yamGsfLscBsEBcoZqJb4eefWIg= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571156939105562.841467450393; Tue, 15 Oct 2019 09:28:59 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPfp-00033e-0U; Tue, 15 Oct 2019 16:27:49 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPfo-00033K-0g for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:27:48 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id b86b4c1a-ef68-11e9-beca-bc764e2007e4; Tue, 15 Oct 2019 16:27:46 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D8FE52A09AA; Tue, 15 Oct 2019 16:27:45 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id ACF8119C69; Tue, 15 Oct 2019 16:27:39 +0000 (UTC) X-Inumbo-ID: b86b4c1a-ef68-11e9-beca-bc764e2007e4 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:36 +0200 Message-Id: <20191015162705.28087-4-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Tue, 15 Oct 2019 16:27:46 +0000 (UTC) Subject: [Xen-devel] [PATCH 03/32] mc146818rtc: move structure to header file X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Herv=C3=A9 Poussineau We are now able to embed a timer in another object. Acked-by: Michael S. Tsirkin Acked-by: Paolo Bonzini Signed-off-by: Herv=C3=A9 Poussineau Message-Id: <20171216090228.28505-4-hpoussin@reactos.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/timer/mc146818rtc.c | 30 ------------------------------ include/hw/timer/mc146818rtc.h | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+), 30 deletions(-) diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c index 6cb378751b..e40b54e743 100644 --- a/hw/timer/mc146818rtc.c +++ b/hw/timer/mc146818rtc.c @@ -71,36 +71,6 @@ #define RTC_CLOCK_RATE 32768 #define UIP_HOLD_LENGTH (8 * NANOSECONDS_PER_SECOND / 32768) =20 -#define MC146818_RTC(obj) OBJECT_CHECK(RTCState, (obj), TYPE_MC146818_RTC) - -typedef struct RTCState { - ISADevice parent_obj; - - MemoryRegion io; - MemoryRegion coalesced_io; - uint8_t cmos_data[128]; - uint8_t cmos_index; - int32_t base_year; - uint64_t base_rtc; - uint64_t last_update; - int64_t offset; - qemu_irq irq; - int it_shift; - /* periodic timer */ - QEMUTimer *periodic_timer; - int64_t next_periodic_time; - /* update-ended timer */ - QEMUTimer *update_timer; - uint64_t next_alarm_time; - uint16_t irq_reinject_on_ack_count; - uint32_t irq_coalesced; - uint32_t period; - QEMUTimer *coalesced_timer; - LostTickPolicy lost_tick_policy; - Notifier suspend_notifier; - QLIST_ENTRY(RTCState) link; -} RTCState; - static void rtc_set_time(RTCState *s); static void rtc_update_time(RTCState *s); static void rtc_set_cmos(RTCState *s, const struct tm *tm); diff --git a/include/hw/timer/mc146818rtc.h b/include/hw/timer/mc146818rtc.h index fe6ed63f71..0f1c886e5b 100644 --- a/include/hw/timer/mc146818rtc.h +++ b/include/hw/timer/mc146818rtc.h @@ -1,10 +1,43 @@ #ifndef MC146818RTC_H #define MC146818RTC_H =20 +#include "qapi/qapi-types-misc.h" +#include "qemu/queue.h" +#include "qemu/timer.h" #include "hw/isa/isa.h" #include "hw/timer/mc146818rtc_regs.h" =20 #define TYPE_MC146818_RTC "mc146818rtc" +#define MC146818_RTC(obj) OBJECT_CHECK(RTCState, (obj), TYPE_MC146818_RTC) + +typedef struct RTCState { + ISADevice parent_obj; + + MemoryRegion io; + MemoryRegion coalesced_io; + uint8_t cmos_data[128]; + uint8_t cmos_index; + int32_t base_year; + uint64_t base_rtc; + uint64_t last_update; + int64_t offset; + qemu_irq irq; + int it_shift; + /* periodic timer */ + QEMUTimer *periodic_timer; + int64_t next_periodic_time; + /* update-ended timer */ + QEMUTimer *update_timer; + uint64_t next_alarm_time; + uint16_t irq_reinject_on_ack_count; + uint32_t irq_coalesced; + uint32_t period; + QEMUTimer *coalesced_timer; + Notifier clock_reset_notifier; + LostTickPolicy lost_tick_policy; + Notifier suspend_notifier; + QLIST_ENTRY(RTCState) link; +} RTCState; =20 ISADevice *mc146818_rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq); --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; 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Tue, 15 Oct 2019 16:27:58 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5656B19C58; Tue, 15 Oct 2019 16:27:46 +0000 (UTC) X-Inumbo-ID: c00a7180-ef68-11e9-9396-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:37 +0200 Message-Id: <20191015162705.28087-5-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.49]); Tue, 15 Oct 2019 16:27:58 +0000 (UTC) Subject: [Xen-devel] [PATCH 04/32] mc146818rtc: Move RTC_ISA_IRQ definition X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Philippe Mathieu-Daud=C3=A9 The ISA default number for the RTC devices is not related to its registers neither. Move this definition to "hw/timer/mc146818rtc.h". Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- include/hw/timer/mc146818rtc.h | 2 ++ include/hw/timer/mc146818rtc_regs.h | 2 -- tests/rtc-test.c | 1 + 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/hw/timer/mc146818rtc.h b/include/hw/timer/mc146818rtc.h index 0f1c886e5b..17761cf6d9 100644 --- a/include/hw/timer/mc146818rtc.h +++ b/include/hw/timer/mc146818rtc.h @@ -39,6 +39,8 @@ typedef struct RTCState { QLIST_ENTRY(RTCState) link; } RTCState; =20 +#define RTC_ISA_IRQ 8 + ISADevice *mc146818_rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq); void rtc_set_memory(ISADevice *dev, int addr, int val); diff --git a/include/hw/timer/mc146818rtc_regs.h b/include/hw/timer/mc14681= 8rtc_regs.h index bfbb57e570..631f71cfd9 100644 --- a/include/hw/timer/mc146818rtc_regs.h +++ b/include/hw/timer/mc146818rtc_regs.h @@ -27,8 +27,6 @@ =20 #include "qemu/timer.h" =20 -#define RTC_ISA_IRQ 8 - #define RTC_SECONDS 0 #define RTC_SECONDS_ALARM 1 #define RTC_MINUTES 2 diff --git a/tests/rtc-test.c b/tests/rtc-test.c index 6309b0ef6c..18f895690f 100644 --- a/tests/rtc-test.c +++ b/tests/rtc-test.c @@ -15,6 +15,7 @@ =20 #include "libqtest-single.h" #include "qemu/timer.h" +#include "hw/timer/mc146818rtc.h" #include "hw/timer/mc146818rtc_regs.h" =20 #define UIP_HOLD_LENGTH (8 * NANOSECONDS_PER_SECOND / 32768) --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; 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Tue, 15 Oct 2019 16:28:21 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3766D19C58; Tue, 15 Oct 2019 16:27:59 +0000 (UTC) X-Inumbo-ID: cd89d371-ef68-11e9-9396-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:38 +0200 Message-Id: <20191015162705.28087-6-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Tue, 15 Oct 2019 16:28:21 +0000 (UTC) Subject: [Xen-devel] [PATCH 05/32] mc146818rtc: Include "mc146818rtc_regs.h" directly in mc146818rtc.c X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Philippe Mathieu-Daud=C3=A9 Devices/boards wanting to use the MC146818 RTC don't need the knowledge its internal registers. Move the "mc146818rtc_regs.h" inclusion to mc146818rtc.c where it is required. We can not move this file from include/hw/timer/ to hw/timer/ for local inclusion because the ACPI FADT table use the RTC_CENTURY register address. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/timer/mc146818rtc.c | 1 + include/hw/timer/mc146818rtc.h | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c index e40b54e743..0c04b74c2e 100644 --- a/hw/timer/mc146818rtc.c +++ b/hw/timer/mc146818rtc.c @@ -41,6 +41,7 @@ #include "qapi/qapi-events-misc-target.h" #include "qapi/visitor.h" #include "exec/address-spaces.h" +#include "hw/timer/mc146818rtc_regs.h" =20 #ifdef TARGET_I386 #include "hw/i386/apic.h" diff --git a/include/hw/timer/mc146818rtc.h b/include/hw/timer/mc146818rtc.h index 17761cf6d9..a857dcdc69 100644 --- a/include/hw/timer/mc146818rtc.h +++ b/include/hw/timer/mc146818rtc.h @@ -5,7 +5,6 @@ #include "qemu/queue.h" #include "qemu/timer.h" #include "hw/isa/isa.h" -#include "hw/timer/mc146818rtc_regs.h" =20 #define TYPE_MC146818_RTC "mc146818rtc" #define MC146818_RTC(obj) OBJECT_CHECK(RTCState, (obj), TYPE_MC146818_RTC) --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571156987; cv=none; d=zoho.com; s=zohoarc; b=ERJ54Abu4kxGwoLHWPgXdFj5L1p2+FO222OEMDTC0J+y4VrRpMLXP+yDZr8lFM4blGV1ryk/LChgSO998CBxZtsyBmHRT8QyAsyJYD7csmxJWx0nq0MocZJt0g3InHMErX9zOndLu3AUTYwpb5o0RHfNQKyLDXlNrb+yVtgLYkc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571156987; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=h/tXK8mET3kwxcc+E/5wQmfUqq6SX3wzVWkCoj7Maqc=; b=Ca2VxlQ3WF34a752F42Jm2YYELNx7PzVA5SebcQlHB5lCn3lGO8srI1vnpMGUcddCfAPRjAapFrVGC4YJHmudR3BBAt0hs582LdW8jJD7oGYKVpJiCCc8AVPW30xs4+YbU2XbkyXaa+gx+S7K44Hv8qvy6vJhgGxyfhvTSEs1sI= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571156987818482.3160320532148; Tue, 15 Oct 2019 09:29:47 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPgi-0003Ji-2H; Tue, 15 Oct 2019 16:28:44 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPgg-0003J8-KM for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:28:42 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id d9bb7750-ef68-11e9-9396-12813bfff9fa; Tue, 15 Oct 2019 16:28:42 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9115A20FF; Tue, 15 Oct 2019 16:28:41 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5778C19C69; Tue, 15 Oct 2019 16:28:22 +0000 (UTC) X-Inumbo-ID: d9bb7750-ef68-11e9-9396-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:39 +0200 Message-Id: <20191015162705.28087-7-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.71]); Tue, 15 Oct 2019 16:28:41 +0000 (UTC) Subject: [Xen-devel] [PATCH 06/32] mc146818rtc: always register rtc to rtc list X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Herv=C3=A9 Poussineau We are not required anymore to use rtc_init() function. Acked-by: Michael S. Tsirkin Acked-by: Paolo Bonzini Signed-off-by: Herv=C3=A9 Poussineau Message-Id: <20171216090228.28505-5-hpoussin@reactos.org> [PMD: rebased, fix OBJECT() value] Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/timer/mc146818rtc.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c index 0c04b74c2e..8f7d3a9cdf 100644 --- a/hw/timer/mc146818rtc.c +++ b/hw/timer/mc146818rtc.c @@ -963,17 +963,16 @@ static void rtc_realizefn(DeviceState *dev, Error **e= rrp) object_property_add_tm(OBJECT(s), "date", rtc_get_date, NULL); =20 qdev_init_gpio_out(dev, &s->irq, 1); + QLIST_INSERT_HEAD(&rtc_devices, s, link); } =20 ISADevice *mc146818_rtc_init(ISABus *bus, int base_year, qemu_irq intercep= t_irq) { DeviceState *dev; ISADevice *isadev; - RTCState *s; =20 isadev =3D isa_create(bus, TYPE_MC146818_RTC); dev =3D DEVICE(isadev); - s =3D MC146818_RTC(isadev); qdev_prop_set_int32(dev, "base_year", base_year); qdev_init_nofail(dev); if (intercept_irq) { @@ -981,9 +980,8 @@ ISADevice *mc146818_rtc_init(ISABus *bus, int base_year= , qemu_irq intercept_irq) } else { isa_connect_gpio_out(isadev, 0, RTC_ISA_IRQ); } - QLIST_INSERT_HEAD(&rtc_devices, s, link); =20 - object_property_add_alias(qdev_get_machine(), "rtc-time", OBJECT(s), + object_property_add_alias(qdev_get_machine(), "rtc-time", OBJECT(isade= v), "date", NULL); =20 return isadev; @@ -1015,8 +1013,6 @@ static void rtc_class_initfn(ObjectClass *klass, void= *data) dc->reset =3D rtc_resetdev; dc->vmsd =3D &vmstate_rtc; dc->props =3D mc146818rtc_properties; - /* Reason: needs to be wired up by rtc_init() */ - dc->user_creatable =3D false; } =20 static const TypeInfo mc146818rtc_info =3D { --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; 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Tue, 15 Oct 2019 16:28:50 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 25C5A19C5B; Tue, 15 Oct 2019 16:28:41 +0000 (UTC) X-Inumbo-ID: dee7d412-ef68-11e9-9396-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:40 +0200 Message-Id: <20191015162705.28087-8-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Tue, 15 Oct 2019 16:28:50 +0000 (UTC) Subject: [Xen-devel] [PATCH 07/32] MAINTAINERS: Keep PIIX4 South Bridge separate from PC Chipsets X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Philippe Mathieu-Daud=C3=A9 The PIIX4 Southbridge is not used by the PC machine, but by the Malta board (MIPS). Add a new section to keep it covered. Suggested-by: Michael S. Tsirkin Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- MAINTAINERS | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index fe4dc51b08..c9f625fc2e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1230,7 +1230,6 @@ F: hw/pci-host/q35.c F: hw/pci-host/pam.c F: include/hw/pci-host/q35.h F: include/hw/pci-host/pam.h -F: hw/isa/piix4.c F: hw/isa/lpc_ich9.c F: hw/i2c/smbus_ich9.c F: hw/acpi/piix4.c @@ -1716,6 +1715,12 @@ F: hw/display/edid* F: include/hw/display/edid.h F: qemu-edid.c =20 +PIIX4 South Bridge (i82371AB) +M: Herv=C3=A9 Poussineau +M: Philippe Mathieu-Daud=C3=A9 +S: Maintained +F: hw/isa/piix4.c + Firmware configuration (fw_cfg) M: Philippe Mathieu-Daud=C3=A9 R: Laszlo Ersek --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157005; cv=none; d=zoho.com; s=zohoarc; b=T8zZQNVpuz//W+ZwsGMeJYX+YhqK3caLSUrcdafMD8nDpqrQ6W2uc1hjrJvckMzcxc9ZBj7E74KGQWSJ+5PrOqptrcFE8uvRSVYWS4vTn6CpgqJ13mzAsSmrEe8wS/PFmb+dHZaXLMbJ+2se7IYxfSX2WfeHKR66yEHZPdnkVTc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571157005; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=RRHCmB7G1GrwRUBufoejDr3wwBYSg4W+Ctn9f+7IBgE=; b=YeNmqBHAdcjJ4EzOYkCVs9IzxCsVI5z2XlJeQy2z9e9WVmIkk19/m6NTug9a11TD/3tQJCJgmMgaqlMQg8gNT+nFF3XZu/f4yQ8ry6+YoY88QD9bl2Poa1nIPxyaZ9r5YfjfCjrgN+u5YPoQd01NF/xoaQsD7EmroSfAUx9AU+8= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571157005227224.10636126844395; Tue, 15 Oct 2019 09:30:05 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPh5-0003T7-NK; Tue, 15 Oct 2019 16:29:07 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPh4-0003Sg-MD for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:29:06 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id e7f89dc0-ef68-11e9-bbab-bc764e2007e4; Tue, 15 Oct 2019 16:29:06 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A2FDA18C8320; Tue, 15 Oct 2019 16:29:05 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9FCEF19C58; Tue, 15 Oct 2019 16:28:50 +0000 (UTC) X-Inumbo-ID: e7f89dc0-ef68-11e9-bbab-bc764e2007e4 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:41 +0200 Message-Id: <20191015162705.28087-9-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.63]); Tue, 15 Oct 2019 16:29:05 +0000 (UTC) Subject: [Xen-devel] [PATCH 08/32] piix4: rename some variables in realize function X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Herv=C3=A9 Poussineau PIIX4 structure is now 's' PCI device is now 'pci_dev' DeviceState is now 'dev' Acked-by: Michael S. Tsirkin Acked-by: Paolo Bonzini Signed-off-by: Herv=C3=A9 Poussineau Message-Id: <20171216090228.28505-6-hpoussin@reactos.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/isa/piix4.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 3294056cd5..4202243e41 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -88,16 +88,17 @@ static const VMStateDescription vmstate_piix4 =3D { } }; =20 -static void piix4_realize(PCIDevice *dev, Error **errp) +static void piix4_realize(PCIDevice *pci_dev, Error **errp) { - PIIX4State *d =3D PIIX4_PCI_DEVICE(dev); + DeviceState *dev =3D DEVICE(pci_dev); + PIIX4State *s =3D DO_UPCAST(PIIX4State, dev, pci_dev); =20 - if (!isa_bus_new(DEVICE(d), pci_address_space(dev), - pci_address_space_io(dev), errp)) { + if (!isa_bus_new(dev, pci_address_space(pci_dev), + pci_address_space_io(pci_dev), errp)) { return; } - piix4_dev =3D &d->dev; - qemu_register_reset(piix4_reset, d); + piix4_dev =3D pci_dev; + qemu_register_reset(piix4_reset, s); } =20 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn) --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157011; cv=none; d=zoho.com; s=zohoarc; b=m2+vywjgj8cvgTQ3Ac/EmWPK/Lf0XutndWESDU3pA2fY898VDRFUXOXPh1tMHsf6ruryetJuGrvNESiJNftFuK+LpxBxksrJNJQlMaJXI00cw1X2BN7Pelt9sgv/ZIWRM3hf8aSbGAe5agvZ0aOzd/AacgjLCDY3zoIuRCvYiMA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571157011; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=CPwaT6o62qyRqVENpm3ecZfQp5LjFvIGOWaWWFDZwp8=; b=nUmkswOn9L0/Vfvvq+oPHGbNmgW5BNnYEEr9Xb3DGAcdgNoERpdpofqlzFChHHjXAV9fSPn0j9gYIu4rKTpml5qPE+zG8EJ3znbAuan3FNR3iK0ob3/JL9J1zMVMnrjw0/U16WesuAPYA8mraSfRMQ/OEkusbzcQpD0JCBBt5hI= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571157011793495.2400397734542; Tue, 15 Oct 2019 09:30:11 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPhD-0003WO-01; Tue, 15 Oct 2019 16:29:14 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPhB-0003Vm-Gi for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:29:13 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id ec10cf36-ef68-11e9-beca-bc764e2007e4; Tue, 15 Oct 2019 16:29:13 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7E8ED307D942; Tue, 15 Oct 2019 16:29:12 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 21B2419C58; Tue, 15 Oct 2019 16:29:05 +0000 (UTC) X-Inumbo-ID: ec10cf36-ef68-11e9-beca-bc764e2007e4 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:42 +0200 Message-Id: <20191015162705.28087-10-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Tue, 15 Oct 2019 16:29:12 +0000 (UTC) Subject: [Xen-devel] [PATCH 09/32] piix4: add Reset Control Register X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Herv=C3=A9 Poussineau The RCR I/O port (0xcf9) is used to generate a hard reset or a soft reset. Acked-by: Michael S. Tsirkin Acked-by: Paolo Bonzini Signed-off-by: Herv=C3=A9 Poussineau Message-Id: <20171216090228.28505-7-hpoussin@reactos.org> [PMD: rebased, updated includes] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/isa/piix4.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 4202243e41..6e2d9b9774 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -2,6 +2,7 @@ * QEMU PIIX4 PCI Bridge Emulation * * Copyright (c) 2006 Fabrice Bellard + * Copyright (c) 2018 Herv=C3=A9 Poussineau * * Permission is hereby granted, free of charge, to any person obtaining a= copy * of this software and associated documentation files (the "Software"), t= o deal @@ -29,11 +30,16 @@ #include "hw/sysbus.h" #include "migration/vmstate.h" #include "sysemu/reset.h" +#include "sysemu/runstate.h" =20 PCIDevice *piix4_dev; =20 typedef struct PIIX4State { PCIDevice dev; + + /* Reset Control Register */ + MemoryRegion rcr_mem; + uint8_t rcr; } PIIX4State; =20 #define TYPE_PIIX4_PCI_DEVICE "PIIX4" @@ -88,6 +94,34 @@ static const VMStateDescription vmstate_piix4 =3D { } }; =20 +static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val, + unsigned int len) +{ + PIIX4State *s =3D opaque; + + if (val & 4) { + qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); + return; + } + s->rcr =3D val & 2; /* keep System Reset type only */ +} + +static uint64_t piix4_rcr_read(void *opaque, hwaddr addr, unsigned int len) +{ + PIIX4State *s =3D opaque; + return s->rcr; +} + +static const MemoryRegionOps piix4_rcr_ops =3D { + .read =3D piix4_rcr_read, + .write =3D piix4_rcr_write, + .endianness =3D DEVICE_LITTLE_ENDIAN, + .impl =3D { + .min_access_size =3D 1, + .max_access_size =3D 1, + }, +}; + static void piix4_realize(PCIDevice *pci_dev, Error **errp) { DeviceState *dev =3D DEVICE(pci_dev); @@ -97,6 +131,12 @@ static void piix4_realize(PCIDevice *pci_dev, Error **e= rrp) pci_address_space_io(pci_dev), errp)) { return; } + + memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s, + "reset-control", 1); + memory_region_add_subregion_overlap(pci_address_space_io(pci_dev), 0xc= f9, + &s->rcr_mem, 1); + piix4_dev =3D pci_dev; qemu_register_reset(piix4_reset, s); } --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157027; 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Tue, 15 Oct 2019 16:29:12 +0000 (UTC) X-Inumbo-ID: f2eaa5b6-ef68-11e9-9396-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:43 +0200 Message-Id: <20191015162705.28087-11-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.70]); Tue, 15 Oct 2019 16:29:24 +0000 (UTC) Subject: [Xen-devel] [PATCH 10/32] piix4: add a i8259 interrupt controller as specified in datasheet X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Herv=C3=A9 Poussineau Add ISA irqs as piix4 gpio in, and CPU interrupt request as piix4 gpio out. Remove i8259 instanciated in malta board, to not have it twice. We can also remove the now unused piix4_init() function. Acked-by: Michael S. Tsirkin Acked-by: Paolo Bonzini Signed-off-by: Herv=C3=A9 Poussineau Message-Id: <20171216090228.28505-8-hpoussin@reactos.org> [PMD: rebased, updated includes, use ISA_NUM_IRQS in for loop] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/isa/piix4.c | 41 ++++++++++++++++++++++++++++++----------- hw/mips/mips_malta.c | 32 +++++++++++++------------------- include/hw/i386/pc.h | 1 - 3 files changed, 43 insertions(+), 31 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 6e2d9b9774..1cfc51335a 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -24,6 +24,7 @@ */ =20 #include "qemu/osdep.h" +#include "hw/irq.h" #include "hw/i386/pc.h" #include "hw/pci/pci.h" #include "hw/isa/isa.h" @@ -36,6 +37,8 @@ PCIDevice *piix4_dev; =20 typedef struct PIIX4State { PCIDevice dev; + qemu_irq cpu_intr; + qemu_irq *isa; =20 /* Reset Control Register */ MemoryRegion rcr_mem; @@ -94,6 +97,18 @@ static const VMStateDescription vmstate_piix4 =3D { } }; =20 +static void piix4_request_i8259_irq(void *opaque, int irq, int level) +{ + PIIX4State *s =3D opaque; + qemu_set_irq(s->cpu_intr, level); +} + +static void piix4_set_i8259_irq(void *opaque, int irq, int level) +{ + PIIX4State *s =3D opaque; + qemu_set_irq(s->isa[irq], level); +} + static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned int len) { @@ -126,30 +141,34 @@ static void piix4_realize(PCIDevice *pci_dev, Error *= *errp) { DeviceState *dev =3D DEVICE(pci_dev); PIIX4State *s =3D DO_UPCAST(PIIX4State, dev, pci_dev); + ISABus *isa_bus; + qemu_irq *i8259_out_irq; =20 - if (!isa_bus_new(dev, pci_address_space(pci_dev), - pci_address_space_io(pci_dev), errp)) { + isa_bus =3D isa_bus_new(dev, pci_address_space(pci_dev), + pci_address_space_io(pci_dev), errp); + if (!isa_bus) { return; } =20 + qdev_init_gpio_in_named(dev, piix4_set_i8259_irq, "isa", ISA_NUM_IRQS); + qdev_init_gpio_out_named(dev, &s->cpu_intr, "intr", 1); + memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s, "reset-control", 1); memory_region_add_subregion_overlap(pci_address_space_io(pci_dev), 0xc= f9, &s->rcr_mem, 1); =20 + /* initialize i8259 pic */ + i8259_out_irq =3D qemu_allocate_irqs(piix4_request_i8259_irq, s, 1); + s->isa =3D i8259_init(isa_bus, *i8259_out_irq); + + /* initialize ISA irqs */ + isa_bus_irqs(isa_bus, s->isa); + piix4_dev =3D pci_dev; qemu_register_reset(piix4_reset, s); } =20 -int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn) -{ - PCIDevice *d; - - d =3D pci_create_simple_multifunction(bus, devfn, true, "PIIX4"); - *isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(d), "isa.0")); - return d->devfn; -} - static void piix4_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 4d9c64b36a..7d25ab6c23 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -97,7 +97,7 @@ typedef struct { SysBusDevice parent_obj; =20 MIPSCPSState cps; - qemu_irq *i8259; + qemu_irq i8259[16]; } MaltaState; =20 static ISADevice *pit; @@ -1235,8 +1235,8 @@ void mips_malta_init(MachineState *machine) int64_t kernel_entry, bootloader_run_addr; PCIBus *pci_bus; ISABus *isa_bus; - qemu_irq *isa_irq; qemu_irq cbus_irq, i8259_irq; + PCIDevice *pci; int piix4_devfn; I2CBus *smbus; DriveInfo *dinfo; @@ -1407,30 +1407,24 @@ void mips_malta_init(MachineState *machine) /* Board ID =3D 0x420 (Malta Board with CoreLV) */ stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420); =20 - /* - * We have a circular dependency problem: pci_bus depends on isa_irq, - * isa_irq is provided by i8259, i8259 depends on ISA, ISA depends - * on piix4, and piix4 depends on pci_bus. To stop the cycle we have - * qemu_irq_proxy() adds an extra bit of indirection, allowing us - * to resolve the isa_irq -> i8259 dependency after i8259 is initializ= ed. - */ - isa_irq =3D qemu_irq_proxy(&s->i8259, 16); - /* Northbridge */ - pci_bus =3D gt64120_register(isa_irq); + pci_bus =3D gt64120_register(s->i8259); =20 /* Southbridge */ ide_drive_get(hd, ARRAY_SIZE(hd)); =20 - piix4_devfn =3D piix4_init(pci_bus, &isa_bus, 80); + pci =3D pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), + true, "PIIX4"); + dev =3D DEVICE(pci); + isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); + piix4_devfn =3D pci->devfn; =20 - /* - * Interrupt controller - * The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 - */ - s->i8259 =3D i8259_init(isa_bus, i8259_irq); + /* Interrupt controller */ + qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq); + for (int i =3D 0; i < ISA_NUM_IRQS; i++) { + s->i8259[i] =3D qdev_get_gpio_in_named(dev, "isa", i); + } =20 - isa_bus_irqs(isa_bus, s->i8259); pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1); pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci"); smbus =3D piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 09e74e7764..a95eab0d8a 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -282,7 +282,6 @@ PCIBus *i440fx_init(const char *host_type, const char *= pci_type, PCIBus *find_i440fx(void); /* piix4.c */ extern PCIDevice *piix4_dev; -int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); =20 /* pc_sysfw.c */ void pc_system_flash_create(PCMachineState *pcms); --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; 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Tue, 15 Oct 2019 16:29:31 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9CA0F19C58; Tue, 15 Oct 2019 16:29:24 +0000 (UTC) X-Inumbo-ID: f735eed2-ef68-11e9-bbab-bc764e2007e4 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:44 +0200 Message-Id: <20191015162705.28087-12-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.71]); Tue, 15 Oct 2019 16:29:31 +0000 (UTC) Subject: [Xen-devel] [PATCH 11/32] Revert "irq: introduce qemu_irq_proxy()" X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Philippe Mathieu-Daud=C3=A9 This function isn't used anymore. This reverts commit 22ec3283efba9ba0792790da786d6776d83f2a92. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Thomas Huth --- hw/core/irq.c | 14 -------------- include/hw/irq.h | 5 ----- 2 files changed, 19 deletions(-) diff --git a/hw/core/irq.c b/hw/core/irq.c index 7cc0295d0e..fb3045b912 100644 --- a/hw/core/irq.c +++ b/hw/core/irq.c @@ -120,20 +120,6 @@ qemu_irq qemu_irq_split(qemu_irq irq1, qemu_irq irq2) return qemu_allocate_irq(qemu_splitirq, s, 0); } =20 -static void proxy_irq_handler(void *opaque, int n, int level) -{ - qemu_irq **target =3D opaque; - - if (*target) { - qemu_set_irq((*target)[n], level); - } -} - -qemu_irq *qemu_irq_proxy(qemu_irq **target, int n) -{ - return qemu_allocate_irqs(proxy_irq_handler, target, n); -} - void qemu_irq_intercept_in(qemu_irq *gpio_in, qemu_irq_handler handler, in= t n) { int i; diff --git a/include/hw/irq.h b/include/hw/irq.h index fe527f6f51..24ba0ece11 100644 --- a/include/hw/irq.h +++ b/include/hw/irq.h @@ -51,11 +51,6 @@ qemu_irq qemu_irq_invert(qemu_irq irq); */ qemu_irq qemu_irq_split(qemu_irq irq1, qemu_irq irq2); =20 -/* Returns a new IRQ set which connects 1:1 to another IRQ set, which - * may be set later. - */ -qemu_irq *qemu_irq_proxy(qemu_irq **target, int n); - /* For internal use in qtest. Similar to qemu_irq_split, but operating on an existing vector of qemu_irq. */ void qemu_irq_intercept_in(qemu_irq *gpio_in, qemu_irq_handler handler, in= t n); --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157037; cv=none; d=zoho.com; s=zohoarc; b=Njrg3MtgW+wRmAKGHucLNPOvLMvY2BCvkR5KNq4HMMRPC59iJsQJYmJZlVBQL4TjEP2LQCAarl0mlURDYXIKivN4lmkJPRHnde821isUyvS3qcMKX3nY9+2dCE3unAGv+pyqv0GXBIpE4A+pb7dxV5SLgYpp9E1Nen7xPFlxEws= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571157037; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=MIQRI+iGpxBX4yyVJhu1ewyn6byxyxh5YN3P/2IzrNU=; b=bWiy2lsRtkx0v8YArXGEO5e8RSFzjIPwFgrZhPNhy7v1tKVi+tFPah8oha73jTlIid73Aood8Di7jcyJ1GpNxby8ttoaQtcGx0pbpc1RZqKllj04ia/VShqh98/Pg8ner2bWtynHFyrR9AY4M3fYX0H32U65NJsBuLRJiPjSA4M= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571157037259276.3663245428331; Tue, 15 Oct 2019 09:30:37 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPhe-0003kv-0f; Tue, 15 Oct 2019 16:29:42 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPhc-0003jz-98 for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:29:40 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id fc0f04ac-ef68-11e9-9397-12813bfff9fa; Tue, 15 Oct 2019 16:29:39 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 547332D7E1; Tue, 15 Oct 2019 16:29:39 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C3D1319C58; Tue, 15 Oct 2019 16:29:31 +0000 (UTC) X-Inumbo-ID: fc0f04ac-ef68-11e9-9397-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:45 +0200 Message-Id: <20191015162705.28087-13-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Tue, 15 Oct 2019 16:29:39 +0000 (UTC) Subject: [Xen-devel] [PATCH 12/32] piix4: rename PIIX4 object to piix4-isa X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Herv=C3=A9 Poussineau Other piix4 parts are already named piix4-ide and piix4-usb-uhci. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Michael S. Tsirkin Acked-by: Paolo Bonzini Signed-off-by: Herv=C3=A9 Poussineau Message-Id: <20171216090228.28505-15-hpoussin@reactos.org> [PMD: rebased] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/isa/piix4.c | 1 - hw/mips/mips_malta.c | 2 +- include/hw/isa/isa.h | 2 ++ 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 1cfc51335a..c3a2bd0d70 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -45,7 +45,6 @@ typedef struct PIIX4State { uint8_t rcr; } PIIX4State; =20 -#define TYPE_PIIX4_PCI_DEVICE "PIIX4" #define PIIX4_PCI_DEVICE(obj) \ OBJECT_CHECK(PIIX4State, (obj), TYPE_PIIX4_PCI_DEVICE) =20 diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 7d25ab6c23..e499b7a6bb 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1414,7 +1414,7 @@ void mips_malta_init(MachineState *machine) ide_drive_get(hd, ARRAY_SIZE(hd)); =20 pci =3D pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), - true, "PIIX4"); + true, TYPE_PIIX4_PCI_DEVICE); dev =3D DEVICE(pci); isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); piix4_devfn =3D pci->devfn; diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 018ada4f6f..79f703fd6c 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -147,4 +147,6 @@ static inline ISABus *isa_bus_from_device(ISADevice *d) return ISA_BUS(qdev_get_parent_bus(DEVICE(d))); } =20 +#define TYPE_PIIX4_PCI_DEVICE "piix4-isa" + #endif --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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Tue, 15 Oct 2019 16:29:47 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C046B19C58; Tue, 15 Oct 2019 16:29:39 +0000 (UTC) X-Inumbo-ID: 012eb1f8-ef69-11e9-bbab-bc764e2007e4 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:46 +0200 Message-Id: <20191015162705.28087-14-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.67]); Tue, 15 Oct 2019 16:29:48 +0000 (UTC) Subject: [Xen-devel] [PATCH 13/32] piix4: convert reset function to QOM X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Herv=C3=A9 Poussineau Acked-by: Michael S. Tsirkin Acked-by: Paolo Bonzini Signed-off-by: Herv=C3=A9 Poussineau Message-Id: <20180106153730.30313-15-hpoussin@reactos.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/isa/piix4.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index c3a2bd0d70..8998b0ca47 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -48,10 +48,10 @@ typedef struct PIIX4State { #define PIIX4_PCI_DEVICE(obj) \ OBJECT_CHECK(PIIX4State, (obj), TYPE_PIIX4_PCI_DEVICE) =20 -static void piix4_reset(void *opaque) +static void piix4_reset(DeviceState *dev) { - PIIX4State *d =3D opaque; - uint8_t *pci_conf =3D d->dev.config; + PIIX4State *s =3D PIIX4_PCI_DEVICE(dev); + uint8_t *pci_conf =3D s->dev.config; =20 pci_conf[0x04] =3D 0x07; // master, memory and I/O pci_conf[0x05] =3D 0x00; @@ -165,7 +165,6 @@ static void piix4_realize(PCIDevice *pci_dev, Error **e= rrp) isa_bus_irqs(isa_bus, s->isa); =20 piix4_dev =3D pci_dev; - qemu_register_reset(piix4_reset, s); } =20 static void piix4_class_init(ObjectClass *klass, void *data) @@ -177,6 +176,7 @@ static void piix4_class_init(ObjectClass *klass, void *= data) k->vendor_id =3D PCI_VENDOR_ID_INTEL; k->device_id =3D PCI_DEVICE_ID_INTEL_82371AB_0; k->class_id =3D PCI_CLASS_BRIDGE_ISA; + dc->reset =3D piix4_reset; dc->desc =3D "ISA bridge"; dc->vmsd =3D &vmstate_piix4; /* --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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Tue, 15 Oct 2019 16:29:55 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B2B1D19C58; Tue, 15 Oct 2019 16:29:48 +0000 (UTC) X-Inumbo-ID: 0522f441-ef69-11e9-9397-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:47 +0200 Message-Id: <20191015162705.28087-15-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.69]); Tue, 15 Oct 2019 16:29:55 +0000 (UTC) Subject: [Xen-devel] [PATCH 14/32] piix4: add a i8257 dma controller as specified in datasheet X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Herv=C3=A9 Poussineau Remove i8257 instanciated in malta board, to not have it twice. Acked-by: Michael S. Tsirkin Acked-by: Paolo Bonzini Signed-off-by: Herv=C3=A9 Poussineau Message-Id: <20171216090228.28505-9-hpoussin@reactos.org> [PMD: rebased] Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/isa/piix4.c | 4 ++++ hw/mips/mips_malta.c | 2 -- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 8998b0ca47..1bc91b590c 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -29,6 +29,7 @@ #include "hw/pci/pci.h" #include "hw/isa/isa.h" #include "hw/sysbus.h" +#include "hw/dma/i8257.h" #include "migration/vmstate.h" #include "sysemu/reset.h" #include "sysemu/runstate.h" @@ -164,6 +165,9 @@ static void piix4_realize(PCIDevice *pci_dev, Error **e= rrp) /* initialize ISA irqs */ isa_bus_irqs(isa_bus, s->isa); =20 + /* DMA */ + i8257_dma_init(isa_bus, 0); + piix4_dev =3D pci_dev; } =20 diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index e499b7a6bb..df247177ca 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -28,7 +28,6 @@ #include "cpu.h" #include "hw/i386/pc.h" #include "hw/isa/superio.h" -#include "hw/dma/i8257.h" #include "hw/char/serial.h" #include "net/net.h" #include "hw/boards.h" @@ -1430,7 +1429,6 @@ void mips_malta_init(MachineState *machine) smbus =3D piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_get_irq(NULL, 9), NULL, 0, NULL); pit =3D i8254_pit_init(isa_bus, 0x40, 0, NULL); - i8257_dma_init(isa_bus, 0); mc146818_rtc_init(isa_bus, 2000, NULL); =20 /* generate SPD EEPROM data */ --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157074; cv=none; d=zoho.com; s=zohoarc; b=kQhOnoBYq54CDYUwNrjFB2VFyfOXlZdG+929dj/27IxORvnW5l8D4vfL/YwbzCGgO6RPktX1wAtDzjDfsuN2wrLpTmZo7JYXC88HKMFXDODmwJy0zvGXo/U02FKHjxPmhCtZFKsWbuSWtAb8il6uUoSxmFzm37+SzYje2wKYEtk= ARC-Message-Signature: i=1; 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Tue, 15 Oct 2019 16:30:14 +0000 (UTC) Subject: [Xen-devel] [PATCH 15/32] piix4: add a i8254 pit controller as specified in datasheet X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Herv=C3=A9 Poussineau Remove i8254 instanciated in malta board, to not have it twice. Acked-by: Michael S. Tsirkin Acked-by: Paolo Bonzini Signed-off-by: Herv=C3=A9 Poussineau Message-Id: <20171216090228.28505-10-hpoussin@reactos.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/isa/piix4.c | 4 ++++ hw/mips/mips_malta.c | 4 ---- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 1bc91b590c..0b0a0ecab1 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -30,6 +30,7 @@ #include "hw/isa/isa.h" #include "hw/sysbus.h" #include "hw/dma/i8257.h" +#include "hw/timer/i8254.h" #include "migration/vmstate.h" #include "sysemu/reset.h" #include "sysemu/runstate.h" @@ -165,6 +166,9 @@ static void piix4_realize(PCIDevice *pci_dev, Error **e= rrp) /* initialize ISA irqs */ isa_bus_irqs(isa_bus, s->isa); =20 + /* initialize pit */ + i8254_pit_init(isa_bus, 0x40, 0, NULL); + /* DMA */ i8257_dma_init(isa_bus, 0); =20 diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index df247177ca..16d7a0e785 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -45,7 +45,6 @@ #include "hw/loader.h" #include "elf.h" #include "hw/timer/mc146818rtc.h" -#include "hw/timer/i8254.h" #include "exec/address-spaces.h" #include "hw/sysbus.h" /* SysBusDevice */ #include "qemu/host-utils.h" @@ -99,8 +98,6 @@ typedef struct { qemu_irq i8259[16]; } MaltaState; =20 -static ISADevice *pit; - static struct _loaderparams { int ram_size, ram_low_size; const char *kernel_filename; @@ -1428,7 +1425,6 @@ void mips_malta_init(MachineState *machine) pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci"); smbus =3D piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_get_irq(NULL, 9), NULL, 0, NULL); - pit =3D i8254_pit_init(isa_bus, 0x40, 0, NULL); mc146818_rtc_init(isa_bus, 2000, NULL); =20 /* generate SPD EEPROM data */ --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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Tue, 15 Oct 2019 16:30:23 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id E754519C58; Tue, 15 Oct 2019 16:30:14 +0000 (UTC) X-Inumbo-ID: 1698ab2a-ef69-11e9-9397-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:49 +0200 Message-Id: <20191015162705.28087-17-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Tue, 15 Oct 2019 16:30:24 +0000 (UTC) Subject: [Xen-devel] [PATCH 16/32] piix4: add a mc146818rtc controller as specified in datasheet X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Philippe Mathieu-Daud=C3=A9 Remove mc146818rtc instanciated in malta board, to not have it twice. Acked-by: Michael S. Tsirkin Acked-by: Paolo Bonzini Signed-off-by: Herv=C3=A9 Poussineau Message-Id: <20171216090228.28505-13-hpoussin@reactos.org> [PMD: rebased, set RTC base_year to 2000] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- MAINTAINERS | 3 ++- hw/acpi/piix4.c | 2 +- hw/i386/acpi-build.c | 3 +-- hw/i386/pc_piix.c | 1 + hw/isa/piix4.c | 22 ++++++++++++++++++++++ hw/mips/mips_malta.c | 4 +--- include/hw/acpi/piix4.h | 6 ------ include/hw/i386/pc.h | 6 ------ include/hw/southbridge/piix.h | 20 ++++++++++++++++++++ 9 files changed, 48 insertions(+), 19 deletions(-) delete mode 100644 include/hw/acpi/piix4.h create mode 100644 include/hw/southbridge/piix.h diff --git a/MAINTAINERS b/MAINTAINERS index c9f625fc2e..556f58bd8c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1235,7 +1235,7 @@ F: hw/i2c/smbus_ich9.c F: hw/acpi/piix4.c F: hw/acpi/ich9.c F: include/hw/acpi/ich9.h -F: include/hw/acpi/piix4.h +F: include/hw/southbridge/piix.h F: hw/misc/sga.c F: hw/isa/apm.c F: include/hw/isa/apm.h @@ -1720,6 +1720,7 @@ M: Herv=C3=A9 Poussineau M: Philippe Mathieu-Daud=C3=A9 S: Maintained F: hw/isa/piix4.c +F: include/hw/southbridge/piix.h =20 Firmware configuration (fw_cfg) M: Philippe Mathieu-Daud=C3=A9 diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 1d29d438c7..27270621ab 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -21,6 +21,7 @@ =20 #include "qemu/osdep.h" #include "hw/i386/pc.h" +#include "hw/southbridge/piix.h" #include "hw/irq.h" #include "hw/isa/apm.h" #include "hw/i2c/pm_smbus.h" @@ -33,7 +34,6 @@ #include "qapi/error.h" #include "qemu/range.h" #include "exec/address-spaces.h" -#include "hw/acpi/piix4.h" #include "hw/acpi/pcihp.h" #include "hw/acpi/cpu_hotplug.h" #include "hw/acpi/cpu.h" diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 4e0f9f425a..aa6fe61191 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -34,7 +34,6 @@ #include "hw/acpi/acpi-defs.h" #include "hw/acpi/acpi.h" #include "hw/acpi/cpu.h" -#include "hw/acpi/piix4.h" #include "hw/nvram/fw_cfg.h" #include "hw/acpi/bios-linker-loader.h" #include "hw/isa/isa.h" @@ -52,7 +51,7 @@ #include "sysemu/reset.h" =20 /* Supported chipsets: */ -#include "hw/acpi/piix4.h" +#include "hw/southbridge/piix.h" #include "hw/acpi/pcihp.h" #include "hw/i386/ich9.h" #include "hw/pci/pci_bus.h" diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 6824b72124..431965d921 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -29,6 +29,7 @@ #include "hw/loader.h" #include "hw/i386/pc.h" #include "hw/i386/apic.h" +#include "hw/southbridge/piix.h" #include "hw/display/ramfb.h" #include "hw/firmware/smbios.h" #include "hw/pci/pci.h" diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 0b0a0ecab1..9f554747af 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -24,6 +24,7 @@ */ =20 #include "qemu/osdep.h" +#include "qapi/error.h" #include "hw/irq.h" #include "hw/i386/pc.h" #include "hw/pci/pci.h" @@ -31,6 +32,7 @@ #include "hw/sysbus.h" #include "hw/dma/i8257.h" #include "hw/timer/i8254.h" +#include "hw/timer/mc146818rtc.h" #include "migration/vmstate.h" #include "sysemu/reset.h" #include "sysemu/runstate.h" @@ -42,6 +44,7 @@ typedef struct PIIX4State { qemu_irq cpu_intr; qemu_irq *isa; =20 + RTCState rtc; /* Reset Control Register */ MemoryRegion rcr_mem; uint8_t rcr; @@ -144,6 +147,7 @@ static void piix4_realize(PCIDevice *pci_dev, Error **e= rrp) PIIX4State *s =3D DO_UPCAST(PIIX4State, dev, pci_dev); ISABus *isa_bus; qemu_irq *i8259_out_irq; + Error *err =3D NULL; =20 isa_bus =3D isa_bus_new(dev, pci_address_space(pci_dev), pci_address_space_io(pci_dev), errp); @@ -172,9 +176,26 @@ static void piix4_realize(PCIDevice *pci_dev, Error **= errp) /* DMA */ i8257_dma_init(isa_bus, 0); =20 + /* RTC */ + qdev_set_parent_bus(DEVICE(&s->rtc), BUS(isa_bus)); + qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000); + object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + isa_init_irq(ISA_DEVICE(&s->rtc), &s->rtc.irq, RTC_ISA_IRQ); + piix4_dev =3D pci_dev; } =20 +static void piix4_init(Object *obj) +{ + PIIX4State *s =3D PIIX4_PCI_DEVICE(obj); + + object_initialize(&s->rtc, sizeof(s->rtc), TYPE_MC146818_RTC); +} + static void piix4_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -199,6 +220,7 @@ static const TypeInfo piix4_info =3D { .name =3D TYPE_PIIX4_PCI_DEVICE, .parent =3D TYPE_PCI_DEVICE, .instance_size =3D sizeof(PIIX4State), + .instance_init =3D piix4_init, .class_init =3D piix4_class_init, .interfaces =3D (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 16d7a0e785..528c34a1c3 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -26,7 +26,7 @@ #include "qemu/units.h" #include "qemu-common.h" #include "cpu.h" -#include "hw/i386/pc.h" +#include "hw/southbridge/piix.h" #include "hw/isa/superio.h" #include "hw/char/serial.h" #include "net/net.h" @@ -44,7 +44,6 @@ #include "hw/irq.h" #include "hw/loader.h" #include "elf.h" -#include "hw/timer/mc146818rtc.h" #include "exec/address-spaces.h" #include "hw/sysbus.h" /* SysBusDevice */ #include "qemu/host-utils.h" @@ -1425,7 +1424,6 @@ void mips_malta_init(MachineState *machine) pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci"); smbus =3D piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_get_irq(NULL, 9), NULL, 0, NULL); - mc146818_rtc_init(isa_bus, 2000, NULL); =20 /* generate SPD EEPROM data */ generate_eeprom_spd(&smbus_eeprom_buf[0 * 256], ram_size); diff --git a/include/hw/acpi/piix4.h b/include/hw/acpi/piix4.h deleted file mode 100644 index 028bb53e3d..0000000000 --- a/include/hw/acpi/piix4.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef HW_ACPI_PIIX4_H -#define HW_ACPI_PIIX4_H - -#define TYPE_PIIX4_PM "PIIX4_PM" - -#endif diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index a95eab0d8a..c671c9fd2a 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -244,12 +244,6 @@ int cmos_get_fd_drive_type(FloppyDriveType fd0); =20 #define PORT92_A20_LINE "a20" =20 -/* acpi_piix.c */ - -I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, - qemu_irq sci_irq, qemu_irq smi_irq, - int smm_enabled, DeviceState **piix4_pm); - /* hpet.c */ extern int no_hpet; =20 diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h new file mode 100644 index 0000000000..b8ce26fec4 --- /dev/null +++ b/include/hw/southbridge/piix.h @@ -0,0 +1,20 @@ +/* + * QEMU PIIX South Bridge Emulation + * + * Copyright (c) 2006 Fabrice Bellard + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + * + */ + +#ifndef HW_SOUTHBRIDGE_PIIX_H +#define HW_SOUTHBRIDGE_PIIX_H + +#define TYPE_PIIX4_PM "PIIX4_PM" + +I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, + qemu_irq sci_irq, qemu_irq smi_irq, + int smm_enabled, DeviceState **piix4_pm); + +#endif --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157096; cv=none; d=zoho.com; s=zohoarc; b=PgCLhOp4vz7EYXQxoyWmgib7ZdqMU49Agy8F0G12cGKmYVyV/fcoTouZzw8Dq1tDv0CYWkb1wUj9s8dNNO9y3xfQChOA3NK3I64zfO3kPZHadeYc+6ATAo1xaOIIJoecQSkO4utRxDPwA0eAUO9TsLwKmhKKPhD3B+Fcyd+zTKs= ARC-Message-Signature: i=1; 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Tue, 15 Oct 2019 16:30:35 +0000 (UTC) Subject: [Xen-devel] [PATCH 17/32] hw/mips/mips_malta: Create IDE hard drive array dynamically X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" In the next commit we'll refactor the PIIX4 code out of mips_malta_init(). As a preliminary step, add the 'ide_drives' variable and create the drive array dynamically. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/mips/mips_malta.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 528c34a1c3..774bb810f6 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1235,7 +1235,8 @@ void mips_malta_init(MachineState *machine) int piix4_devfn; I2CBus *smbus; DriveInfo *dinfo; - DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; + const size_t ide_drives =3D MAX_IDE_BUS * MAX_IDE_DEVS; + DriveInfo **hd; int fl_idx =3D 0; int be; =20 @@ -1406,7 +1407,8 @@ void mips_malta_init(MachineState *machine) pci_bus =3D gt64120_register(s->i8259); =20 /* Southbridge */ - ide_drive_get(hd, ARRAY_SIZE(hd)); + hd =3D g_new(DriveInfo *, ide_drives); + ide_drive_get(hd, ide_drives); =20 pci =3D pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), true, TYPE_PIIX4_PCI_DEVICE); @@ -1421,6 +1423,7 @@ void mips_malta_init(MachineState *machine) } =20 pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1); + g_free(hd); pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci"); smbus =3D piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_get_irq(NULL, 9), NULL, 0, NULL); --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157105; cv=none; d=zoho.com; s=zohoarc; b=jqrMIC0uV8jNe6FnfS7sBvMs23bgzjRXS7yR+wzv1uWGJcp6PBlkzwBYb8WTQ5oDWHYSyL84rD1FhgfTCWoWV+18MlN+3uLHhcpv8NjPrlf4mfuG/BHWE3mVfP68R9IPLAbY208OzRKCNUSuiF4Vk8W+/oRg//MaCgwm6dH8lJQ= ARC-Message-Signature: i=1; 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Tue, 15 Oct 2019 16:30:46 +0000 (UTC) Subject: [Xen-devel] [PATCH 18/32] hw/mips/mips_malta: Extract the PIIX4 creation code as piix4_create() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The Malta board instantiate a PIIX4 chipset doing various calls. Refactor all those related calls into a single function: piix4_create(). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/mips/mips_malta.c | 47 +++++++++++++++++++++++++++----------------- 1 file changed, 29 insertions(+), 18 deletions(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 774bb810f6..0d4312840b 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1210,6 +1210,34 @@ static void mips_create_cpu(MachineState *ms, MaltaS= tate *s, } } =20 +static DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, + I2CBus **smbus, size_t ide_buses) +{ + const size_t ide_drives =3D ide_buses * MAX_IDE_DEVS; + DriveInfo **hd; + PCIDevice *pci; + DeviceState *dev; + + pci =3D pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), + true, TYPE_PIIX4_PCI_DEVICE); + dev =3D DEVICE(pci); + if (isa_bus) { + *isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); + } + + hd =3D g_new(DriveInfo *, ide_drives); + ide_drive_get(hd, ide_drives); + pci_piix4_ide_init(pci_bus, hd, pci->devfn + 1); + g_free(hd); + pci_create_simple(pci_bus, pci->devfn + 2, "piix4-usb-uhci"); + if (smbus) { + *smbus =3D piix4_pm_init(pci_bus, pci->devfn + 3, 0x1100, + isa_get_irq(NULL, 9), NULL, 0, NULL); + } + + return dev; +} + static void mips_malta_init(MachineState *machine) { @@ -1231,12 +1259,8 @@ void mips_malta_init(MachineState *machine) PCIBus *pci_bus; ISABus *isa_bus; qemu_irq cbus_irq, i8259_irq; - PCIDevice *pci; - int piix4_devfn; I2CBus *smbus; DriveInfo *dinfo; - const size_t ide_drives =3D MAX_IDE_BUS * MAX_IDE_DEVS; - DriveInfo **hd; int fl_idx =3D 0; int be; =20 @@ -1407,14 +1431,7 @@ void mips_malta_init(MachineState *machine) pci_bus =3D gt64120_register(s->i8259); =20 /* Southbridge */ - hd =3D g_new(DriveInfo *, ide_drives); - ide_drive_get(hd, ide_drives); - - pci =3D pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), - true, TYPE_PIIX4_PCI_DEVICE); - dev =3D DEVICE(pci); - isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); - piix4_devfn =3D pci->devfn; + dev =3D piix4_create(pci_bus, &isa_bus, &smbus, MAX_IDE_BUS); =20 /* Interrupt controller */ qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq); @@ -1422,12 +1439,6 @@ void mips_malta_init(MachineState *machine) s->i8259[i] =3D qdev_get_gpio_in_named(dev, "isa", i); } =20 - pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1); - g_free(hd); - pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci"); - smbus =3D piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, - isa_get_irq(NULL, 9), NULL, 0, NULL); - /* generate SPD EEPROM data */ generate_eeprom_spd(&smbus_eeprom_buf[0 * 256], ram_size); generate_eeprom_serial(&smbus_eeprom_buf[6 * 256]); --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; 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mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571157115709141.4515016276913; Tue, 15 Oct 2019 09:31:55 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPis-000567-NS; Tue, 15 Oct 2019 16:30:58 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPiq-000551-Qm for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:30:56 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id 297825ae-ef69-11e9-beca-bc764e2007e4; Tue, 15 Oct 2019 16:30:56 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 84B7D3082B41; Tue, 15 Oct 2019 16:30:55 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A8F7219C58; Tue, 15 Oct 2019 16:30:46 +0000 (UTC) X-Inumbo-ID: 297825ae-ef69-11e9-beca-bc764e2007e4 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:52 +0200 Message-Id: <20191015162705.28087-20-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Tue, 15 Oct 2019 16:30:55 +0000 (UTC) Subject: [Xen-devel] [PATCH 19/32] hw/isa/piix4: Move piix4_create() to hw/isa/piix4.c X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Philippe Mathieu-Daud=C3=A9 Now that we properly refactored the piix4_create() function, let's move it to hw/isa/piix4.c where it belongs, so it can be reused on other places. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/isa/piix4.c | 30 ++++++++++++++++++++++++++++++ hw/mips/gt64xxx_pci.c | 1 + hw/mips/mips_malta.c | 28 ---------------------------- include/hw/i386/pc.h | 2 -- include/hw/southbridge/piix.h | 6 ++++++ 5 files changed, 37 insertions(+), 30 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 9f554747af..d90899e122 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -27,12 +27,14 @@ #include "qapi/error.h" #include "hw/irq.h" #include "hw/i386/pc.h" +#include "hw/southbridge/piix.h" #include "hw/pci/pci.h" #include "hw/isa/isa.h" #include "hw/sysbus.h" #include "hw/dma/i8257.h" #include "hw/timer/i8254.h" #include "hw/timer/mc146818rtc.h" +#include "hw/ide.h" #include "migration/vmstate.h" #include "sysemu/reset.h" #include "sysemu/runstate.h" @@ -234,3 +236,31 @@ static void piix4_register_types(void) } =20 type_init(piix4_register_types) + +DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, + I2CBus **smbus, size_t ide_buses) +{ + size_t ide_drives =3D ide_buses * MAX_IDE_DEVS; + DriveInfo **hd; + PCIDevice *pci; + DeviceState *dev; + + pci =3D pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), + true, TYPE_PIIX4_PCI_DEVICE); + dev =3D DEVICE(pci); + if (isa_bus) { + *isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); + } + + hd =3D g_new(DriveInfo *, ide_drives); + ide_drive_get(hd, ide_drives); + pci_piix4_ide_init(pci_bus, hd, pci->devfn + 1); + g_free(hd); + pci_create_simple(pci_bus, pci->devfn + 2, "piix4-usb-uhci"); + if (smbus) { + *smbus =3D piix4_pm_init(pci_bus, pci->devfn + 3, 0x1100, + isa_get_irq(NULL, 9), NULL, 0, NULL); + } + + return dev; +} diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index f325bd6c1c..c277398c0d 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -28,6 +28,7 @@ #include "hw/mips/mips.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" +#include "hw/southbridge/piix.h" #include "migration/vmstate.h" #include "hw/i386/pc.h" #include "hw/irq.h" diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 0d4312840b..477a4725c0 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1210,34 +1210,6 @@ static void mips_create_cpu(MachineState *ms, MaltaS= tate *s, } } =20 -static DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, - I2CBus **smbus, size_t ide_buses) -{ - const size_t ide_drives =3D ide_buses * MAX_IDE_DEVS; - DriveInfo **hd; - PCIDevice *pci; - DeviceState *dev; - - pci =3D pci_create_simple_multifunction(pci_bus, PCI_DEVFN(10, 0), - true, TYPE_PIIX4_PCI_DEVICE); - dev =3D DEVICE(pci); - if (isa_bus) { - *isa_bus =3D ISA_BUS(qdev_get_child_bus(dev, "isa.0")); - } - - hd =3D g_new(DriveInfo *, ide_drives); - ide_drive_get(hd, ide_drives); - pci_piix4_ide_init(pci_bus, hd, pci->devfn + 1); - g_free(hd); - pci_create_simple(pci_bus, pci->devfn + 2, "piix4-usb-uhci"); - if (smbus) { - *smbus =3D piix4_pm_init(pci_bus, pci->devfn + 3, 0x1100, - isa_get_irq(NULL, 9), NULL, 0, NULL); - } - - return dev; -} - static void mips_malta_init(MachineState *machine) { diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index c671c9fd2a..b63fc7631e 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -274,8 +274,6 @@ PCIBus *i440fx_init(const char *host_type, const char *= pci_type, MemoryRegion *ram_memory); =20 PCIBus *find_i440fx(void); -/* piix4.c */ -extern PCIDevice *piix4_dev; =20 /* pc_sysfw.c */ void pc_system_flash_create(PCMachineState *pcms); diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index b8ce26fec4..add352456b 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -2,6 +2,7 @@ * QEMU PIIX South Bridge Emulation * * Copyright (c) 2006 Fabrice Bellard + * Copyright (c) 2018 Herv=C3=A9 Poussineau * * This work is licensed under the terms of the GNU GPL, version 2 or late= r. * See the COPYING file in the top-level directory. @@ -17,4 +18,9 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t sm= b_io_base, qemu_irq sci_irq, qemu_irq smi_irq, int smm_enabled, DeviceState **piix4_pm); =20 +extern PCIDevice *piix4_dev; + +DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, + I2CBus **smbus, size_t ide_buses); + #endif --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; 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Tue, 15 Oct 2019 16:31:04 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 1B2C319C58; Tue, 15 Oct 2019 16:30:55 +0000 (UTC) X-Inumbo-ID: 2eb7643a-ef69-11e9-a531-bc764e2007e4 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:53 +0200 Message-Id: <20191015162705.28087-21-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Tue, 15 Oct 2019 16:31:04 +0000 (UTC) Subject: [Xen-devel] [PATCH 20/32] hw/i386/pc: Extract pc_gsi_create() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The GSI creation code is common to all PC machines, extract the common code. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic Reviewed-by: Thomas Huth --- hw/i386/pc.c | 15 +++++++++++++++ hw/i386/pc_piix.c | 9 +-------- hw/i386/pc_q35.c | 9 +-------- include/hw/i386/pc.h | 2 ++ 4 files changed, 19 insertions(+), 16 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index bcda50efcc..a7597c6c44 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -357,6 +357,21 @@ void gsi_handler(void *opaque, int n, int level) qemu_set_irq(s->ioapic_irq[n], level); } =20 +GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled) +{ + GSIState *s; + + s =3D g_new0(GSIState, 1); + if (kvm_ioapic_in_kernel()) { + kvm_pc_setup_irq_routing(pci_enabled); + *irqs =3D qemu_allocate_irqs(kvm_pc_gsi_handler, s, GSI_NUM_PINS); + } else { + *irqs =3D qemu_allocate_irqs(gsi_handler, s, GSI_NUM_PINS); + } + + return s; +} + static void ioport80_write(void *opaque, hwaddr addr, uint64_t data, unsigned size) { diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 431965d921..452b107e1b 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -188,14 +188,7 @@ static void pc_init1(MachineState *machine, xen_load_linux(pcms); } =20 - gsi_state =3D g_malloc0(sizeof(*gsi_state)); - if (kvm_ioapic_in_kernel()) { - kvm_pc_setup_irq_routing(pcmc->pci_enabled); - pcms->gsi =3D qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, - GSI_NUM_PINS); - } else { - pcms->gsi =3D qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_P= INS); - } + gsi_state =3D pc_gsi_create(&pcms->gsi, pcmc->pci_enabled); =20 if (pcmc->pci_enabled) { pci_bus =3D i440fx_init(host_type, diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 8fad20f314..52261962b8 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -210,14 +210,7 @@ static void pc_q35_init(MachineState *machine) } =20 /* irq lines */ - gsi_state =3D g_malloc0(sizeof(*gsi_state)); - if (kvm_ioapic_in_kernel()) { - kvm_pc_setup_irq_routing(pcmc->pci_enabled); - pcms->gsi =3D qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, - GSI_NUM_PINS); - } else { - pcms->gsi =3D qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_P= INS); - } + gsi_state =3D pc_gsi_create(&pcms->gsi, pcmc->pci_enabled); =20 /* create pci host bus */ q35_host =3D Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE)); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index b63fc7631e..d0c6b9d469 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -174,6 +174,8 @@ typedef struct GSIState { =20 void gsi_handler(void *opaque, int n, int level); =20 +GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); + /* vmport.c */ #define TYPE_VMPORT "vmport" typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; 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spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571157138462643.5632359808822; Tue, 15 Oct 2019 09:32:18 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPjB-0005Ig-Ie; Tue, 15 Oct 2019 16:31:17 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPjA-0005Ht-G2 for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:31:16 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 327ff461-ef69-11e9-9397-12813bfff9fa; Tue, 15 Oct 2019 16:31:11 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A7C6780166F; Tue, 15 Oct 2019 16:31:10 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 0599E19C58; Tue, 15 Oct 2019 16:31:04 +0000 (UTC) X-Inumbo-ID: 327ff461-ef69-11e9-9397-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:54 +0200 Message-Id: <20191015162705.28087-22-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.67]); Tue, 15 Oct 2019 16:31:10 +0000 (UTC) Subject: [Xen-devel] [PATCH 21/32] hw/i386/pc: Reduce gsi_handler scope X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" pc_gsi_create() is the single function that uses gsi_handler. Make it a static variable. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic Reviewed-by: Thomas Huth --- hw/i386/pc.c | 2 +- include/hw/i386/pc.h | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a7597c6c44..59de0c8a1f 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -346,7 +346,7 @@ GlobalProperty pc_compat_1_4[] =3D { }; const size_t pc_compat_1_4_len =3D G_N_ELEMENTS(pc_compat_1_4); =20 -void gsi_handler(void *opaque, int n, int level) +static void gsi_handler(void *opaque, int n, int level) { GSIState *s =3D opaque; =20 diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index d0c6b9d469..75b44e156c 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -172,8 +172,6 @@ typedef struct GSIState { qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; } GSIState; =20 -void gsi_handler(void *opaque, int n, int level); - GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); =20 /* vmport.c */ --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157163; cv=none; d=zoho.com; s=zohoarc; b=d6ZwGUeDRPFoyD28EtN2VMxuAMEdZF5e+mGL2d86udRZRs2H1mdB4jxBG+noIbm3zxUhDdANE+i3R+6+boSgvbmFsV1Sh+qe3f67qg3117dJ51i2vcH5OGqiy0OlkZEtXrVyci0jncoH5ewqG/wqiv5VOeOFkvZJJ0cGP2zCJmw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571157163; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=9mg5VlNlhw9t6o86rFLfLKP37z5nptOnp+f69WShZHU=; b=TfvLEhvssvqbiYR8gQxLwEb4zqQsS3uwwUYl+MDgL3Rl0AALRkFnHfa0zt6xAZBPhuN3qRJrqA3m0iIuShBg/DW1MU1m79PNmCUt1ZI5Yw6JF/UHUPiKPxqbqW2VihDQofOSVyGJ4x+WuXcFdGWDrbo6ERbv8rHzdXuGIR6eTKg= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571157163524144.1040660515522; Tue, 15 Oct 2019 09:32:43 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPjX-0005U1-TC; Tue, 15 Oct 2019 16:31:39 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPjW-0005TP-NB for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:31:38 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 4269b762-ef69-11e9-9397-12813bfff9fa; Tue, 15 Oct 2019 16:31:37 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6136810C093C; Tue, 15 Oct 2019 16:31:37 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 7337A19C58; Tue, 15 Oct 2019 16:31:11 +0000 (UTC) X-Inumbo-ID: 4269b762-ef69-11e9-9397-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:55 +0200 Message-Id: <20191015162705.28087-23-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.66]); Tue, 15 Oct 2019 16:31:37 +0000 (UTC) Subject: [Xen-devel] [PATCH 22/32] hw/i386/pc: Move gsi_state creation code X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The block code related to IRQ start few lines later. Move the comment and the pc_gsi_create() call where we start to use the IRQs. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc_q35.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 52261962b8..6d096eff28 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -209,9 +209,6 @@ static void pc_q35_init(MachineState *machine) rom_memory, &ram_memory); } =20 - /* irq lines */ - gsi_state =3D pc_gsi_create(&pcms->gsi, pcmc->pci_enabled); - /* create pci host bus */ q35_host =3D Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE)); =20 @@ -245,6 +242,9 @@ static void pc_q35_init(MachineState *machine) object_property_set_link(OBJECT(machine), OBJECT(lpc), PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); =20 + /* irq lines */ + gsi_state =3D pc_gsi_create(&pcms->gsi, pcmc->pci_enabled); + ich9_lpc =3D ICH9_LPC_DEVICE(lpc); lpc_dev =3D DEVICE(lpc); for (i =3D 0; i < GSI_NUM_PINS; i++) { --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157173; cv=none; d=zoho.com; s=zohoarc; b=m12KwoVD+zz8O3Y0CopLFBNLT/lkRtuyXhR295hFu7UECcXgwezJyvlb0vuwOhcr2B0Uzb587VNhGdWQDaeWBSo2P4UiCMha3bTuol0J9kdPcF+RnyQ6V58sNC12pnfltlgj4sZyZxwPaowbwBcue81STCIIGisZRqe6WUQekzg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571157173; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=TLWZ14UMl676ydz6KRvEHytQ032nTytCKG1GMz06Mlg=; b=GZJ9PkJDGWXiNDkIK4AZRmvRj+W/DGy7TOCy1X3BXzFK22VLKT7iUqS7zb0zI0DbWmL180swuZB5Vm0YCpmXhvS/XA2DE52wJzQafWmH7pNB6pCrUfSq9ttK6WkajH3ReGkocnYDasbC5egkgLq+9YbOw0Ei9D11NISn34rEp0I= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571157173230435.20552234111074; Tue, 15 Oct 2019 09:32:53 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPjl-0005aE-7E; Tue, 15 Oct 2019 16:31:53 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPjk-0005Zl-Hv for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:31:52 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 4ae4574e-ef69-11e9-9397-12813bfff9fa; Tue, 15 Oct 2019 16:31:52 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8B7FE8AC6F5; Tue, 15 Oct 2019 16:31:51 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D974419C58; Tue, 15 Oct 2019 16:31:37 +0000 (UTC) X-Inumbo-ID: 4ae4574e-ef69-11e9-9397-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:56 +0200 Message-Id: <20191015162705.28087-24-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.69]); Tue, 15 Oct 2019 16:31:51 +0000 (UTC) Subject: [Xen-devel] [PATCH 23/32] hw/i386/pc: Extract pc_i8259_create() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The i8259 creation code is common to all PC machines, extract the common code. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc.c | 19 +++++++++++++++++++ hw/i386/pc_piix.c | 13 +------------ hw/i386/pc_q35.c | 14 +------------- include/hw/i386/pc.h | 1 + 4 files changed, 22 insertions(+), 25 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 59de0c8a1f..2b6a52f23b 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1978,6 +1978,25 @@ void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_b= us, PCIBus *pci_bus) rom_reset_order_override(); } =20 +void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs) +{ + qemu_irq *i8259; + + if (kvm_pic_in_kernel()) { + i8259 =3D kvm_i8259_init(isa_bus); + } else if (xen_enabled()) { + i8259 =3D xen_interrupt_controller_init(); + } else { + i8259 =3D i8259_init(isa_bus, pc_allocate_cpu_irq()); + } + + for (size_t i =3D 0; i < ISA_NUM_IRQS; i++) { + i8259_irqs[i] =3D i8259[i]; + } + + g_free(i8259); +} + void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name) { DeviceState *dev; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 452b107e1b..0a7193a3cc 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -81,7 +81,6 @@ static void pc_init1(MachineState *machine, ISABus *isa_bus; PCII440FXState *i440fx_state; int piix3_devfn =3D -1; - qemu_irq *i8259; qemu_irq smi_irq; GSIState *gsi_state; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; @@ -208,18 +207,8 @@ static void pc_init1(MachineState *machine, } isa_bus_irqs(isa_bus, pcms->gsi); =20 - if (kvm_pic_in_kernel()) { - i8259 =3D kvm_i8259_init(isa_bus); - } else if (xen_enabled()) { - i8259 =3D xen_interrupt_controller_init(); - } else { - i8259 =3D i8259_init(isa_bus, pc_allocate_cpu_irq()); - } + pc_i8259_create(isa_bus, gsi_state->i8259_irq); =20 - for (i =3D 0; i < ISA_NUM_IRQS; i++) { - gsi_state->i8259_irq[i] =3D i8259[i]; - } - g_free(i8259); if (pcmc->pci_enabled) { ioapic_init_gsi(gsi_state, "i440fx"); } diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 6d096eff28..f4fb9a02ba 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -128,7 +128,6 @@ static void pc_q35_init(MachineState *machine) MemoryRegion *ram_memory; GSIState *gsi_state; ISABus *isa_bus; - qemu_irq *i8259; int i; ICH9LPCState *ich9_lpc; PCIDevice *ahci; @@ -255,18 +254,7 @@ static void pc_q35_init(MachineState *machine) pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq); isa_bus =3D ich9_lpc->isa_bus; =20 - if (kvm_pic_in_kernel()) { - i8259 =3D kvm_i8259_init(isa_bus); - } else if (xen_enabled()) { - i8259 =3D xen_interrupt_controller_init(); - } else { - i8259 =3D i8259_init(isa_bus, pc_allocate_cpu_irq()); - } - - for (i =3D 0; i < ISA_NUM_IRQS; i++) { - gsi_state->i8259_irq[i] =3D i8259[i]; - } - g_free(i8259); + pc_i8259_create(isa_bus, gsi_state->i8259_irq); =20 if (pcmc->pci_enabled) { ioapic_init_gsi(gsi_state, "q35"); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 75b44e156c..183326d9fe 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -235,6 +235,7 @@ void pc_pci_device_init(PCIBus *pci_bus); =20 typedef void (*cpu_set_smm_t)(int smm, void *arg); =20 +void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); =20 ISADevice *pc_find_fdc0(void); --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157183; cv=none; d=zoho.com; s=zohoarc; b=Gkf9vOoFdZqJU1EeWVmKl5iwM5I8HDW6gbkR506/gcDmN0mjhoQ/dR7ygfSAkknwNauD6LKkKb7GiTUNECkKcMjgqaLEuN+8mIRhgP68JVXq3sh03LBVHqRnFwFnbso7IWAiI62Vooqbprd3JCW6j7UotHrvpZP30ssEwFB/QLY= ARC-Message-Signature: i=1; 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Tue, 15 Oct 2019 16:31:59 +0000 (UTC) Subject: [Xen-devel] [PATCH 24/32] hw/i386/pc: Remove kvm_i386.h include X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" By extracting pc_gsi_create() and pc_i8259_create() we removed the access to "kvm_i386.h" from the machine code. We can now remove it. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc_piix.c | 1 - hw/i386/pc_q35.c | 1 - 2 files changed, 2 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 0a7193a3cc..5b35ff04c7 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -57,7 +57,6 @@ #endif #include "migration/global_state.h" #include "migration/misc.h" -#include "kvm_i386.h" #include "sysemu/numa.h" =20 #define MAX_IDE_BUS 2 diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index f4fb9a02ba..2e5d6821fb 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -36,7 +36,6 @@ #include "hw/timer/mc146818rtc.h" #include "hw/xen/xen.h" #include "sysemu/kvm.h" -#include "kvm_i386.h" #include "hw/kvm/clock.h" #include "hw/pci-host/q35.h" #include "hw/qdev-properties.h" --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157197; cv=none; d=zoho.com; s=zohoarc; b=kDU/j4HM9MBlEwl4qHAjfWesGBYj4aR+vymI8ETbcB+vGKSCcswGP4qmr4/C+c3o1OCilbd7uFRt6beNAMuAxeDWm9wn0XybpJeU2sTg0fgRKL/Z6cPvT0tBzyWzV1GMQpVMdc2KDINgKQslM8wusuLl4dx2zFt562xqdIIJEcI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571157197; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=RREdg2c7yuLCeQeu+CxDhBA173TERsJbFlSuE2vefxY=; b=AO+dxUraNZ78Z0OCiMQVDuFWVnCxPg331ozqISm2t2qLe+YKtHNw0d1AArp1SB2qcrR5WXBTlmwwfu7GlwTNtog827ZMPPWG68Te1wct8XCk9CpJc9h04SIeMK6Ts/4kEIfzJHGoq5nsARW4FwjNrF3vjurou1qD8Rld3YBsNmY= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571157197152114.82790143089812; Tue, 15 Oct 2019 09:33:17 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPkA-0005n9-Ro; Tue, 15 Oct 2019 16:32:18 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPk9-0005mm-TJ for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:32:17 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id 59bec57e-ef69-11e9-a531-bc764e2007e4; Tue, 15 Oct 2019 16:32:17 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6BBA61DA2; Tue, 15 Oct 2019 16:32:16 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 0250A19C58; Tue, 15 Oct 2019 16:31:59 +0000 (UTC) X-Inumbo-ID: 59bec57e-ef69-11e9-a531-bc764e2007e4 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:58 +0200 Message-Id: <20191015162705.28087-26-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.71]); Tue, 15 Oct 2019 16:32:16 +0000 (UTC) Subject: [Xen-devel] [PATCH 25/32] hw/pci-host/piix: Extract piix3_create() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Extract the PIIX3 creation code from the i440fx_init() function. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/pci-host/piix.c | 51 ++++++++++++++++++++++++++++------------------ 1 file changed, 31 insertions(+), 20 deletions(-) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 2f4cbcbfe9..3292703de7 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -331,6 +331,36 @@ static void i440fx_realize(PCIDevice *dev, Error **err= p) } } =20 +static PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus) +{ + PIIX3State *piix3; + PCIDevice *pci_dev; + + /* + * Xen supports additional interrupt routes from the PCI devices to + * the IOAPIC: the four pins of each PCI device on the bus are also + * connected to the IOAPIC directly. + * These additional routes can be discovered through ACPI. + */ + if (xen_enabled()) { + pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, + TYPE_PIIX3_XEN_DEVICE); + piix3 =3D PIIX3_PCI_DEVICE(pci_dev); + pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq, + piix3, XEN_PIIX_NUM_PIRQS); + } else { + pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, + TYPE_PIIX3_DEVICE); + piix3 =3D PIIX3_PCI_DEVICE(pci_dev); + pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq, + piix3, PIIX_NUM_PIRQS); + pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq); + } + *isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); + + return piix3; +} + PCIBus *i440fx_init(const char *host_type, const char *pci_type, PCII440FXState **pi440fx_state, int *piix3_devfn, @@ -400,27 +430,8 @@ PCIBus *i440fx_init(const char *host_type, const char = *pci_type, PAM_EXPAN_SIZE); } =20 - /* Xen supports additional interrupt routes from the PCI devices to - * the IOAPIC: the four pins of each PCI device on the bus are also - * connected to the IOAPIC directly. - * These additional routes can be discovered through ACPI. */ - if (xen_enabled()) { - PCIDevice *pci_dev =3D pci_create_simple_multifunction(b, - -1, true, TYPE_PIIX3_XEN_DEVICE); - piix3 =3D PIIX3_PCI_DEVICE(pci_dev); - pci_bus_irqs(b, xen_piix3_set_irq, xen_pci_slot_get_pirq, - piix3, XEN_PIIX_NUM_PIRQS); - } else { - PCIDevice *pci_dev =3D pci_create_simple_multifunction(b, - -1, true, TYPE_PIIX3_DEVICE); - piix3 =3D PIIX3_PCI_DEVICE(pci_dev); - pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, piix3, - PIIX_NUM_PIRQS); - pci_bus_set_route_irq_fn(b, piix3_route_intx_pin_to_irq); - } + piix3 =3D piix3_create(b, isa_bus); piix3->pic =3D pic; - *isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); - *piix3_devfn =3D piix3->dev.devfn; =20 ram_size =3D ram_size / 8 / 1024 / 1024; --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; 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Tue, 15 Oct 2019 16:32:25 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 26E3619C58; Tue, 15 Oct 2019 16:32:16 +0000 (UTC) X-Inumbo-ID: 5f59fa6c-ef69-11e9-9397-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:26:59 +0200 Message-Id: <20191015162705.28087-27-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.63]); Tue, 15 Oct 2019 16:32:25 +0000 (UTC) Subject: [Xen-devel] [PATCH 26/32] hw/pci-host/piix: Move RCR_IOPORT register definition X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Philippe Mathieu-Daud=C3=A9 The RCR_IOPORT register belongs to the PIIX chipset. Move the definition to "piix.h". Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/pci-host/piix.c | 1 + include/hw/i386/pc.h | 6 ------ include/hw/southbridge/piix.h | 6 ++++++ 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 3292703de7..3770575c1a 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -27,6 +27,7 @@ #include "hw/irq.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" +#include "hw/southbridge/piix.h" #include "hw/qdev-properties.h" #include "hw/isa/isa.h" #include "hw/sysbus.h" diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 183326d9fe..1c20b96571 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -257,12 +257,6 @@ typedef struct PCII440FXState PCII440FXState; =20 #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" =20 -/* - * Reset Control Register: PCI-accessible ISA-Compatible Register at addre= ss - * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). - */ -#define RCR_IOPORT 0xcf9 - PCIBus *i440fx_init(const char *host_type, const char *pci_type, PCII440FXState **pi440fx_state, int *piix_devfn, ISABus **isa_bus, qemu_irq *pic, diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index add352456b..79ebe0089b 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -18,6 +18,12 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t s= mb_io_base, qemu_irq sci_irq, qemu_irq smi_irq, int smm_enabled, DeviceState **piix4_pm); =20 +/* + * Reset Control Register: PCI-accessible ISA-Compatible Register at addre= ss + * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). + */ +#define RCR_IOPORT 0xcf9 + extern PCIDevice *piix4_dev; =20 DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Tue, 15 Oct 2019 16:32:26 +0000 (UTC) X-Inumbo-ID: 6983a6ab-ef69-11e9-9397-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:27:00 +0200 Message-Id: <20191015162705.28087-28-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Tue, 15 Oct 2019 16:32:44 +0000 (UTC) Subject: [Xen-devel] [PATCH 27/32] hw/pci-host/piix: Define and use the PIIX IRQ Route Control Registers X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The IRQ Route Control registers definitions belong to the PIIX chipset. We were only defining the 'A' register. Define the other B, C and D registers, and use them. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Paul Durrant Reviewed-by: Aleksandar Markovic --- hw/i386/xen/xen-hvm.c | 5 +++-- hw/mips/gt64xxx_pci.c | 4 ++-- hw/pci-host/piix.c | 9 ++++----- include/hw/southbridge/piix.h | 6 ++++++ 4 files changed, 15 insertions(+), 9 deletions(-) diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c index 6b5e5bb7f5..4ce2fb9c89 100644 --- a/hw/i386/xen/xen-hvm.c +++ b/hw/i386/xen/xen-hvm.c @@ -14,6 +14,7 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/i386/pc.h" +#include "hw/southbridge/piix.h" #include "hw/irq.h" #include "hw/hw.h" #include "hw/i386/apic-msidef.h" @@ -156,8 +157,8 @@ void xen_piix_pci_write_config_client(uint32_t address,= uint32_t val, int len) v =3D 0; } v &=3D 0xf; - if (((address + i) >=3D 0x60) && ((address + i) <=3D 0x63)) { - xen_set_pci_link_route(xen_domid, address + i - 0x60, v); + if (((address + i) >=3D PIIX_PIRQCA) && ((address + i) <=3D PIIX_P= IRQCD)) { + xen_set_pci_link_route(xen_domid, address + i - PIIX_PIRQCA, v= ); } } } diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index c277398c0d..5cab9c1ee1 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1013,12 +1013,12 @@ static void gt64120_pci_set_irq(void *opaque, int i= rq_num, int level) =20 /* now we change the pic irq level according to the piix irq mappings = */ /* XXX: optimize */ - pic_irq =3D piix4_dev->config[0x60 + irq_num]; + pic_irq =3D piix4_dev->config[PIIX_PIRQCA + irq_num]; if (pic_irq < 16) { /* The pic level is the logical OR of all the PCI irqs mapped to i= t. */ pic_level =3D 0; for (i =3D 0; i < 4; i++) { - if (pic_irq =3D=3D piix4_dev->config[0x60 + i]) { + if (pic_irq =3D=3D piix4_dev->config[PIIX_PIRQCA + i]) { pic_level |=3D pci_irq_levels[i]; } } diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 3770575c1a..a450fc726e 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -61,7 +61,6 @@ typedef struct I440FXState { #define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ #define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ #define XEN_PIIX_NUM_PIRQS 128ULL -#define PIIX_PIRQC 0x60 =20 typedef struct PIIX3State { PCIDevice dev; @@ -468,7 +467,7 @@ static void piix3_set_irq_level_internal(PIIX3State *pi= ix3, int pirq, int level) int pic_irq; uint64_t mask; =20 - pic_irq =3D piix3->dev.config[PIIX_PIRQC + pirq]; + pic_irq =3D piix3->dev.config[PIIX_PIRQCA + pirq]; if (pic_irq >=3D PIIX_NUM_PIC_IRQS) { return; } @@ -482,7 +481,7 @@ static void piix3_set_irq_level(PIIX3State *piix3, int = pirq, int level) { int pic_irq; =20 - pic_irq =3D piix3->dev.config[PIIX_PIRQC + pirq]; + pic_irq =3D piix3->dev.config[PIIX_PIRQCA + pirq]; if (pic_irq >=3D PIIX_NUM_PIC_IRQS) { return; } @@ -501,7 +500,7 @@ static void piix3_set_irq(void *opaque, int pirq, int l= evel) static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) { PIIX3State *piix3 =3D opaque; - int irq =3D piix3->dev.config[PIIX_PIRQC + pin]; + int irq =3D piix3->dev.config[PIIX_PIRQCA + pin]; PCIINTxRoute route; =20 if (irq < PIIX_NUM_PIC_IRQS) { @@ -530,7 +529,7 @@ static void piix3_write_config(PCIDevice *dev, uint32_t address, uint32_t val, int len) { pci_default_write_config(dev, address, val, len); - if (ranges_overlap(address, len, PIIX_PIRQC, 4)) { + if (ranges_overlap(address, len, PIIX_PIRQCA, 4)) { PIIX3State *piix3 =3D PIIX3_PCI_DEVICE(dev); int pic_irq; =20 diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 79ebe0089b..9c92c37a4d 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -18,6 +18,12 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t s= mb_io_base, qemu_irq sci_irq, qemu_irq smi_irq, int smm_enabled, DeviceState **piix4_pm); =20 +/* PIRQRC[A:D]: PIRQx Route Control Registers */ +#define PIIX_PIRQCA 0x60 +#define PIIX_PIRQCB 0x61 +#define PIIX_PIRQCC 0x62 +#define PIIX_PIRQCD 0x63 + /* * Reset Control Register: PCI-accessible ISA-Compatible Register at addre= ss * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000). --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; 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Tue, 15 Oct 2019 16:32:51 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D253319C69; Tue, 15 Oct 2019 16:32:44 +0000 (UTC) X-Inumbo-ID: 6e91c17c-ef69-11e9-9397-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:27:01 +0200 Message-Id: <20191015162705.28087-29-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.46]); Tue, 15 Oct 2019 16:32:51 +0000 (UTC) Subject: [Xen-devel] [PATCH 28/32] hw/pci-host/piix: Move i440FX declarations to hw/pci-host/i440fx.h X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Philippe Mathieu-Daud=C3=A9 The hw/pci-host/piix.c contains a mix of PIIX3 and i440FX chipsets functions. To be able to split it, we need to export some declarations first. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- MAINTAINERS | 1 + hw/acpi/pcihp.c | 2 +- hw/i386/pc_piix.c | 1 + hw/pci-host/piix.c | 1 + include/hw/i386/pc.h | 22 --------------------- include/hw/pci-host/i440fx.h | 37 ++++++++++++++++++++++++++++++++++++ stubs/pci-host-piix.c | 3 ++- 7 files changed, 43 insertions(+), 24 deletions(-) create mode 100644 include/hw/pci-host/i440fx.h diff --git a/MAINTAINERS b/MAINTAINERS index 556f58bd8c..adf059a164 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1228,6 +1228,7 @@ F: hw/i386/ F: hw/pci-host/piix.c F: hw/pci-host/q35.c F: hw/pci-host/pam.c +F: include/hw/pci-host/i440fx.h F: include/hw/pci-host/q35.h F: include/hw/pci-host/pam.h F: hw/isa/lpc_ich9.c diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 82d295b6e8..8413348a33 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -27,7 +27,7 @@ #include "qemu/osdep.h" #include "hw/acpi/pcihp.h" =20 -#include "hw/i386/pc.h" +#include "hw/pci-host/i440fx.h" #include "hw/pci/pci.h" #include "hw/pci/pci_bridge.h" #include "hw/acpi/acpi.h" diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 5b35ff04c7..8ac4bf12ca 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -29,6 +29,7 @@ #include "hw/loader.h" #include "hw/i386/pc.h" #include "hw/i386/apic.h" +#include "hw/pci-host/i440fx.h" #include "hw/southbridge/piix.h" #include "hw/display/ramfb.h" #include "hw/firmware/smbios.h" diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index a450fc726e..0b5da5bc94 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -27,6 +27,7 @@ #include "hw/irq.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" +#include "hw/pci-host/i440fx.h" #include "hw/southbridge/piix.h" #include "hw/qdev-properties.h" #include "hw/isa/isa.h" diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 1c20b96571..cead2828de 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -248,28 +248,6 @@ int cmos_get_fd_drive_type(FloppyDriveType fd0); /* hpet.c */ extern int no_hpet; =20 -/* piix_pci.c */ -struct PCII440FXState; -typedef struct PCII440FXState PCII440FXState; - -#define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" -#define TYPE_I440FX_PCI_DEVICE "i440FX" - -#define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" - -PCIBus *i440fx_init(const char *host_type, const char *pci_type, - PCII440FXState **pi440fx_state, int *piix_devfn, - ISABus **isa_bus, qemu_irq *pic, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - ram_addr_t ram_size, - ram_addr_t below_4g_mem_size, - ram_addr_t above_4g_mem_size, - MemoryRegion *pci_memory, - MemoryRegion *ram_memory); - -PCIBus *find_i440fx(void); - /* pc_sysfw.c */ void pc_system_flash_create(PCMachineState *pcms); void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memor= y); diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h new file mode 100644 index 0000000000..e327f9bf87 --- /dev/null +++ b/include/hw/pci-host/i440fx.h @@ -0,0 +1,37 @@ +/* + * QEMU i440FX North Bridge Emulation + * + * Copyright (c) 2006 Fabrice Bellard + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + * + */ + +#ifndef HW_PCI_I440FX_H +#define HW_PCI_I440FX_H + +#include "hw/hw.h" +#include "hw/pci/pci_bus.h" + +typedef struct PCII440FXState PCII440FXState; + +#define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" +#define TYPE_I440FX_PCI_DEVICE "i440FX" + +#define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" + +PCIBus *i440fx_init(const char *host_type, const char *pci_type, + PCII440FXState **pi440fx_state, int *piix_devfn, + ISABus **isa_bus, qemu_irq *pic, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io, + ram_addr_t ram_size, + ram_addr_t below_4g_mem_size, + ram_addr_t above_4g_mem_size, + MemoryRegion *pci_memory, + MemoryRegion *ram_memory); + +PCIBus *find_i440fx(void); + +#endif diff --git a/stubs/pci-host-piix.c b/stubs/pci-host-piix.c index 6ed81b1f21..93975adbfe 100644 --- a/stubs/pci-host-piix.c +++ b/stubs/pci-host-piix.c @@ -1,5 +1,6 @@ #include "qemu/osdep.h" -#include "hw/i386/pc.h" +#include "hw/pci-host/i440fx.h" + PCIBus *find_i440fx(void) { return NULL; --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; 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Tue, 15 Oct 2019 16:33:05 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 0753419C5B; Tue, 15 Oct 2019 16:32:51 +0000 (UTC) X-Inumbo-ID: 76f6074c-ef69-11e9-8aca-bc764e2007e4 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:27:02 +0200 Message-Id: <20191015162705.28087-30-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.66]); Tue, 15 Oct 2019 16:33:05 +0000 (UTC) Subject: [Xen-devel] [PATCH 29/32] hw/pci-host/piix: Fix code style issues X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" We will move this code, fix its style first. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- hw/pci-host/piix.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 0b5da5bc94..61f91ff561 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -133,9 +133,10 @@ static PCIINTxRoute piix3_route_intx_pin_to_irq(void *= opaque, int pci_intx); static void piix3_write_config_xen(PCIDevice *dev, uint32_t address, uint32_t val, int len); =20 -/* return the global irq number corresponding to a given device irq - pin. We could also use the bus number to have a more precise - mapping. */ +/* + * Return the global irq number corresponding to a given device irq + * pin. We could also use the bus number to have a more precise mapping. + */ static int pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) { int slot_addend; --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157269; cv=none; d=zoho.com; s=zohoarc; b=TdXR9aR19ivb6kNT2INEljZSEXBTP/AykC2cmNIeCjyzQOne/0/rXGRXkEMReAIvgyKCJJFCdvqA7KOM/noNc90PX2jc0m3ilIfzDrWpxHNJO2UdC2pXiWcRVegNa7e9rxurDwOXxOnbb6Te8dYC1DiEB1QjQ4H4sCXGV1BvhsQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571157269; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=RhW3MKWd/U3NEenO80t5H/vAlLX9d9ck0tyKaN24azM=; b=SxlG1e0jbMklRGyFVEDKvaK2POZxHSTBNHXImyeMmizuzfKPFHm3pIityRbyR6dCHvDFDAZ9GvSwNY0/9nS8a3X/MJn/1wSrLcV7iK65hNWglqXX6DTnzBsIoJSTXe/1BLHnNmc8+q+O6zChnztSHigZULOKUZD4ktZdfD8hIAM= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571157269921594.9255168933562; Tue, 15 Oct 2019 09:34:29 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPl8-0006Gt-Hy; Tue, 15 Oct 2019 16:33:18 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPl6-0006Fc-Dq for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:33:16 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 7cbcebaa-ef69-11e9-9397-12813bfff9fa; Tue, 15 Oct 2019 16:33:15 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 34CCFC0568FD; Tue, 15 Oct 2019 16:33:15 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 2776A4518; Tue, 15 Oct 2019 16:33:05 +0000 (UTC) X-Inumbo-ID: 7cbcebaa-ef69-11e9-9397-12813bfff9fa From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:27:03 +0200 Message-Id: <20191015162705.28087-31-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Tue, 15 Oct 2019 16:33:15 +0000 (UTC) Subject: [Xen-devel] [PATCH 30/32] hw/pci-host/piix: Extract PIIX3 functions to hw/isa/piix3.c X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Philippe Mathieu-Daud=C3=A9 Move all the PIIX3 functions to a new file: hw/isa/piix3.c. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- Checkpatch warning: ERROR: spaces required around that '*' (ctx:VxV) #312: FILE: hw/isa/piix3.c:248: + .subsections =3D (const VMStateDescription*[]) { ^ --- MAINTAINERS | 1 + hw/i386/Kconfig | 1 + hw/isa/Kconfig | 4 + hw/isa/Makefile.objs | 1 + hw/isa/piix3.c | 399 +++++++++++++++++++++++++++++++++ hw/pci-host/Kconfig | 1 - hw/pci-host/piix.c | 402 ---------------------------------- include/hw/southbridge/piix.h | 36 +++ 8 files changed, 442 insertions(+), 403 deletions(-) create mode 100644 hw/isa/piix3.c diff --git a/MAINTAINERS b/MAINTAINERS index adf059a164..4845f47d93 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1231,6 +1231,7 @@ F: hw/pci-host/pam.c F: include/hw/pci-host/i440fx.h F: include/hw/pci-host/q35.h F: include/hw/pci-host/pam.h +F: hw/isa/piix3.c F: hw/isa/lpc_ich9.c F: hw/i2c/smbus_ich9.c F: hw/acpi/piix4.c diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index c5c9d4900e..589d75e26a 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -61,6 +61,7 @@ config I440FX select PC_ACPI select ACPI_SMBUS select PCI_PIIX + select PIIX3 select IDE_PIIX select DIMM select SMBIOS diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 98a289957e..8a38813cc1 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -29,6 +29,10 @@ config PC87312 select FDC select IDE_ISA =20 +config PIIX3 + bool + select ISA_BUS + config PIIX4 bool # For historical reasons, SuperIO devices are created in the board diff --git a/hw/isa/Makefile.objs b/hw/isa/Makefile.objs index ff97485504..8e73960a75 100644 --- a/hw/isa/Makefile.objs +++ b/hw/isa/Makefile.objs @@ -3,6 +3,7 @@ common-obj-$(CONFIG_ISA_SUPERIO) +=3D isa-superio.o common-obj-$(CONFIG_APM) +=3D apm.o common-obj-$(CONFIG_I82378) +=3D i82378.o common-obj-$(CONFIG_PC87312) +=3D pc87312.o +common-obj-$(CONFIG_PIIX3) +=3D piix3.o common-obj-$(CONFIG_PIIX4) +=3D piix4.o common-obj-$(CONFIG_VT82C686) +=3D vt82c686.o common-obj-$(CONFIG_SMC37C669) +=3D smc37c669-superio.o diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c new file mode 100644 index 0000000000..05146447ef --- /dev/null +++ b/hw/isa/piix3.c @@ -0,0 +1,399 @@ +/* + * QEMU PIIX PCI ISA Bridge Emulation + * + * Copyright (c) 2006 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "qemu/range.h" +#include "hw/southbridge/piix.h" +#include "hw/irq.h" +#include "hw/isa/isa.h" +#include "hw/xen/xen.h" +#include "sysemu/sysemu.h" +#include "sysemu/reset.h" +#include "sysemu/runstate.h" +#include "migration/vmstate.h" + +#define XEN_PIIX_NUM_PIRQS 128ULL + +#define TYPE_PIIX3_PCI_DEVICE "pci-piix3" +#define PIIX3_PCI_DEVICE(obj) \ + OBJECT_CHECK(PIIX3State, (obj), TYPE_PIIX3_PCI_DEVICE) + +#define TYPE_PIIX3_DEVICE "PIIX3" +#define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" + +static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq) +{ + qemu_set_irq(piix3->pic[pic_irq], + !!(piix3->pic_levels & + (((1ULL << PIIX_NUM_PIRQS) - 1) << + (pic_irq * PIIX_NUM_PIRQS)))); +} + +static void piix3_set_irq_level_internal(PIIX3State *piix3, int pirq, int = level) +{ + int pic_irq; + uint64_t mask; + + pic_irq =3D piix3->dev.config[PIIX_PIRQCA + pirq]; + if (pic_irq >=3D PIIX_NUM_PIC_IRQS) { + return; + } + + mask =3D 1ULL << ((pic_irq * PIIX_NUM_PIRQS) + pirq); + piix3->pic_levels &=3D ~mask; + piix3->pic_levels |=3D mask * !!level; +} + +static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level) +{ + int pic_irq; + + pic_irq =3D piix3->dev.config[PIIX_PIRQCA + pirq]; + if (pic_irq >=3D PIIX_NUM_PIC_IRQS) { + return; + } + + piix3_set_irq_level_internal(piix3, pirq, level); + + piix3_set_irq_pic(piix3, pic_irq); +} + +static void piix3_set_irq(void *opaque, int pirq, int level) +{ + PIIX3State *piix3 =3D opaque; + piix3_set_irq_level(piix3, pirq, level); +} + +static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) +{ + PIIX3State *piix3 =3D opaque; + int irq =3D piix3->dev.config[PIIX_PIRQCA + pin]; + PCIINTxRoute route; + + if (irq < PIIX_NUM_PIC_IRQS) { + route.mode =3D PCI_INTX_ENABLED; + route.irq =3D irq; + } else { + route.mode =3D PCI_INTX_DISABLED; + route.irq =3D -1; + } + return route; +} + +/* irq routing is changed. so rebuild bitmap */ +static void piix3_update_irq_levels(PIIX3State *piix3) +{ + PCIBus *bus =3D pci_get_bus(&piix3->dev); + int pirq; + + piix3->pic_levels =3D 0; + for (pirq =3D 0; pirq < PIIX_NUM_PIRQS; pirq++) { + piix3_set_irq_level(piix3, pirq, pci_bus_get_irq_level(bus, pirq)); + } +} + +static void piix3_write_config(PCIDevice *dev, + uint32_t address, uint32_t val, int len) +{ + pci_default_write_config(dev, address, val, len); + if (ranges_overlap(address, len, PIIX_PIRQCA, 4)) { + PIIX3State *piix3 =3D PIIX3_PCI_DEVICE(dev); + int pic_irq; + + pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev)); + piix3_update_irq_levels(piix3); + for (pic_irq =3D 0; pic_irq < PIIX_NUM_PIC_IRQS; pic_irq++) { + piix3_set_irq_pic(piix3, pic_irq); + } + } +} + +static void piix3_write_config_xen(PCIDevice *dev, + uint32_t address, uint32_t val, int len) +{ + xen_piix_pci_write_config_client(address, val, len); + piix3_write_config(dev, address, val, len); +} + +static void piix3_reset(void *opaque) +{ + PIIX3State *d =3D opaque; + uint8_t *pci_conf =3D d->dev.config; + + pci_conf[0x04] =3D 0x07; /* master, memory and I/O */ + pci_conf[0x05] =3D 0x00; + pci_conf[0x06] =3D 0x00; + pci_conf[0x07] =3D 0x02; /* PCI_status_devsel_medium */ + pci_conf[0x4c] =3D 0x4d; + pci_conf[0x4e] =3D 0x03; + pci_conf[0x4f] =3D 0x00; + pci_conf[0x60] =3D 0x80; + pci_conf[0x61] =3D 0x80; + pci_conf[0x62] =3D 0x80; + pci_conf[0x63] =3D 0x80; + pci_conf[0x69] =3D 0x02; + pci_conf[0x70] =3D 0x80; + pci_conf[0x76] =3D 0x0c; + pci_conf[0x77] =3D 0x0c; + pci_conf[0x78] =3D 0x02; + pci_conf[0x79] =3D 0x00; + pci_conf[0x80] =3D 0x00; + pci_conf[0x82] =3D 0x00; + pci_conf[0xa0] =3D 0x08; + pci_conf[0xa2] =3D 0x00; + pci_conf[0xa3] =3D 0x00; + pci_conf[0xa4] =3D 0x00; + pci_conf[0xa5] =3D 0x00; + pci_conf[0xa6] =3D 0x00; + pci_conf[0xa7] =3D 0x00; + pci_conf[0xa8] =3D 0x0f; + pci_conf[0xaa] =3D 0x00; + pci_conf[0xab] =3D 0x00; + pci_conf[0xac] =3D 0x00; + pci_conf[0xae] =3D 0x00; + + d->pic_levels =3D 0; + d->rcr =3D 0; +} + +static int piix3_post_load(void *opaque, int version_id) +{ + PIIX3State *piix3 =3D opaque; + int pirq; + + /* + * Because the i8259 has not been deserialized yet, qemu_irq_raise + * might bring the system to a different state than the saved one; + * for example, the interrupt could be masked but the i8259 would + * not know that yet and would trigger an interrupt in the CPU. + * + * Here, we update irq levels without raising the interrupt. + * Interrupt state will be deserialized separately through the i8259. + */ + piix3->pic_levels =3D 0; + for (pirq =3D 0; pirq < PIIX_NUM_PIRQS; pirq++) { + piix3_set_irq_level_internal(piix3, pirq, + pci_bus_get_irq_level(pci_get_bus(&piix3->dev), pirq)); + } + return 0; +} + +static int piix3_pre_save(void *opaque) +{ + int i; + PIIX3State *piix3 =3D opaque; + + for (i =3D 0; i < ARRAY_SIZE(piix3->pci_irq_levels_vmstate); i++) { + piix3->pci_irq_levels_vmstate[i] =3D + pci_bus_get_irq_level(pci_get_bus(&piix3->dev), i); + } + + return 0; +} + +static bool piix3_rcr_needed(void *opaque) +{ + PIIX3State *piix3 =3D opaque; + + return (piix3->rcr !=3D 0); +} + +static const VMStateDescription vmstate_piix3_rcr =3D { + .name =3D "PIIX3/rcr", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D piix3_rcr_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(rcr, PIIX3State), + VMSTATE_END_OF_LIST() + } +}; + +static const VMStateDescription vmstate_piix3 =3D { + .name =3D "PIIX3", + .version_id =3D 3, + .minimum_version_id =3D 2, + .post_load =3D piix3_post_load, + .pre_save =3D piix3_pre_save, + .fields =3D (VMStateField[]) { + VMSTATE_PCI_DEVICE(dev, PIIX3State), + VMSTATE_INT32_ARRAY_V(pci_irq_levels_vmstate, PIIX3State, + PIIX_NUM_PIRQS, 3), + VMSTATE_END_OF_LIST() + }, + .subsections =3D (const VMStateDescription*[]) { + &vmstate_piix3_rcr, + NULL + } +}; + + +static void rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned le= n) +{ + PIIX3State *d =3D opaque; + + if (val & 4) { + qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); + return; + } + d->rcr =3D val & 2; /* keep System Reset type only */ +} + +static uint64_t rcr_read(void *opaque, hwaddr addr, unsigned len) +{ + PIIX3State *d =3D opaque; + + return d->rcr; +} + +static const MemoryRegionOps rcr_ops =3D { + .read =3D rcr_read, + .write =3D rcr_write, + .endianness =3D DEVICE_LITTLE_ENDIAN +}; + +static void piix3_realize(PCIDevice *dev, Error **errp) +{ + PIIX3State *d =3D PIIX3_PCI_DEVICE(dev); + + if (!isa_bus_new(DEVICE(d), get_system_memory(), + pci_address_space_io(dev), errp)) { + return; + } + + memory_region_init_io(&d->rcr_mem, OBJECT(dev), &rcr_ops, d, + "piix3-reset-control", 1); + memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOP= ORT, + &d->rcr_mem, 1); + + qemu_register_reset(piix3_reset, d); +} + +static void pci_piix3_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + + dc->desc =3D "ISA bridge"; + dc->vmsd =3D &vmstate_piix3; + dc->hotpluggable =3D false; + k->realize =3D piix3_realize; + k->vendor_id =3D PCI_VENDOR_ID_INTEL; + /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */ + k->device_id =3D PCI_DEVICE_ID_INTEL_82371SB_0; + k->class_id =3D PCI_CLASS_BRIDGE_ISA; + /* + * Reason: part of PIIX3 southbridge, needs to be wired up by + * pc_piix.c's pc_init1() + */ + dc->user_creatable =3D false; +} + +static const TypeInfo piix3_pci_type_info =3D { + .name =3D TYPE_PIIX3_PCI_DEVICE, + .parent =3D TYPE_PCI_DEVICE, + .instance_size =3D sizeof(PIIX3State), + .abstract =3D true, + .class_init =3D pci_piix3_class_init, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + +static void piix3_class_init(ObjectClass *klass, void *data) +{ + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + + k->config_write =3D piix3_write_config; +} + +static const TypeInfo piix3_info =3D { + .name =3D TYPE_PIIX3_DEVICE, + .parent =3D TYPE_PIIX3_PCI_DEVICE, + .class_init =3D piix3_class_init, +}; + +static void piix3_xen_class_init(ObjectClass *klass, void *data) +{ + PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); + + k->config_write =3D piix3_write_config_xen; +}; + +static const TypeInfo piix3_xen_info =3D { + .name =3D TYPE_PIIX3_XEN_DEVICE, + .parent =3D TYPE_PIIX3_PCI_DEVICE, + .class_init =3D piix3_xen_class_init, +}; + +static void piix3_register_types(void) +{ + type_register_static(&piix3_pci_type_info); + type_register_static(&piix3_info); + type_register_static(&piix3_xen_info); +} + +type_init(piix3_register_types) + +/* + * Return the global irq number corresponding to a given device irq + * pin. We could also use the bus number to have a more precise mapping. + */ +static int pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) +{ + int slot_addend; + slot_addend =3D (pci_dev->devfn >> 3) - 1; + return (pci_intx + slot_addend) & 3; +} + +PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus) +{ + PIIX3State *piix3; + PCIDevice *pci_dev; + + /* + * Xen supports additional interrupt routes from the PCI devices to + * the IOAPIC: the four pins of each PCI device on the bus are also + * connected to the IOAPIC directly. + * These additional routes can be discovered through ACPI. + */ + if (xen_enabled()) { + pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, + TYPE_PIIX3_XEN_DEVICE); + piix3 =3D PIIX3_PCI_DEVICE(pci_dev); + pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq, + piix3, XEN_PIIX_NUM_PIRQS); + } else { + pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, + TYPE_PIIX3_DEVICE); + piix3 =3D PIIX3_PCI_DEVICE(pci_dev); + pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq, + piix3, PIIX_NUM_PIRQS); + pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq); + } + *isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); + + return piix3; +} diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig index 1edc1a31d4..397043b289 100644 --- a/hw/pci-host/Kconfig +++ b/hw/pci-host/Kconfig @@ -32,7 +32,6 @@ config PCI_PIIX bool select PCI select PAM - select ISA_BUS =20 config PCI_EXPRESS_Q35 bool diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 61f91ff561..79ecd58a2b 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -24,22 +24,15 @@ =20 #include "qemu/osdep.h" #include "hw/i386/pc.h" -#include "hw/irq.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/pci-host/i440fx.h" #include "hw/southbridge/piix.h" #include "hw/qdev-properties.h" -#include "hw/isa/isa.h" #include "hw/sysbus.h" #include "qapi/error.h" -#include "qemu/range.h" -#include "hw/xen/xen.h" #include "migration/vmstate.h" #include "hw/pci-host/pam.h" -#include "sysemu/reset.h" -#include "sysemu/runstate.h" -#include "hw/i386/ioapic.h" #include "qapi/visitor.h" #include "qemu/error-report.h" =20 @@ -59,49 +52,9 @@ typedef struct I440FXState { uint32_t short_root_bus; } I440FXState; =20 -#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ -#define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ -#define XEN_PIIX_NUM_PIRQS 128ULL - -typedef struct PIIX3State { - PCIDevice dev; - - /* - * bitmap to track pic levels. - * The pic level is the logical OR of all the PCI irqs mapped to it - * So one PIC level is tracked by PIIX_NUM_PIRQS bits. - * - * PIRQ is mapped to PIC pins, we track it by - * PIIX_NUM_PIRQS * PIIX_NUM_PIC_IRQS =3D 64 bits with - * pic_irq * PIIX_NUM_PIRQS + pirq - */ -#if PIIX_NUM_PIC_IRQS * PIIX_NUM_PIRQS > 64 -#error "unable to encode pic state in 64bit in pic_levels." -#endif - uint64_t pic_levels; - - qemu_irq *pic; - - /* This member isn't used. Just for save/load compatibility */ - int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS]; - - /* Reset Control Register contents */ - uint8_t rcr; - - /* IO memory region for Reset Control Register (RCR_IOPORT) */ - MemoryRegion rcr_mem; -} PIIX3State; - -#define TYPE_PIIX3_PCI_DEVICE "pci-piix3" -#define PIIX3_PCI_DEVICE(obj) \ - OBJECT_CHECK(PIIX3State, (obj), TYPE_PIIX3_PCI_DEVICE) - #define I440FX_PCI_DEVICE(obj) \ OBJECT_CHECK(PCII440FXState, (obj), TYPE_I440FX_PCI_DEVICE) =20 -#define TYPE_PIIX3_DEVICE "PIIX3" -#define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" - struct PCII440FXState { /*< private >*/ PCIDevice parent_obj; @@ -128,22 +81,6 @@ struct PCII440FXState { */ #define I440FX_COREBOOT_RAM_SIZE 0x57 =20 -static void piix3_set_irq(void *opaque, int pirq, int level); -static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pci_intx= ); -static void piix3_write_config_xen(PCIDevice *dev, - uint32_t address, uint32_t val, int len); - -/* - * Return the global irq number corresponding to a given device irq - * pin. We could also use the bus number to have a more precise mapping. - */ -static int pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) -{ - int slot_addend; - slot_addend =3D (pci_dev->devfn >> 3) - 1; - return (pci_intx + slot_addend) & 3; -} - static void i440fx_update_memory_mappings(PCII440FXState *d) { int i; @@ -333,36 +270,6 @@ static void i440fx_realize(PCIDevice *dev, Error **err= p) } } =20 -static PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus) -{ - PIIX3State *piix3; - PCIDevice *pci_dev; - - /* - * Xen supports additional interrupt routes from the PCI devices to - * the IOAPIC: the four pins of each PCI device on the bus are also - * connected to the IOAPIC directly. - * These additional routes can be discovered through ACPI. - */ - if (xen_enabled()) { - pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, - TYPE_PIIX3_XEN_DEVICE); - piix3 =3D PIIX3_PCI_DEVICE(pci_dev); - pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq, - piix3, XEN_PIIX_NUM_PIRQS); - } else { - pci_dev =3D pci_create_simple_multifunction(pci_bus, -1, true, - TYPE_PIIX3_DEVICE); - piix3 =3D PIIX3_PCI_DEVICE(pci_dev); - pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq, - piix3, PIIX_NUM_PIRQS); - pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq); - } - *isa_bus =3D ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); - - return piix3; -} - PCIBus *i440fx_init(const char *host_type, const char *pci_type, PCII440FXState **pi440fx_state, int *piix3_devfn, @@ -455,312 +362,6 @@ PCIBus *find_i440fx(void) return s ? s->bus : NULL; } =20 -/* PIIX3 PCI to ISA bridge */ -static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq) -{ - qemu_set_irq(piix3->pic[pic_irq], - !!(piix3->pic_levels & - (((1ULL << PIIX_NUM_PIRQS) - 1) << - (pic_irq * PIIX_NUM_PIRQS)))); -} - -static void piix3_set_irq_level_internal(PIIX3State *piix3, int pirq, int = level) -{ - int pic_irq; - uint64_t mask; - - pic_irq =3D piix3->dev.config[PIIX_PIRQCA + pirq]; - if (pic_irq >=3D PIIX_NUM_PIC_IRQS) { - return; - } - - mask =3D 1ULL << ((pic_irq * PIIX_NUM_PIRQS) + pirq); - piix3->pic_levels &=3D ~mask; - piix3->pic_levels |=3D mask * !!level; -} - -static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level) -{ - int pic_irq; - - pic_irq =3D piix3->dev.config[PIIX_PIRQCA + pirq]; - if (pic_irq >=3D PIIX_NUM_PIC_IRQS) { - return; - } - - piix3_set_irq_level_internal(piix3, pirq, level); - - piix3_set_irq_pic(piix3, pic_irq); -} - -static void piix3_set_irq(void *opaque, int pirq, int level) -{ - PIIX3State *piix3 =3D opaque; - piix3_set_irq_level(piix3, pirq, level); -} - -static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) -{ - PIIX3State *piix3 =3D opaque; - int irq =3D piix3->dev.config[PIIX_PIRQCA + pin]; - PCIINTxRoute route; - - if (irq < PIIX_NUM_PIC_IRQS) { - route.mode =3D PCI_INTX_ENABLED; - route.irq =3D irq; - } else { - route.mode =3D PCI_INTX_DISABLED; - route.irq =3D -1; - } - return route; -} - -/* irq routing is changed. so rebuild bitmap */ -static void piix3_update_irq_levels(PIIX3State *piix3) -{ - PCIBus *bus =3D pci_get_bus(&piix3->dev); - int pirq; - - piix3->pic_levels =3D 0; - for (pirq =3D 0; pirq < PIIX_NUM_PIRQS; pirq++) { - piix3_set_irq_level(piix3, pirq, pci_bus_get_irq_level(bus, pirq)); - } -} - -static void piix3_write_config(PCIDevice *dev, - uint32_t address, uint32_t val, int len) -{ - pci_default_write_config(dev, address, val, len); - if (ranges_overlap(address, len, PIIX_PIRQCA, 4)) { - PIIX3State *piix3 =3D PIIX3_PCI_DEVICE(dev); - int pic_irq; - - pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev)); - piix3_update_irq_levels(piix3); - for (pic_irq =3D 0; pic_irq < PIIX_NUM_PIC_IRQS; pic_irq++) { - piix3_set_irq_pic(piix3, pic_irq); - } - } -} - -static void piix3_write_config_xen(PCIDevice *dev, - uint32_t address, uint32_t val, int len) -{ - xen_piix_pci_write_config_client(address, val, len); - piix3_write_config(dev, address, val, len); -} - -static void piix3_reset(void *opaque) -{ - PIIX3State *d =3D opaque; - uint8_t *pci_conf =3D d->dev.config; - - pci_conf[0x04] =3D 0x07; /* master, memory and I/O */ - pci_conf[0x05] =3D 0x00; - pci_conf[0x06] =3D 0x00; - pci_conf[0x07] =3D 0x02; /* PCI_status_devsel_medium */ - pci_conf[0x4c] =3D 0x4d; - pci_conf[0x4e] =3D 0x03; - pci_conf[0x4f] =3D 0x00; - pci_conf[0x60] =3D 0x80; - pci_conf[0x61] =3D 0x80; - pci_conf[0x62] =3D 0x80; - pci_conf[0x63] =3D 0x80; - pci_conf[0x69] =3D 0x02; - pci_conf[0x70] =3D 0x80; - pci_conf[0x76] =3D 0x0c; - pci_conf[0x77] =3D 0x0c; - pci_conf[0x78] =3D 0x02; - pci_conf[0x79] =3D 0x00; - pci_conf[0x80] =3D 0x00; - pci_conf[0x82] =3D 0x00; - pci_conf[0xa0] =3D 0x08; - pci_conf[0xa2] =3D 0x00; - pci_conf[0xa3] =3D 0x00; - pci_conf[0xa4] =3D 0x00; - pci_conf[0xa5] =3D 0x00; - pci_conf[0xa6] =3D 0x00; - pci_conf[0xa7] =3D 0x00; - pci_conf[0xa8] =3D 0x0f; - pci_conf[0xaa] =3D 0x00; - pci_conf[0xab] =3D 0x00; - pci_conf[0xac] =3D 0x00; - pci_conf[0xae] =3D 0x00; - - d->pic_levels =3D 0; - d->rcr =3D 0; -} - -static int piix3_post_load(void *opaque, int version_id) -{ - PIIX3State *piix3 =3D opaque; - int pirq; - - /* Because the i8259 has not been deserialized yet, qemu_irq_raise - * might bring the system to a different state than the saved one; - * for example, the interrupt could be masked but the i8259 would - * not know that yet and would trigger an interrupt in the CPU. - * - * Here, we update irq levels without raising the interrupt. - * Interrupt state will be deserialized separately through the i8259. - */ - piix3->pic_levels =3D 0; - for (pirq =3D 0; pirq < PIIX_NUM_PIRQS; pirq++) { - piix3_set_irq_level_internal(piix3, pirq, - pci_bus_get_irq_level(pci_get_bus(&piix3->dev), pirq)); - } - return 0; -} - -static int piix3_pre_save(void *opaque) -{ - int i; - PIIX3State *piix3 =3D opaque; - - for (i =3D 0; i < ARRAY_SIZE(piix3->pci_irq_levels_vmstate); i++) { - piix3->pci_irq_levels_vmstate[i] =3D - pci_bus_get_irq_level(pci_get_bus(&piix3->dev), i); - } - - return 0; -} - -static bool piix3_rcr_needed(void *opaque) -{ - PIIX3State *piix3 =3D opaque; - - return (piix3->rcr !=3D 0); -} - -static const VMStateDescription vmstate_piix3_rcr =3D { - .name =3D "PIIX3/rcr", - .version_id =3D 1, - .minimum_version_id =3D 1, - .needed =3D piix3_rcr_needed, - .fields =3D (VMStateField[]) { - VMSTATE_UINT8(rcr, PIIX3State), - VMSTATE_END_OF_LIST() - } -}; - -static const VMStateDescription vmstate_piix3 =3D { - .name =3D "PIIX3", - .version_id =3D 3, - .minimum_version_id =3D 2, - .post_load =3D piix3_post_load, - .pre_save =3D piix3_pre_save, - .fields =3D (VMStateField[]) { - VMSTATE_PCI_DEVICE(dev, PIIX3State), - VMSTATE_INT32_ARRAY_V(pci_irq_levels_vmstate, PIIX3State, - PIIX_NUM_PIRQS, 3), - VMSTATE_END_OF_LIST() - }, - .subsections =3D (const VMStateDescription*[]) { - &vmstate_piix3_rcr, - NULL - } -}; - - -static void rcr_write(void *opaque, hwaddr addr, uint64_t val, unsigned le= n) -{ - PIIX3State *d =3D opaque; - - if (val & 4) { - qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); - return; - } - d->rcr =3D val & 2; /* keep System Reset type only */ -} - -static uint64_t rcr_read(void *opaque, hwaddr addr, unsigned len) -{ - PIIX3State *d =3D opaque; - - return d->rcr; -} - -static const MemoryRegionOps rcr_ops =3D { - .read =3D rcr_read, - .write =3D rcr_write, - .endianness =3D DEVICE_LITTLE_ENDIAN -}; - -static void piix3_realize(PCIDevice *dev, Error **errp) -{ - PIIX3State *d =3D PIIX3_PCI_DEVICE(dev); - - if (!isa_bus_new(DEVICE(d), get_system_memory(), - pci_address_space_io(dev), errp)) { - return; - } - - memory_region_init_io(&d->rcr_mem, OBJECT(dev), &rcr_ops, d, - "piix3-reset-control", 1); - memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOP= ORT, - &d->rcr_mem, 1); - - qemu_register_reset(piix3_reset, d); -} - -static void pci_piix3_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc =3D DEVICE_CLASS(klass); - PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); - - dc->desc =3D "ISA bridge"; - dc->vmsd =3D &vmstate_piix3; - dc->hotpluggable =3D false; - k->realize =3D piix3_realize; - k->vendor_id =3D PCI_VENDOR_ID_INTEL; - /* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */ - k->device_id =3D PCI_DEVICE_ID_INTEL_82371SB_0; - k->class_id =3D PCI_CLASS_BRIDGE_ISA; - /* - * Reason: part of PIIX3 southbridge, needs to be wired up by - * pc_piix.c's pc_init1() - */ - dc->user_creatable =3D false; -} - -static const TypeInfo piix3_pci_type_info =3D { - .name =3D TYPE_PIIX3_PCI_DEVICE, - .parent =3D TYPE_PCI_DEVICE, - .instance_size =3D sizeof(PIIX3State), - .abstract =3D true, - .class_init =3D pci_piix3_class_init, - .interfaces =3D (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { }, - }, -}; - -static void piix3_class_init(ObjectClass *klass, void *data) -{ - PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); - - k->config_write =3D piix3_write_config; -} - -static const TypeInfo piix3_info =3D { - .name =3D TYPE_PIIX3_DEVICE, - .parent =3D TYPE_PIIX3_PCI_DEVICE, - .class_init =3D piix3_class_init, -}; - -static void piix3_xen_class_init(ObjectClass *klass, void *data) -{ - PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); - - k->config_write =3D piix3_write_config_xen; -}; - -static const TypeInfo piix3_xen_info =3D { - .name =3D TYPE_PIIX3_XEN_DEVICE, - .parent =3D TYPE_PIIX3_PCI_DEVICE, - .class_init =3D piix3_xen_class_init, -}; - static void i440fx_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -922,9 +523,6 @@ static void i440fx_register_types(void) { type_register_static(&i440fx_info); type_register_static(&igd_passthrough_i440fx_info); - type_register_static(&piix3_pci_type_info); - type_register_static(&piix3_info); - type_register_static(&piix3_xen_info); type_register_static(&i440fx_pcihost_info); } =20 diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 9c92c37a4d..324a3a99fc 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -12,6 +12,8 @@ #ifndef HW_SOUTHBRIDGE_PIIX_H #define HW_SOUTHBRIDGE_PIIX_H =20 +#include "hw/pci/pci.h" + #define TYPE_PIIX4_PM "PIIX4_PM" =20 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, @@ -30,8 +32,42 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t s= mb_io_base, */ #define RCR_IOPORT 0xcf9 =20 +#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ +#define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ + +typedef struct PIIXState { + PCIDevice dev; + + /* + * bitmap to track pic levels. + * The pic level is the logical OR of all the PCI irqs mapped to it + * So one PIC level is tracked by PIIX_NUM_PIRQS bits. + * + * PIRQ is mapped to PIC pins, we track it by + * PIIX_NUM_PIRQS * PIIX_NUM_PIC_IRQS =3D 64 bits with + * pic_irq * PIIX_NUM_PIRQS + pirq + */ +#if PIIX_NUM_PIC_IRQS * PIIX_NUM_PIRQS > 64 +#error "unable to encode pic state in 64bit in pic_levels." +#endif + uint64_t pic_levels; + + qemu_irq *pic; + + /* This member isn't used. Just for save/load compatibility */ + int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS]; + + /* Reset Control Register contents */ + uint8_t rcr; + + /* IO memory region for Reset Control Register (RCR_IOPORT) */ + MemoryRegion rcr_mem; +} PIIX3State; + extern PCIDevice *piix4_dev; =20 +PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus); + DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus, size_t ide_buses); =20 --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571157272; cv=none; d=zoho.com; s=zohoarc; b=OimM3Od+VqBXaPLS0uUWciXhdfogc3D054JYI7kZJ/DAXTfT7EsfGmN4HW3yqxsTGsdsGNAgFzoJOPrc5zI44pO2YDgG0yoooMFPDLOXM/UFoXLv4f7OzdfaY5/VV5tLT0n5vVKmHwsdDBLnuVLN1CSvy3/jqrcglS03cC5Yb8w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571157272; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=tOnBy653RzBC+iVdmzpJa2FkHHrQPaOu/iXIbYf3PCI=; b=EKwmhbvdMVdObIy8YYmiFWL7wKFjytycycsEBrXShwZBS6tevv3CKZFEwt8Q2cKRfvVedLKoArfKvKx8fYroPdCPlMlXjwRPF1V/7h/BKMr2WFonGE+yieoDqBZpoGbp639RFYpLATwLM6ojh8eu7DT793bEozRRDnsogqFsJiE= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1571157272003494.2669249756822; Tue, 15 Oct 2019 09:34:32 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPlJ-0006MS-5W; Tue, 15 Oct 2019 16:33:29 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iKPlI-0006M1-BN for xen-devel@lists.xenproject.org; Tue, 15 Oct 2019 16:33:28 +0000 Received: from mx1.redhat.com (unknown [209.132.183.28]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id 83fb29fe-ef69-11e9-bbab-bc764e2007e4; Tue, 15 Oct 2019 16:33:27 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 61EB97BDA9; Tue, 15 Oct 2019 16:33:27 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id F265B4100; Tue, 15 Oct 2019 16:33:15 +0000 (UTC) X-Inumbo-ID: 83fb29fe-ef69-11e9-bbab-bc764e2007e4 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:27:04 +0200 Message-Id: <20191015162705.28087-32-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Tue, 15 Oct 2019 16:33:27 +0000 (UTC) Subject: [Xen-devel] [PATCH 31/32] hw/pci-host: Rename incorrectly named 'piix' as 'i440fx' X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" From: Philippe Mathieu-Daud=C3=A9 We moved all the PIIX3 southbridge code out of hw/pci-host/piix.c, it now only contains i440FX northbridge code. Rename it to match the chipset modelled. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- MAINTAINERS | 2 +- hw/i386/Kconfig | 2 +- hw/pci-host/Kconfig | 2 +- hw/pci-host/Makefile.objs | 2 +- hw/pci-host/{piix.c =3D> i440fx.c} | 0 5 files changed, 4 insertions(+), 4 deletions(-) rename hw/pci-host/{piix.c =3D> i440fx.c} (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 4845f47d93..1bc9959b8a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1225,7 +1225,7 @@ M: Marcel Apfelbaum S: Supported F: include/hw/i386/ F: hw/i386/ -F: hw/pci-host/piix.c +F: hw/pci-host/i440fx.c F: hw/pci-host/q35.c F: hw/pci-host/pam.c F: include/hw/pci-host/i440fx.h diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index 589d75e26a..cfe94aede7 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -60,7 +60,7 @@ config I440FX select PC_PCI select PC_ACPI select ACPI_SMBUS - select PCI_PIIX + select PCI_I440FX select PIIX3 select IDE_PIIX select DIMM diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig index 397043b289..b0aa8351c4 100644 --- a/hw/pci-host/Kconfig +++ b/hw/pci-host/Kconfig @@ -28,7 +28,7 @@ config PCI_SABRE select PCI bool =20 -config PCI_PIIX +config PCI_I440FX bool select PCI select PAM diff --git a/hw/pci-host/Makefile.objs b/hw/pci-host/Makefile.objs index a9cd3e022d..efd752b766 100644 --- a/hw/pci-host/Makefile.objs +++ b/hw/pci-host/Makefile.objs @@ -13,7 +13,7 @@ common-obj-$(CONFIG_VERSATILE_PCI) +=3D versatile.o =20 common-obj-$(CONFIG_PCI_SABRE) +=3D sabre.o common-obj-$(CONFIG_FULONG) +=3D bonito.o -common-obj-$(CONFIG_PCI_PIIX) +=3D piix.o +common-obj-$(CONFIG_PCI_I440FX) +=3D i440fx.o common-obj-$(CONFIG_PCI_EXPRESS_Q35) +=3D q35.o common-obj-$(CONFIG_PCI_EXPRESS_GENERIC_BRIDGE) +=3D gpex.o common-obj-$(CONFIG_PCI_EXPRESS_XILINX) +=3D xilinx-pcie.o diff --git a/hw/pci-host/piix.c b/hw/pci-host/i440fx.c similarity index 100% rename from hw/pci-host/piix.c rename to hw/pci-host/i440fx.c --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Sat Apr 27 16:57:51 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; 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Tue, 15 Oct 2019 16:33:33 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-35.brq.redhat.com [10.40.204.35]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D044319C5B; Tue, 15 Oct 2019 16:33:27 +0000 (UTC) X-Inumbo-ID: 87b7f70c-ef69-11e9-beca-bc764e2007e4 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 15 Oct 2019 18:27:05 +0200 Message-Id: <20191015162705.28087-33-philmd@redhat.com> In-Reply-To: <20191015162705.28087-1-philmd@redhat.com> References: <20191015162705.28087-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Tue, 15 Oct 2019 16:33:33 +0000 (UTC) Subject: [Xen-devel] [PATCH 32/32] hw/pci-host/i440fx: Remove the last PIIX3 traces X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Stefano Stabellini , Eduardo Habkost , kvm@vger.kernel.org, Paul Durrant , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Markovic , xen-devel@lists.xenproject.org, Anthony Perard , Igor Mammedov , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The PIIX3 is not tied to the i440FX and can even be used without it. Move its creation to the machine code (pc_piix.c). We have now removed the last trace of southbridge code in the i440FX northbridge. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/i386/pc_piix.c | 8 +++++++- hw/pci-host/i440fx.c | 8 -------- include/hw/pci-host/i440fx.h | 3 +-- 3 files changed, 8 insertions(+), 11 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 8ac4bf12ca..cb4f4fc94c 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -190,14 +190,20 @@ static void pc_init1(MachineState *machine, gsi_state =3D pc_gsi_create(&pcms->gsi, pcmc->pci_enabled); =20 if (pcmc->pci_enabled) { + PIIX3State *piix3; + pci_bus =3D i440fx_init(host_type, pci_type, - &i440fx_state, &piix3_devfn, &isa_bus, pcms-= >gsi, + &i440fx_state, system_memory, system_io, machine->ram_size, pcms->below_4g_mem_size, pcms->above_4g_mem_size, pci_memory, ram_memory); pcms->bus =3D pci_bus; + + piix3 =3D piix3_create(pci_bus, &isa_bus); + piix3->pic =3D pcms->gsi; + piix3_devfn =3D piix3->dev.devfn; } else { pci_bus =3D NULL; i440fx_state =3D NULL; diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 79ecd58a2b..f27131102d 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -27,7 +27,6 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/pci-host/i440fx.h" -#include "hw/southbridge/piix.h" #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "qapi/error.h" @@ -272,8 +271,6 @@ static void i440fx_realize(PCIDevice *dev, Error **errp) =20 PCIBus *i440fx_init(const char *host_type, const char *pci_type, PCII440FXState **pi440fx_state, - int *piix3_devfn, - ISABus **isa_bus, qemu_irq *pic, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, ram_addr_t ram_size, @@ -286,7 +283,6 @@ PCIBus *i440fx_init(const char *host_type, const char *= pci_type, PCIBus *b; PCIDevice *d; PCIHostState *s; - PIIX3State *piix3; PCII440FXState *f; unsigned i; I440FXState *i440fx; @@ -339,10 +335,6 @@ PCIBus *i440fx_init(const char *host_type, const char = *pci_type, PAM_EXPAN_SIZE); } =20 - piix3 =3D piix3_create(b, isa_bus); - piix3->pic =3D pic; - *piix3_devfn =3D piix3->dev.devfn; - ram_size =3D ram_size / 8 / 1024 / 1024; if (ram_size > 255) { ram_size =3D 255; diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index e327f9bf87..f54e6466e4 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -22,8 +22,7 @@ typedef struct PCII440FXState PCII440FXState; #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" =20 PCIBus *i440fx_init(const char *host_type, const char *pci_type, - PCII440FXState **pi440fx_state, int *piix_devfn, - ISABus **isa_bus, qemu_irq *pic, + PCII440FXState **pi440fx_state, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, ram_addr_t ram_size, --=20 2.21.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel