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x-conformance=sidf_compatible IronPort-SDR: wrQomBz/zHLFiiS7yWU5fdNAcYQhXSOKyFc1JwAer1Y0x/Cudn81VwNghOURdnj2jQGcbstH2Q GesNS7O97yMlxIGRL+nRjs4exnBRQmvB+zJeE796G+yJ6ktHcN3LthSpYqUQYPRVbOH+bostkd Q9zTgPJxsKiDr+AV5Tt9KOjb2Kce91MQOAYoA4YPZvtUjfwHFNLRX0Zwiupnt2lmYfKQcOuqdD tuaoEs6+f51kOLNqeENDoBmRTIZVSbe+k2Vsi82Hrwhvy+Rxg3VXP3rMBCFA3wWzjcszbffzzt wtU= X-SBRS: 2.7 X-MesageID: 7316156 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.67,300,1566878400"; d="scan'208";a="7316156" From: Roger Pau Monne To: Date: Tue, 15 Oct 2019 17:47:33 +0200 Message-ID: <20191015154736.19882-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191015154736.19882-1-roger.pau@citrix.com> References: <20191015154736.19882-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 1/4] iommu/amd: support all delivery modes with x2APIC X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Suravee Suthikulpanit , Roger Pau Monne Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Current AMD IOMMU code will attempt to create remapping entries for all IO-APIC pins, regardless of the delivery mode. AMD IOMMU implementation doesn't support remapping entries for IO-APIC pins with delivery mode set to SMI, MNI, INIT or ExtINT, instead those entries are not translated provided the right bits are set in the device table entry. This change checks whether the device table entry has the correct bits set in order to delivery the requested interrupt or a warning message is printed. It also translates the 32bit destination field into a physical or logical IO-APIC entry format. Note that if the 32bit destination cannot fit into the legacy format a message is printed and the entry is masked. Signed-off-by: Roger Pau Monn=C3=A9 --- My AMD hardware doesn't have any of such entries, hence I've only been able to compile test this change and assert it doesn't affect the functionality of other interrupt delivery modes. --- xen/drivers/passthrough/amd/iommu_intr.c | 81 ++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passthr= ough/amd/iommu_intr.c index fb71073c84..02dd3737c7 100644 --- a/xen/drivers/passthrough/amd/iommu_intr.c +++ b/xen/drivers/passthrough/amd/iommu_intr.c @@ -439,6 +439,80 @@ int __init amd_iommu_setup_ioapic_remapping(void) return 0; } =20 +void setup_forced_ioapic_rte(unsigned int apic, unsigned int pin, + struct amd_iommu *iommu, + struct IO_APIC_route_entry *rte) +{ + unsigned int idx =3D ioapic_id_to_index(IO_APIC_ID(apic)); + struct amd_iommu_dte *table =3D iommu->dev_table.buffer; + unsigned int req_id, dest, offset; + union irte_ptr entry; + + ASSERT(x2apic_enabled); + + if ( idx =3D=3D MAX_IO_APICS ) + { + rte->mask =3D true; + return; + } + + req_id =3D get_intremap_requestor_id(ioapic_sbdf[idx].seg, + ioapic_sbdf[idx].bdf); + + switch ( rte->delivery_mode ) + { + case dest_SMI: + break; + +#define DEL_CHECK(type, dte_field) \ + case dest_ ## type: \ + if ( !table[req_id].dte_field ) \ + printk(XENLOG_WARNING \ + STR(type) " on IO-APIC %u pin %u will be aborted\n", \ + apic, pin); \ + break; + + DEL_CHECK(NMI, nmi_pass); + DEL_CHECK(INIT, init_pass); + DEL_CHECK(ExtINT, ext_int_pass); +#undef DEL_CHECK + + default: + ASSERT_UNREACHABLE(); + return; + } + + offset =3D ioapic_sbdf[idx].pin_2_idx[pin]; + if ( offset >=3D INTREMAP_MAX_ENTRIES ) + { + rte->mask =3D true; + return; + } + + entry =3D get_intremap_entry(iommu, req_id, offset); + dest =3D get_full_dest(entry.ptr128); + +#define SET_DEST(name, dest_mask) { = \ + if ( dest & ~(dest_mask) ) = \ + { = \ + printk(XENLOG_WARNING = \ + "IO-APIC %u pin %u " STR(name) " destination (%x) > %x\n", = \ + apic, pin, dest, dest_mask); = \ + rte->mask =3D true; = \ + return; = \ + } = \ + rte->dest.name.name ## _dest =3D dest; = \ +} + + if ( rte->dest_mode ) + SET_DEST(physical, 0xf) + else + SET_DEST(logical, 0xff) +#undef SET_DEST + + return; +} + void amd_iommu_ioapic_update_ire( unsigned int apic, unsigned int reg, unsigned int value) { @@ -482,6 +556,13 @@ void amd_iommu_ioapic_update_ire( *((u32 *)&new_rte) =3D value; /* read upper 32 bits from io-apic rte */ *(((u32 *)&new_rte) + 1) =3D __io_apic_read(apic, reg + 1); + + if ( new_rte.delivery_mode > 1 && x2apic_enabled ) + { + setup_forced_ioapic_rte(apic, pin, iommu, &new_rte); + __ioapic_write_entry(apic, pin, true, new_rte); + return; + } } else { --=20 2.23.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Mon Feb 9 03:18:17 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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d="scan'208";a="7228589" From: Roger Pau Monne To: Date: Tue, 15 Oct 2019 17:47:34 +0200 Message-ID: <20191015154736.19882-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191015154736.19882-1-roger.pau@citrix.com> References: <20191015154736.19882-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 2/4] x2APIC: simplify resume X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Juergen Gross , Wei Liu , Andrew Cooper , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Jan Beulich , Roger Pau Monne Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) There's no need to save and restore the IO-APIC entries, the entries prior to suspension have already been saved by ioapic_suspend, and will be restored by ioapic_resume. Note that at the point where resume_x2apic gets called the IO-APIC has not yet resumed, and hence all entries should be masked. Note this shouldn't introduce any functional change. Suggested-by: Jan Beulich Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Jan Beulich Tested-by: Marek Marczykowski-G=C3=B3recki --- I'm Ccing Marek since I think he usually tests suspend/resume. Could you give this patch a try? --- Cc: Marek Marczykowski-G=C3=B3recki Cc: Juergen Gross --- Changes since v2: - New in this version. --- xen/arch/x86/apic.c | 27 --------------------------- 1 file changed, 27 deletions(-) diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c index 6cdb50cf41..0607eb92a8 100644 --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -492,35 +492,8 @@ static void __enable_x2apic(void) =20 static void resume_x2apic(void) { - struct IO_APIC_route_entry **ioapic_entries =3D NULL; - - ASSERT(x2apic_enabled); - - ioapic_entries =3D alloc_ioapic_entries(); - if ( !ioapic_entries ) - { - printk("Allocate ioapic_entries failed\n"); - goto out; - } - - if ( save_IO_APIC_setup(ioapic_entries) ) - { - printk("Saving IO-APIC state failed\n"); - goto out; - } - - mask_8259A(); - mask_IO_APIC_setup(ioapic_entries); - iommu_enable_x2apic(); __enable_x2apic(); - - restore_IO_APIC_setup(ioapic_entries); - unmask_8259A(); - -out: - if ( ioapic_entries ) - free_ioapic_entries(ioapic_entries); } =20 void setup_local_APIC(void) --=20 2.23.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Mon Feb 9 03:18:17 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1571154560; cv=none; d=zoho.com; s=zohoarc; b=Yqo5YgdnbhuRMqM3xXBVP1UPUxNfU5p7oh97RqHcZYZvbezHFklwedrvWLhRGxjNEizowofQXmsq730NZg6oBXNJ2rhMmEVITFzHQ+ZXWZ2hVAuTZP9OmYSl0e1jddjjmNZi7G/nHxwgOOeSppXEHaQHmhCGoXnr/wDs6bzqMlI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571154560; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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client-ip=162.221.158.21; receiver=esa1.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: iOVdaOWEO30ld/BGUP3GcdrScCIWfvyaZXUccTaYqrZ4yvoT2Rhi0eNjxvngYH5chpMzkQx09K 6dWxNru401NJ0TnSTFaeyB1Y9vsQs8RxQEBiJ+ktNzvi3RQ943fenv+lHOD+Xk6TQc6wexUyYM QS54TAVwaXZZbQZqdlBbo5OrUGu6NVbC23G+uXhypiSGHAkUgrtTvEB/DPx2Zeiptqn83m1guC h4IJ/0sqgwyYJBi7znezfCvZZheJgVKb1AMcsGqRgtAKgEvWdrVfZIbkh364iAq/8AwsB1PQwV DK8= X-SBRS: 2.7 X-MesageID: 6993382 X-Ironport-Server: esa1.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.67,300,1566878400"; d="scan'208";a="6993382" From: Roger Pau Monne To: Date: Tue, 15 Oct 2019 17:47:35 +0200 Message-ID: <20191015154736.19882-4-roger.pau@citrix.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191015154736.19882-1-roger.pau@citrix.com> References: <20191015154736.19882-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 3/4] x2APIC: translate IO-APIC entries when enabling the IOMMU X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Juergen Gross , Andrew Cooper , Wei Liu , Jan Beulich , Roger Pau Monne Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) When interrupt remapping is enabled as part of enabling x2APIC the IO-APIC entries also need to be translated to the new format and added to the interrupt remapping table. This prevents IOMMU interrupt remapping faults when booting on hardware that has unmasked IO-APIC pins. Reported-by: Andrew Cooper Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Jan Beulich --- Cc: Juergen Gross --- Changes since v2: - Introduce intremap_enabled. Changes since v1: - Remove the unneeded iommu_enabled local variable. --- xen/arch/x86/apic.c | 11 ++++++++++- xen/arch/x86/io_apic.c | 5 +++-- xen/include/asm-x86/io_apic.h | 3 ++- 3 files changed, 15 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c index 0607eb92a8..a5f7b05d5a 100644 --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -860,6 +860,7 @@ void __init x2apic_bsp_setup(void) { struct IO_APIC_route_entry **ioapic_entries =3D NULL; const char *orig_name; + bool intremap_enabled; =20 if ( !cpu_has_x2apic ) return; @@ -902,11 +903,13 @@ void __init x2apic_bsp_setup(void) switch ( iommu_enable_x2apic() ) { case 0: + intremap_enabled =3D true; break; case -ENXIO: /* ACPI_DMAR_X2APIC_OPT_OUT set */ if ( !x2apic_enabled ) { printk("Not enabling x2APIC (upon firmware request)\n"); + intremap_enabled =3D false; goto restore_out; } /* fall through */ @@ -917,6 +920,7 @@ void __init x2apic_bsp_setup(void) =20 printk(XENLOG_ERR "Failed to enable Interrupt Remapping: Will not enable x2AP= IC.\n"); + intremap_enabled =3D false; goto restore_out; } =20 @@ -934,7 +938,12 @@ void __init x2apic_bsp_setup(void) printk("Switched to APIC driver %s\n", genapic.name); =20 restore_out: - restore_IO_APIC_setup(ioapic_entries); + /* + * NB: do not use raw mode when restoring entries if the iommu has been + * enabled during the process, because the entries need to be translat= ed + * and added to the remapping table in that case. + */ + restore_IO_APIC_setup(ioapic_entries, !intremap_enabled); unmask_8259A(); =20 out: diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index 5d25862bd8..37eabc16c9 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -379,7 +379,8 @@ void mask_IO_APIC_setup(struct IO_APIC_route_entry **io= apic_entries) /* * Restore IO APIC entries which was saved in ioapic_entries. */ -int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) +int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries, + bool raw) { int apic, pin; =20 @@ -394,7 +395,7 @@ int restore_IO_APIC_setup(struct IO_APIC_route_entry **= ioapic_entries) return -ENOMEM; =20 for (pin =3D 0; pin < nr_ioapic_entries[apic]; pin++) - ioapic_write_entry(apic, pin, 1, ioapic_entries[apic][pin]); + ioapic_write_entry(apic, pin, raw, ioapic_entries[apic][pin]); } =20 return 0; diff --git a/xen/include/asm-x86/io_apic.h b/xen/include/asm-x86/io_apic.h index 0b041f0565..998905186b 100644 --- a/xen/include/asm-x86/io_apic.h +++ b/xen/include/asm-x86/io_apic.h @@ -197,7 +197,8 @@ extern struct IO_APIC_route_entry **alloc_ioapic_entrie= s(void); extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entrie= s); extern int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); extern void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries= ); -extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entri= es); +extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entri= es, + bool raw); =20 unsigned highest_gsi(void); =20 --=20 2.23.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Mon Feb 9 03:18:17 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1571154593; cv=none; d=zoho.com; s=zohoarc; b=E6VibewiXM+j9/NcGdvwe9ymKl1YVEWtkhUvoNrpaROuIkUM/ThosqKJ7LFk9NcJGf5jtWHarhs4b1u+k2juMcgqddLHGiewa9b+u+IjpSlGMveVFRMd/g781q6A7goxOsxEgLV8u29oacKTsDNiGHZmMpW0yC5pJDJjUMxo6Gg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571154593; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: None (esa3.hc3370-68.iphmx.com: no sender authenticity information available from domain of roger.pau@citrix.com) identity=pra; client-ip=162.221.158.21; receiver=esa3.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible Received-SPF: Pass (esa3.hc3370-68.iphmx.com: domain of roger.pau@citrix.com designates 162.221.158.21 as permitted sender) identity=mailfrom; client-ip=162.221.158.21; receiver=esa3.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="roger.pau@citrix.com"; x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 ip4:209.167.231.154 ip4:178.63.86.133 ip4:195.66.111.40/30 ip4:85.115.9.32/28 ip4:199.102.83.4 ip4:192.28.146.160 ip4:192.28.146.107 ip4:216.52.6.88 ip4:216.52.6.188 ip4:162.221.158.21 ip4:162.221.156.83 ip4:168.245.78.127 ~all" Received-SPF: None (esa3.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa3.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: B1d/KzR7HyypMbhExyzkJ+dWJQirJpI+FWvIDOIJsflpdPasHqTz5nv9j2T+GXiMopm3H0/Pp9 74Yev6+UWUNRjjvrAmz0MwPB9MNSx1GfZ1YxI1pL+T4x+Kl0h5RdGOLuuujI+tUSf4byFiXBGd Mai+pBt3dv1ZEjlrh2qHHwNEqXPxpdDOKd6MSmrDpTmzY1WxE8j/2aEQ2iNRVys+sHqkDeZGDX F4ZraO4j54RWNpTWi7ds9wo2ZV3q7chL65j3xBu9R6bbsUbO/r4KjTxNavJ5gJ8Icy7mkWsa/D bs4= X-SBRS: 2.7 X-MesageID: 6908623 X-Ironport-Server: esa3.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.67,300,1566878400"; d="scan'208";a="6908623" From: Roger Pau Monne To: Date: Tue, 15 Oct 2019 17:47:36 +0200 Message-ID: <20191015154736.19882-5-roger.pau@citrix.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191015154736.19882-1-roger.pau@citrix.com> References: <20191015154736.19882-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v3 4/4] iommu: translate IO-APIC pins when enabling interrupt remapping X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Juergen Gross , Suravee Suthikulpanit , Wei Liu , Andrew Cooper , Jan Beulich , Roger Pau Monne Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) On Intel hardware there's currently no translation of already enabled IO-APIC pins when interrupt remapping is enabled on the IOMMU, hence introduce a logic similar to the one used in x2apic_bsp_setup in order to save and mask all IO-APIC pins, and then translate and restore them after interrupt remapping has been enabled. With this change the AMD specific logic to deal with enabled pins (amd_iommu_setup_ioapic_remapping) can be removed, thus unifying the handling of IO-APIC when enabling interrupt remapping regardless of the IOMMU vendor. Reported-by: Andrew Cooper Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Jan Beulich --- Cc: Juergen Gross --- xen/drivers/passthrough/amd/iommu_init.c | 11 ++- xen/drivers/passthrough/amd/iommu_intr.c | 90 +------------------ xen/drivers/passthrough/x86/iommu.c | 34 ++++++- xen/include/asm-x86/hvm/svm/amd-iommu-proto.h | 1 + 4 files changed, 40 insertions(+), 96 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthr= ough/amd/iommu_init.c index 6f53c7ec08..3c244619b9 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -19,6 +19,7 @@ =20 #include #include +#include #include #include #include @@ -1435,12 +1436,6 @@ int __init amd_iommu_init(bool xt) if ( rc ) goto error_out; =20 - /* initialize io-apic interrupt remapping entries */ - if ( iommu_intremap ) - rc =3D amd_iommu_setup_ioapic_remapping(); - if ( rc ) - goto error_out; - /* Allocate and initialize device table(s). */ pci_init =3D !xt; rc =3D iterate_ivrs_mappings(amd_iommu_setup_device_table); @@ -1469,6 +1464,10 @@ int __init amd_iommu_init(bool xt) goto error_out; } =20 + if ( iommu_intremap ) + register_keyhandler('V', &amd_iommu_dump_intremap_tables, + "dump IOMMU intremap tables", 0); + return 0; =20 error_out: diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passthr= ough/amd/iommu_intr.c index 02dd3737c7..22e8c2391c 100644 --- a/xen/drivers/passthrough/amd/iommu_intr.c +++ b/xen/drivers/passthrough/amd/iommu_intr.c @@ -21,7 +21,6 @@ #include #include #include -#include #include =20 union irte32 { @@ -79,8 +78,6 @@ unsigned long *shared_intremap_inuse; static DEFINE_SPINLOCK(shared_intremap_lock); unsigned int nr_ioapic_sbdf; =20 -static void dump_intremap_tables(unsigned char key); - #define intremap_page_order(irt) PFN_ORDER(virt_to_page(irt)) =20 unsigned int amd_iommu_intremap_table_order( @@ -354,91 +351,6 @@ static int update_intremap_entry_from_ioapic( return 0; } =20 -int __init amd_iommu_setup_ioapic_remapping(void) -{ - struct IO_APIC_route_entry rte; - unsigned long flags; - union irte_ptr entry; - int apic, pin; - u8 delivery_mode, dest, vector, dest_mode; - u16 seg, bdf, req_id; - struct amd_iommu *iommu; - spinlock_t *lock; - unsigned int offset; - - /* Read ioapic entries and update interrupt remapping table accordingl= y */ - for ( apic =3D 0; apic < nr_ioapics; apic++ ) - { - for ( pin =3D 0; pin < nr_ioapic_entries[apic]; pin++ ) - { - unsigned int idx; - - rte =3D __ioapic_read_entry(apic, pin, 1); - if ( rte.mask =3D=3D 1 ) - continue; - - /* get device id of ioapic devices */ - idx =3D ioapic_id_to_index(IO_APIC_ID(apic)); - if ( idx =3D=3D MAX_IO_APICS ) - return -EINVAL; - - bdf =3D ioapic_sbdf[idx].bdf; - seg =3D ioapic_sbdf[idx].seg; - iommu =3D find_iommu_for_device(seg, bdf); - if ( !iommu ) - { - AMD_IOMMU_DEBUG("Fail to find iommu for ioapic " - "device id =3D %04x:%04x\n", seg, bdf); - continue; - } - - req_id =3D get_intremap_requestor_id(iommu->seg, bdf); - lock =3D get_intremap_lock(iommu->seg, req_id); - - delivery_mode =3D rte.delivery_mode; - vector =3D rte.vector; - dest_mode =3D rte.dest_mode; - dest =3D rte.dest.logical.logical_dest; - - if ( iommu->ctrl.xt_en ) - { - /* - * In x2APIC mode we have no way of discovering the high 24 - * bits of the destination of an already enabled interrupt. - * We come here earlier than for xAPIC mode, so no interru= pts - * should have been set up before. - */ - AMD_IOMMU_DEBUG("Unmasked IO-APIC#%u entry %u in x2APIC mo= de\n", - IO_APIC_ID(apic), pin); - } - - spin_lock_irqsave(lock, flags); - offset =3D alloc_intremap_entry(iommu, req_id, 1); - BUG_ON(offset >=3D INTREMAP_MAX_ENTRIES); - entry =3D get_intremap_entry(iommu, req_id, offset); - update_intremap_entry(iommu, entry, vector, - delivery_mode, dest_mode, dest); - spin_unlock_irqrestore(lock, flags); - - set_rte_index(&rte, offset); - ioapic_sbdf[idx].pin_2_idx[pin] =3D offset; - __ioapic_write_entry(apic, pin, 1, rte); - - if ( iommu->enabled ) - { - spin_lock_irqsave(&iommu->lock, flags); - amd_iommu_flush_intremap(iommu, req_id); - spin_unlock_irqrestore(&iommu->lock, flags); - } - } - } - - register_keyhandler('V', &dump_intremap_tables, - "dump IOMMU intremap tables", 0); - - return 0; -} - void setup_forced_ioapic_rte(unsigned int apic, unsigned int pin, struct amd_iommu *iommu, struct IO_APIC_route_entry *rte) @@ -1063,7 +975,7 @@ static int dump_intremap_mapping(const struct amd_iomm= u *iommu, return 0; } =20 -static void dump_intremap_tables(unsigned char key) +void amd_iommu_dump_intremap_tables(unsigned char key) { if ( !shared_intremap_table ) { diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/= x86/iommu.c index 59905629e1..2cf528e760 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -21,6 +21,7 @@ #include =20 #include +#include #include =20 const struct iommu_init_ops *__initdata iommu_init_ops; @@ -28,6 +29,7 @@ struct iommu_ops __read_mostly iommu_ops; =20 int __init iommu_hardware_setup(void) { + struct IO_APIC_route_entry **ioapic_entries =3D NULL; int rc; =20 if ( !iommu_init_ops ) @@ -43,7 +45,37 @@ int __init iommu_hardware_setup(void) /* x2apic setup may have previously initialised the struct. */ ASSERT(iommu_ops.init =3D=3D iommu_init_ops->ops->init); =20 - return iommu_init_ops->setup(); + if ( !x2apic_enabled && iommu_intremap ) + { + /* + * If x2APIC is enabled interrupt remapping is already enabled, so + * there's no need to mess with the IO-APIC because the remapping + * entries are already correctly setup by x2apic_bsp_setup. + */ + ioapic_entries =3D alloc_ioapic_entries(); + if ( !ioapic_entries ) + return -ENOMEM; + rc =3D save_IO_APIC_setup(ioapic_entries); + if ( rc ) + { + free_ioapic_entries(ioapic_entries); + return rc; + } + + mask_8259A(); + mask_IO_APIC_setup(ioapic_entries); + } + + rc =3D iommu_init_ops->setup(); + + if ( ioapic_entries ) + { + restore_IO_APIC_setup(ioapic_entries, rc); + unmask_8259A(); + free_ioapic_entries(ioapic_entries); + } + + return rc; } =20 int iommu_enable_x2apic(void) diff --git a/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h b/xen/include/as= m-x86/hvm/svm/amd-iommu-proto.h index 07d25a585d..8ed9482791 100644 --- a/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h +++ b/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h @@ -114,6 +114,7 @@ int amd_iommu_msi_msg_update_ire( void amd_iommu_read_msi_from_ire( struct msi_desc *msi_desc, struct msi_msg *msg); int amd_setup_hpet_msi(struct msi_desc *msi_desc); +void amd_iommu_dump_intremap_tables(unsigned char key); =20 extern struct ioapic_sbdf { u16 bdf, seg; --=20 2.23.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel