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x-conformance=sidf_compatible IronPort-SDR: QYeFOWS/e/e++5DDAOpgvp9yoYvBMHr9LNKBokR3qnJa5QAn9e7smNdNmwguBSVxXhAxbN6wAt vy7YvaJRj0zdW81Ko+M9OjKaV2PCmckCGrNM/IavsARbBGYFoCiNwv5bQCpLj9eSK0xY5vuZfV 5H/9zdOOqtWlkUJ5PGw6BlE2Kr1iGPEM91uTRnVV5nOEidspJ4JiaCZ8a6LoghL9SDE+XXFCs6 NOkzidTsG7aTa5UThHvvvXYl0fkGnIOo/ccUTCvN0Q4Fhmd1zdireDFltlqNhvh+GZA9ETFgh4 Mh8= X-SBRS: 2.7 X-MesageID: 6973869 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.67,280,1566878400"; d="scan'208";a="6973869" From: Roger Pau Monne To: Date: Thu, 10 Oct 2019 13:33:44 +0200 Message-ID: <20191010113345.6867-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191010113345.6867-1-roger.pau@citrix.com> References: <20191010113345.6867-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v2 1/2] x2APIC: translate IO-APIC entries when enabling the IOMMU X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Juergen Gross , Andrew Cooper , Wei Liu , Jan Beulich , Roger Pau Monne Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) When interrupt remapping is enabled as part of enabling x2APIC the IO-APIC entries also need to be translated to the new format and added to the interrupt remapping table. This prevents IOMMU interrupt remapping faults when booting on hardware that has unmasked IO-APIC pins. Reported-by: Andrew Cooper Signed-off-by: Roger Pau Monn=C3=A9 --- Cc: Juergen Gross --- Changes since v1: - Remove the unneeded iommu_enabled local variable. --- xen/arch/x86/apic.c | 9 +++++++-- xen/arch/x86/io_apic.c | 5 +++-- xen/include/asm-x86/io_apic.h | 3 ++- 3 files changed, 12 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c index 6cdb50cf41..8415d9f787 100644 --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -515,7 +515,7 @@ static void resume_x2apic(void) iommu_enable_x2apic(); __enable_x2apic(); =20 - restore_IO_APIC_setup(ioapic_entries); + restore_IO_APIC_setup(ioapic_entries, true); unmask_8259A(); =20 out: @@ -961,7 +961,12 @@ void __init x2apic_bsp_setup(void) printk("Switched to APIC driver %s\n", genapic.name); =20 restore_out: - restore_IO_APIC_setup(ioapic_entries); + /* + * NB: do not use raw mode when restoring entries if the iommu has been + * enabled during the process, because the entries need to be translat= ed + * and added to the remapping table in that case. + */ + restore_IO_APIC_setup(ioapic_entries, !x2apic_enabled); unmask_8259A(); =20 out: diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index 5d25862bd8..37eabc16c9 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -379,7 +379,8 @@ void mask_IO_APIC_setup(struct IO_APIC_route_entry **io= apic_entries) /* * Restore IO APIC entries which was saved in ioapic_entries. */ -int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries) +int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries, + bool raw) { int apic, pin; =20 @@ -394,7 +395,7 @@ int restore_IO_APIC_setup(struct IO_APIC_route_entry **= ioapic_entries) return -ENOMEM; =20 for (pin =3D 0; pin < nr_ioapic_entries[apic]; pin++) - ioapic_write_entry(apic, pin, 1, ioapic_entries[apic][pin]); + ioapic_write_entry(apic, pin, raw, ioapic_entries[apic][pin]); } =20 return 0; diff --git a/xen/include/asm-x86/io_apic.h b/xen/include/asm-x86/io_apic.h index 0b041f0565..998905186b 100644 --- a/xen/include/asm-x86/io_apic.h +++ b/xen/include/asm-x86/io_apic.h @@ -197,7 +197,8 @@ extern struct IO_APIC_route_entry **alloc_ioapic_entrie= s(void); extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entrie= s); extern int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries); extern void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries= ); -extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entri= es); +extern int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entri= es, + bool raw); =20 unsigned highest_gsi(void); =20 --=20 2.23.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel From nobody Fri Apr 19 00:41:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1570707337; cv=none; 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x-conformance=sidf_compatible; x-record-type="v=spf1"; x-record-text="v=spf1 ip4:209.167.231.154 ip4:178.63.86.133 ip4:195.66.111.40/30 ip4:85.115.9.32/28 ip4:199.102.83.4 ip4:192.28.146.160 ip4:192.28.146.107 ip4:216.52.6.88 ip4:216.52.6.188 ip4:162.221.158.21 ip4:162.221.156.83 ip4:168.245.78.127 ~all" Received-SPF: None (esa3.hc3370-68.iphmx.com: no sender authenticity information available from domain of postmaster@mail.citrix.com) identity=helo; client-ip=162.221.158.21; receiver=esa3.hc3370-68.iphmx.com; envelope-from="roger.pau@citrix.com"; x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: WSBXiwoDfoZ0EYVLC6mPMbq8xO2PlionKUv57DbfifhUy1ByA3yTvSAv/Y35ONS7bLW9onmSPb dndrWDe2JBcRbM1c+8UkdPXr5EUfD7qgz8VVdNESF+CaXiQNHJ2YhVCzcmB2TzOaw7ZClAX3Sz IaglbiAEbyQNlNnIB46f1xVmbDkWYv8PU07c7IDtkWQNip3qzh12YcbUlXtVU4SOwM4PSVnk1j K5bHZujt+nqgoVl6s8LaeLKt+tovo86xaGEu0JCtDL/5oBKAl2SL3WrYonkEyAs9CgkoFlfGui IWg= X-SBRS: 2.7 X-MesageID: 6709785 X-Ironport-Server: esa3.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.67,280,1566878400"; d="scan'208";a="6709785" From: Roger Pau Monne To: Date: Thu, 10 Oct 2019 13:33:45 +0200 Message-ID: <20191010113345.6867-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191010113345.6867-1-roger.pau@citrix.com> References: <20191010113345.6867-1-roger.pau@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v2 2/2] iommu: translate IO-APIC pins when enabling interrupt remapping X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Juergen Gross , Suravee Suthikulpanit , Wei Liu , Andrew Cooper , Jan Beulich , Roger Pau Monne Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) On Intel hardware there's currently no translation of already enabled IO-APIC pins when interrupt remapping is enabled on the IOMMU, hence introduce a logic similar to the one used in x2apic_bsp_setup in order to save and mask all IO-APIC pins, and then translate and restore them after interrupt remapping has been enabled. With this change the AMD specific logic to deal with enabled pins (amd_iommu_setup_ioapic_remapping) can be removed, thus unifying the handling of IO-APIC when enabling interrupt remapping regardless of the IOMMU vendor. Reported-by: Andrew Cooper Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Jan Beulich --- Cc: Juergen Gross --- xen/drivers/passthrough/amd/iommu_init.c | 11 ++- xen/drivers/passthrough/amd/iommu_intr.c | 90 +------------------ xen/drivers/passthrough/x86/iommu.c | 34 ++++++- xen/include/asm-x86/hvm/svm/amd-iommu-proto.h | 1 + 4 files changed, 40 insertions(+), 96 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthr= ough/amd/iommu_init.c index 6f53c7ec08..3c244619b9 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -19,6 +19,7 @@ =20 #include #include +#include #include #include #include @@ -1435,12 +1436,6 @@ int __init amd_iommu_init(bool xt) if ( rc ) goto error_out; =20 - /* initialize io-apic interrupt remapping entries */ - if ( iommu_intremap ) - rc =3D amd_iommu_setup_ioapic_remapping(); - if ( rc ) - goto error_out; - /* Allocate and initialize device table(s). */ pci_init =3D !xt; rc =3D iterate_ivrs_mappings(amd_iommu_setup_device_table); @@ -1469,6 +1464,10 @@ int __init amd_iommu_init(bool xt) goto error_out; } =20 + if ( iommu_intremap ) + register_keyhandler('V', &amd_iommu_dump_intremap_tables, + "dump IOMMU intremap tables", 0); + return 0; =20 error_out: diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passthr= ough/amd/iommu_intr.c index fb71073c84..1eed60f265 100644 --- a/xen/drivers/passthrough/amd/iommu_intr.c +++ b/xen/drivers/passthrough/amd/iommu_intr.c @@ -21,7 +21,6 @@ #include #include #include -#include #include =20 union irte32 { @@ -79,8 +78,6 @@ unsigned long *shared_intremap_inuse; static DEFINE_SPINLOCK(shared_intremap_lock); unsigned int nr_ioapic_sbdf; =20 -static void dump_intremap_tables(unsigned char key); - #define intremap_page_order(irt) PFN_ORDER(virt_to_page(irt)) =20 unsigned int amd_iommu_intremap_table_order( @@ -354,91 +351,6 @@ static int update_intremap_entry_from_ioapic( return 0; } =20 -int __init amd_iommu_setup_ioapic_remapping(void) -{ - struct IO_APIC_route_entry rte; - unsigned long flags; - union irte_ptr entry; - int apic, pin; - u8 delivery_mode, dest, vector, dest_mode; - u16 seg, bdf, req_id; - struct amd_iommu *iommu; - spinlock_t *lock; - unsigned int offset; - - /* Read ioapic entries and update interrupt remapping table accordingl= y */ - for ( apic =3D 0; apic < nr_ioapics; apic++ ) - { - for ( pin =3D 0; pin < nr_ioapic_entries[apic]; pin++ ) - { - unsigned int idx; - - rte =3D __ioapic_read_entry(apic, pin, 1); - if ( rte.mask =3D=3D 1 ) - continue; - - /* get device id of ioapic devices */ - idx =3D ioapic_id_to_index(IO_APIC_ID(apic)); - if ( idx =3D=3D MAX_IO_APICS ) - return -EINVAL; - - bdf =3D ioapic_sbdf[idx].bdf; - seg =3D ioapic_sbdf[idx].seg; - iommu =3D find_iommu_for_device(seg, bdf); - if ( !iommu ) - { - AMD_IOMMU_DEBUG("Fail to find iommu for ioapic " - "device id =3D %04x:%04x\n", seg, bdf); - continue; - } - - req_id =3D get_intremap_requestor_id(iommu->seg, bdf); - lock =3D get_intremap_lock(iommu->seg, req_id); - - delivery_mode =3D rte.delivery_mode; - vector =3D rte.vector; - dest_mode =3D rte.dest_mode; - dest =3D rte.dest.logical.logical_dest; - - if ( iommu->ctrl.xt_en ) - { - /* - * In x2APIC mode we have no way of discovering the high 24 - * bits of the destination of an already enabled interrupt. - * We come here earlier than for xAPIC mode, so no interru= pts - * should have been set up before. - */ - AMD_IOMMU_DEBUG("Unmasked IO-APIC#%u entry %u in x2APIC mo= de\n", - IO_APIC_ID(apic), pin); - } - - spin_lock_irqsave(lock, flags); - offset =3D alloc_intremap_entry(iommu, req_id, 1); - BUG_ON(offset >=3D INTREMAP_MAX_ENTRIES); - entry =3D get_intremap_entry(iommu, req_id, offset); - update_intremap_entry(iommu, entry, vector, - delivery_mode, dest_mode, dest); - spin_unlock_irqrestore(lock, flags); - - set_rte_index(&rte, offset); - ioapic_sbdf[idx].pin_2_idx[pin] =3D offset; - __ioapic_write_entry(apic, pin, 1, rte); - - if ( iommu->enabled ) - { - spin_lock_irqsave(&iommu->lock, flags); - amd_iommu_flush_intremap(iommu, req_id); - spin_unlock_irqrestore(&iommu->lock, flags); - } - } - } - - register_keyhandler('V', &dump_intremap_tables, - "dump IOMMU intremap tables", 0); - - return 0; -} - void amd_iommu_ioapic_update_ire( unsigned int apic, unsigned int reg, unsigned int value) { @@ -982,7 +894,7 @@ static int dump_intremap_mapping(const struct amd_iommu= *iommu, return 0; } =20 -static void dump_intremap_tables(unsigned char key) +void amd_iommu_dump_intremap_tables(unsigned char key) { if ( !shared_intremap_table ) { diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/= x86/iommu.c index 59905629e1..2cf528e760 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -21,6 +21,7 @@ #include =20 #include +#include #include =20 const struct iommu_init_ops *__initdata iommu_init_ops; @@ -28,6 +29,7 @@ struct iommu_ops __read_mostly iommu_ops; =20 int __init iommu_hardware_setup(void) { + struct IO_APIC_route_entry **ioapic_entries =3D NULL; int rc; =20 if ( !iommu_init_ops ) @@ -43,7 +45,37 @@ int __init iommu_hardware_setup(void) /* x2apic setup may have previously initialised the struct. */ ASSERT(iommu_ops.init =3D=3D iommu_init_ops->ops->init); =20 - return iommu_init_ops->setup(); + if ( !x2apic_enabled && iommu_intremap ) + { + /* + * If x2APIC is enabled interrupt remapping is already enabled, so + * there's no need to mess with the IO-APIC because the remapping + * entries are already correctly setup by x2apic_bsp_setup. + */ + ioapic_entries =3D alloc_ioapic_entries(); + if ( !ioapic_entries ) + return -ENOMEM; + rc =3D save_IO_APIC_setup(ioapic_entries); + if ( rc ) + { + free_ioapic_entries(ioapic_entries); + return rc; + } + + mask_8259A(); + mask_IO_APIC_setup(ioapic_entries); + } + + rc =3D iommu_init_ops->setup(); + + if ( ioapic_entries ) + { + restore_IO_APIC_setup(ioapic_entries, rc); + unmask_8259A(); + free_ioapic_entries(ioapic_entries); + } + + return rc; } =20 int iommu_enable_x2apic(void) diff --git a/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h b/xen/include/as= m-x86/hvm/svm/amd-iommu-proto.h index 07d25a585d..8ed9482791 100644 --- a/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h +++ b/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h @@ -114,6 +114,7 @@ int amd_iommu_msi_msg_update_ire( void amd_iommu_read_msi_from_ire( struct msi_desc *msi_desc, struct msi_msg *msg); int amd_setup_hpet_msi(struct msi_desc *msi_desc); +void amd_iommu_dump_intremap_tables(unsigned char key); =20 extern struct ioapic_sbdf { u16 bdf, seg; --=20 2.23.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel