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x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: tTtRTWjvKDz+ZurNtGiF2SpOjkw4oN+wk4kaP0jemPOKQ8J3MdZ9Xm/8ZiyB7jKU84Tv0+uoBV 7iiPd0Q/6YVDJXLf7Yr5o7Konsueu2V/DmyHrvMPonfRc3+hsl81BR7KLoB/S9QXGCscHJ+F4o V2CXiKm9HkPWepyT1kRjdAON9zmazkuFnvk2G/97W8I/RzDQDwgrsw5OyNJwCbKi5rSU+160/U UPBvIU30oGDyQ7KWlWcOUQa6xl8Osv2UW4PfF305DsN7N7mwRUlac6qx04hnYJVrgVT+X7K5ka 4u4= X-SBRS: 2.7 X-MesageID: 5695040 X-Ironport-Server: esa6.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.64,494,1559534400"; d="scan'208";a="5695040" From: Andrew Cooper To: Xen-devel Date: Wed, 11 Sep 2019 21:04:58 +0100 Message-ID: <20190911200504.5693-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190911200504.5693-1-andrew.cooper3@citrix.com> References: <20190911200504.5693-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH 2/8] x86/cpuid: Split update_domain_cpuid_info() in half X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) update_domain_cpuid_info() currently serves two purposes. First to merge n= ew CPUID data from the toolstack, and second, to perform any necessary updating of derived domain/vcpu settings. The first part of this is going to be superseded by a new and substantially more efficient hypercall. Carve the second part out into a new domain_cpu_policy_changed() helper, and call this from the remains of update_domain_cpuid_info(). This does drop the call_policy_changed, but with the new hypercall hypercall in place, the common case will be a single call per domain. Dropping the optimisation here allows for a cleaner set of following changes. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Wei Liu CC: Roger Pau Monn=C3=A9 --- xen/arch/x86/domctl.c | 245 ++++++++++++++++++++--------------------------= ---- 1 file changed, 99 insertions(+), 146 deletions(-) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index a744696c6b..d15ae066c3 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -46,101 +46,14 @@ static int gdbsx_guest_mem_io(domid_t domid, struct xe= n_domctl_gdbsx_memio *iop) return iop->remain ? -EFAULT : 0; } =20 -static int update_domain_cpuid_info(struct domain *d, - const struct xen_domctl_cpuid *ctl) +static void domain_cpu_policy_changed(struct domain *d) { - struct cpuid_policy *p =3D d->arch.cpuid; - const struct cpuid_leaf leaf =3D { ctl->eax, ctl->ebx, ctl->ecx, ctl->= edx }; - int old_vendor =3D p->x86_vendor; - unsigned int old_7d0 =3D p->feat.raw[0].d, old_e8b =3D p->extd.raw[8].= b; - bool call_policy_changed =3D false; /* Avoid for_each_vcpu() unnecessa= rily */ - - /* - * Skip update for leaves we don't care about, to avoid the overhead of - * recalculate_cpuid_policy(). - */ - switch ( ctl->input[0] ) - { - case 0x00000000 ... ARRAY_SIZE(p->basic.raw) - 1: - if ( ctl->input[0] =3D=3D 4 && - ctl->input[1] >=3D ARRAY_SIZE(p->cache.raw) ) - return 0; - - if ( ctl->input[0] =3D=3D 7 && - ctl->input[1] >=3D ARRAY_SIZE(p->feat.raw) ) - return 0; - - if ( ctl->input[0] =3D=3D 0xb && - ctl->input[1] >=3D ARRAY_SIZE(p->topo.raw) ) - return 0; - - BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) < 2); - if ( ctl->input[0] =3D=3D XSTATE_CPUID && - ctl->input[1] !=3D 1 ) /* Everything else automatically calcu= lated. */ - return 0; - break; - - case 0x40000000: case 0x40000100: - /* Only care about the max_leaf limit. */ - - case 0x80000000 ... 0x80000000 + ARRAY_SIZE(p->extd.raw) - 1: - break; - - default: - return 0; - } - - /* Insert ctl data into cpuid_policy. */ - switch ( ctl->input[0] ) - { - case 0x00000000 ... ARRAY_SIZE(p->basic.raw) - 1: - switch ( ctl->input[0] ) - { - case 4: - p->cache.raw[ctl->input[1]] =3D leaf; - break; - - case 7: - p->feat.raw[ctl->input[1]] =3D leaf; - break; - - case 0xb: - p->topo.raw[ctl->input[1]] =3D leaf; - break; - - case XSTATE_CPUID: - p->xstate.raw[ctl->input[1]] =3D leaf; - break; - - default: - p->basic.raw[ctl->input[0]] =3D leaf; - break; - } - break; - - case 0x40000000: - p->hv_limit =3D ctl->eax; - break; + const struct cpuid_policy *p =3D d->arch.cpuid; + struct vcpu *v; =20 - case 0x40000100: - p->hv2_limit =3D ctl->eax; - break; - - case 0x80000000 ... 0x80000000 + ARRAY_SIZE(p->extd.raw) - 1: - p->extd.raw[ctl->input[0] - 0x80000000] =3D leaf; - break; - } - - recalculate_cpuid_policy(d); - - switch ( ctl->input[0] ) + if ( is_pv_domain(d) ) { - case 0: - call_policy_changed =3D (p->x86_vendor !=3D old_vendor); - break; - - case 1: - if ( is_pv_domain(d) && ((levelling_caps & LCAP_1cd) =3D=3D LCAP_1= cd) ) + if ( ((levelling_caps & LCAP_1cd) =3D=3D LCAP_1cd) ) { uint64_t mask =3D cpuidmask_defaults._1cd; uint32_t ecx =3D p->basic._1c; @@ -197,25 +110,18 @@ static int update_domain_cpuid_info(struct domain *d, =20 d->arch.pv.cpuidmasks->_1cd =3D mask; } - break; =20 - case 6: - if ( is_pv_domain(d) && ((levelling_caps & LCAP_6c) =3D=3D LCAP_6c= ) ) + if ( ((levelling_caps & LCAP_6c) =3D=3D LCAP_6c) ) { uint64_t mask =3D cpuidmask_defaults._6c; =20 if ( boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD ) - mask &=3D (~0ULL << 32) | ctl->ecx; + mask &=3D (~0ULL << 32) | p->basic.raw[6].c; =20 d->arch.pv.cpuidmasks->_6c =3D mask; } - break; - - case 7: - if ( ctl->input[1] !=3D 0 ) - break; =20 - if ( is_pv_domain(d) && ((levelling_caps & LCAP_7ab0) =3D=3D LCAP_= 7ab0) ) + if ( ((levelling_caps & LCAP_7ab0) =3D=3D LCAP_7ab0) ) { uint64_t mask =3D cpuidmask_defaults._7ab0; =20 @@ -232,35 +138,7 @@ static int update_domain_cpuid_info(struct domain *d, d->arch.pv.cpuidmasks->_7ab0 =3D mask; } =20 - /* - * If the IBRS/IBPB policy has changed, we need to recalculate the= MSR - * interception bitmaps. - */ - call_policy_changed =3D (is_hvm_domain(d) && - ((old_7d0 ^ p->feat.raw[0].d) & - (cpufeat_mask(X86_FEATURE_IBRSB) | - cpufeat_mask(X86_FEATURE_L1D_FLUSH)))); - break; - - case 0xa: - if ( boot_cpu_data.x86_vendor !=3D X86_VENDOR_INTEL ) - break; - - /* If PMU version is zero then the guest doesn't have VPMU */ - if ( p->basic.pmu_version =3D=3D 0 ) - { - struct vcpu *v; - - for_each_vcpu ( d, v ) - vpmu_destroy(v); - } - break; - - case 0xd: - if ( ctl->input[1] !=3D 1 ) - break; - - if ( is_pv_domain(d) && ((levelling_caps & LCAP_Da1) =3D=3D LCAP_D= a1) ) + if ( ((levelling_caps & LCAP_Da1) =3D=3D LCAP_Da1) ) { uint64_t mask =3D cpuidmask_defaults.Da1; uint32_t eax =3D p->xstate.Da1; @@ -270,10 +148,8 @@ static int update_domain_cpuid_info(struct domain *d, =20 d->arch.pv.cpuidmasks->Da1 =3D mask; } - break; =20 - case 0x80000001: - if ( is_pv_domain(d) && ((levelling_caps & LCAP_e1cd) =3D=3D LCAP_= e1cd) ) + if ( ((levelling_caps & LCAP_e1cd) =3D=3D LCAP_e1cd) ) { uint64_t mask =3D cpuidmask_defaults.e1cd; uint32_t ecx =3D p->extd.e1c; @@ -317,27 +193,104 @@ static int update_domain_cpuid_info(struct domain *d, =20 d->arch.pv.cpuidmasks->e1cd =3D mask; } + } + + for_each_vcpu( d, v ) + { + cpuid_policy_updated(v); + + /* If PMU version is zero then the guest doesn't have VPMU */ + if ( boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_INTEL && + p->basic.pmu_version =3D=3D 0 ) + vpmu_destroy(v); + } +} + +static int update_domain_cpuid_info(struct domain *d, + const struct xen_domctl_cpuid *ctl) +{ + struct cpuid_policy *p =3D d->arch.cpuid; + const struct cpuid_leaf leaf =3D { ctl->eax, ctl->ebx, ctl->ecx, ctl->= edx }; + + /* + * Skip update for leaves we don't care about, to avoid the overhead of + * recalculate_cpuid_policy(). + */ + switch ( ctl->input[0] ) + { + case 0x00000000 ... ARRAY_SIZE(p->basic.raw) - 1: + if ( ctl->input[0] =3D=3D 4 && + ctl->input[1] >=3D ARRAY_SIZE(p->cache.raw) ) + return 0; + + if ( ctl->input[0] =3D=3D 7 && + ctl->input[1] >=3D ARRAY_SIZE(p->feat.raw) ) + return 0; + + if ( ctl->input[0] =3D=3D 0xb && + ctl->input[1] >=3D ARRAY_SIZE(p->topo.raw) ) + return 0; + + BUILD_BUG_ON(ARRAY_SIZE(p->xstate.raw) < 2); + if ( ctl->input[0] =3D=3D XSTATE_CPUID && + ctl->input[1] !=3D 1 ) /* Everything else automatically calcu= lated. */ + return 0; break; =20 - case 0x80000008: - /* - * If the IBPB policy has changed, we need to recalculate the MSR - * interception bitmaps. - */ - call_policy_changed =3D (is_hvm_domain(d) && - ((old_e8b ^ p->extd.raw[8].b) & - cpufeat_mask(X86_FEATURE_IBPB))); + case 0x40000000: case 0x40000100: + /* Only care about the max_leaf limit. */ + + case 0x80000000 ... 0x80000000 + ARRAY_SIZE(p->extd.raw) - 1: break; + + default: + return 0; } =20 - if ( call_policy_changed ) + /* Insert ctl data into cpuid_policy. */ + switch ( ctl->input[0] ) { - struct vcpu *v; + case 0x00000000 ... ARRAY_SIZE(p->basic.raw) - 1: + switch ( ctl->input[0] ) + { + case 4: + p->cache.raw[ctl->input[1]] =3D leaf; + break; + + case 7: + p->feat.raw[ctl->input[1]] =3D leaf; + break; + + case 0xb: + p->topo.raw[ctl->input[1]] =3D leaf; + break; =20 - for_each_vcpu( d, v ) - cpuid_policy_updated(v); + case XSTATE_CPUID: + p->xstate.raw[ctl->input[1]] =3D leaf; + break; + + default: + p->basic.raw[ctl->input[0]] =3D leaf; + break; + } + break; + + case 0x40000000: + p->hv_limit =3D ctl->eax; + break; + + case 0x40000100: + p->hv2_limit =3D ctl->eax; + break; + + case 0x80000000 ... 0x80000000 + ARRAY_SIZE(p->extd.raw) - 1: + p->extd.raw[ctl->input[0] - 0x80000000] =3D leaf; + break; } =20 + recalculate_cpuid_policy(d); + domain_cpu_policy_changed(d); + return 0; } =20 --=20 2.11.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel