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x-conformance=sidf_compatible IronPort-SDR: HNF69+ZlEYzbkpnHp34yC+WZsEMuHwFL0uUPr+kDuWndPIlfpC34u0dB9ywVRxQAni+f4Bao76 Dbd5MaAFeSXXmJbnwiMNfIt3bDxLprqnssxjr8aBIfcxTZlb7/uah9TqNt2scc4WRAZTVrjUSa hMOk661eds63YMifZ8sqF2vrx1O0+Zck2P1SOOpXoXGZViga8ZyashdQW0yFpYroi9xAh/3jtY 2apBBQ2sfPfKv5devIL4KWeu5573qH6fVxxM/JOB7Am3BLZnvEq5YArBxcut2Dunm07zMq4snM 0cQ= X-SBRS: 2.7 X-MesageID: 5252875 X-Ironport-Server: esa1.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.64,471,1559534400"; d="scan'208";a="5252875" From: Andrew Cooper To: Xen-devel Date: Thu, 5 Sep 2019 20:04:18 +0100 Message-ID: <20190905190418.15142-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 Subject: [Xen-devel] [PATCH] x86/boot: Don't explicitly map the VGA region as UC- X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) All 64-bit capable processors use PAT, and with PAT, it is explicitly permitted to have mappings with a cacheability different to MTRRs. On a native system with a real legacy VGA region, MTRRs will cause the regi= on to be UC-. When booting virtualised, this range may be RAM and not a legacy VGA region, at which point it wants to be WB. Use WB mapping in the pagetables, such that in systems without a legacy VGA region, the RAM between 0xa0000 and 0xc0000 doesn't become unnecesserily UC= -. However, we still must use small pages to avoid the undefined behaviour cau= sed by superpages crossing MTRRs of different cacheability. While adjusting the pagetable construction, switch from pfn to idx for consistency with all the other construction logic. Signed-off-by: Andrew Cooper Reviewed-by: Roger Pau Monn=C3=A9 --- CC: Jan Beulich CC: Wei Liu CC: Roger Pau Monn=C3=A9 As a future optimisation, Xen could rewrite l2_identmap with a superpage if= it finds that MTRRs are disabled. However, this probably needs to wait until = Xen no longer unconditionally assumes a legacy VGA region to be present in the e820 if it finds something other than a hole --- xen/arch/x86/boot/x86_64.S | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S index 5ab24d73fc..1ca986f882 100644 --- a/xen/arch/x86/boot/x86_64.S +++ b/xen/arch/x86/boot/x86_64.S @@ -51,19 +51,13 @@ GLOBAL(stack_start) /* * Mapping of first 2 megabytes of memory. This is mapped with 4kB mappings * to avoid type conflicts with fixed-range MTRRs covering the lowest mega= byte - * of physical memory. In any case the VGA hole should be mapped with type= UC. - * Uses 1x 4k page. + * of physical memory. Uses 1x 4k page. */ l1_identmap: - pfn =3D 0 + idx =3D 0 .rept L1_PAGETABLE_ENTRIES - /* VGA hole (0xa0000-0xc0000) should be mapped UC-. */ - .if pfn >=3D 0xa0 && pfn < 0xc0 - .quad (pfn << PAGE_SHIFT) | PAGE_HYPERVISOR_UCMINUS | MAP_SMALL_PA= GES - .else - .quad (pfn << PAGE_SHIFT) | PAGE_HYPERVISOR | MAP_SMALL_PAGES - .endif - pfn =3D pfn + 1 + .quad (idx << PAGE_SHIFT) | PAGE_HYPERVISOR | MAP_SMALL_PAGES + idx =3D idx + 1 .endr .size l1_identmap, . - l1_identmap =20 --=20 2.11.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel