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x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: d0j9gR3yJZ91LyZHZojYjcAr575szCwaoLAewGpSotmTalfLdufC1kgVJRwLuK6RRIPUZPIA7d rMmV2KSebf/jS6k5S934gT6evnAHj3rN/P1vzIHP1NfAGg9/8LS4cP9e1gE+MDeCWpuG5TMy4D rLQtbw1Fs6JAtqOeJt+5v0B+p/zP4NNup8MEdl2giZbkI13t3544PgpvmT8GcB/mvDynPU6WpY EOVQtkKfHoAKxC6wrQjCMGjV2AezzoRMfDbVnykvQMDzyfqo2UfXih9PWW5OKyWn3fMNfHBM1W WNo= X-SBRS: 2.7 X-MesageID: 4181560 X-Ironport-Server: esa3.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.64,378,1559534400"; d="scan'208";a="4181560" From: Andrew Cooper To: Xen-devel Date: Mon, 12 Aug 2019 19:21:25 +0100 Message-ID: <20190812182125.18094-4-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190812182125.18094-1-andrew.cooper3@citrix.com> References: <20190812182125.18094-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH] x86/suspend: Simplify system table handling on resume X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) load_TR() is used exclusively in the resume path, but jumps through a lot of unnecessary hoops. As suspend/resume is strictly on CPU0 in idle context, the correct GDT to u= se is boot_gdt, which means it doesn't need saving on suspend. Similarly, the correct IDT to use can be derived, and the LDT is guaranteed to be NUL. The TR is still correct in the GDT, but needs the busy bit clearing before = we can reload it. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Wei Liu CC: Roger Pau Monn=C3=A9 A slightly different option would be to call load_system_tables() rather th= an opencoding part of it in restore_rest_processor_state(). However, that is more setup than is necessary. Thoughts? --- xen/arch/x86/acpi/suspend.c | 14 +++++++++++++- xen/arch/x86/acpi/wakeup_prot.S | 13 +------------ xen/arch/x86/traps.c | 21 --------------------- xen/include/asm-x86/desc.h | 2 -- 4 files changed, 14 insertions(+), 36 deletions(-) diff --git a/xen/arch/x86/acpi/suspend.c b/xen/arch/x86/acpi/suspend.c index ba9d2e13a7..a6f2584645 100644 --- a/xen/arch/x86/acpi/suspend.c +++ b/xen/arch/x86/acpi/suspend.c @@ -41,7 +41,19 @@ void save_rest_processor_state(void) =20 void restore_rest_processor_state(void) { - load_TR(); + unsigned int cpu =3D smp_processor_id(); + seg_desc_t *gdt =3D per_cpu(gdt, cpu) - FIRST_RESERVED_GDT_ENTRY; + struct tss64 *tss =3D &per_cpu(tss_page, cpu).tss; + const struct desc_ptr idtr =3D { + .base =3D (unsigned long)idt_tables[cpu], + .limit =3D (IDT_ENTRIES * sizeof(idt_entry_t)) - 1, + }; + + _set_tssldt_desc(gdt + TSS_ENTRY, (unsigned long)tss, + sizeof(*tss) - 1, SYS_DESC_tss_avail); + lidt(&idtr); + ltr(TSS_SELECTOR); + lldt(0); =20 /* Recover syscall MSRs */ wrmsrl(MSR_LSTAR, saved_lstar); diff --git a/xen/arch/x86/acpi/wakeup_prot.S b/xen/arch/x86/acpi/wakeup_pro= t.S index 9e9fcc1ab6..74261cb4f1 100644 --- a/xen/arch/x86/acpi/wakeup_prot.S +++ b/xen/arch/x86/acpi/wakeup_prot.S @@ -34,10 +34,6 @@ ENTRY(do_suspend_lowlevel) =20 mov %ss, REF(saved_ss) =20 - sgdt REF(saved_gdt) - sidt REF(saved_idt) - sldt REF(saved_ldt) - mov %cr0, GREG(ax) mov GREG(ax), REF(saved_cr0) =20 @@ -55,6 +51,7 @@ ENTRY(do_suspend_lowlevel) =20 =20 ENTRY(__ret_point) + lgdt boot_gdtr(%rip) =20 /* mmu_cr4_features contains latest cr4 setting */ mov REF(mmu_cr4_features), GREG(ax) @@ -66,10 +63,6 @@ ENTRY(__ret_point) mov REF(saved_cr0), GREG(ax) mov GREG(ax), %cr0 =20 - lgdt REF(saved_gdt) - lidt REF(saved_idt) - lldt REF(saved_ldt) - mov REF(saved_ss), %ss LOAD_GREG(sp) =20 @@ -129,9 +122,5 @@ DECLARE_GREG(13) DECLARE_GREG(14) DECLARE_GREG(15) =20 -saved_gdt: .quad 0,0 -saved_idt: .quad 0,0 -saved_ldt: .quad 0,0 - saved_cr0: .quad 0 saved_cr3: .quad 0 diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 23069e25ec..b424687f85 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -1901,27 +1901,6 @@ static void __init set_intr_gate(unsigned int n, voi= d *addr) __set_intr_gate(n, 0, addr); } =20 -void load_TR(void) -{ - struct tss64 *tss =3D &this_cpu(tss_page).tss; - struct desc_ptr old_gdt, tss_gdt =3D { - .base =3D (long)(this_cpu(gdt) - FIRST_RESERVED_GDT_ENTRY), - .limit =3D LAST_RESERVED_GDT_BYTE - }; - - _set_tssldt_desc( - this_cpu(gdt) + TSS_ENTRY - FIRST_RESERVED_GDT_ENTRY, - (unsigned long)tss, sizeof(*tss) - 1, SYS_DESC_tss_avail); - _set_tssldt_desc( - this_cpu(compat_gdt) + TSS_ENTRY - FIRST_RESERVED_GDT_ENTRY, - (unsigned long)tss, sizeof(*tss) - 1, SYS_DESC_tss_busy); - - /* Switch to non-compat GDT (which has B bit clear) to execute LTR. */ - asm volatile ( - "sgdt %0; lgdt %2; ltr %w1; lgdt %0" - : "=3Dm" (old_gdt) : "rm" (TSS_SELECTOR), "m" (tss_gdt) : "memory"= ); -} - static unsigned int calc_ler_msr(void) { switch ( boot_cpu_data.x86_vendor ) diff --git a/xen/include/asm-x86/desc.h b/xen/include/asm-x86/desc.h index 603b9a9013..24db3e9510 100644 --- a/xen/include/asm-x86/desc.h +++ b/xen/include/asm-x86/desc.h @@ -216,8 +216,6 @@ DECLARE_PER_CPU(seg_desc_t *, compat_gdt); DECLARE_PER_CPU(l1_pgentry_t, compat_gdt_l1e); DECLARE_PER_CPU(bool, full_gdt_loaded); =20 -extern void load_TR(void); - static inline void lgdt(const struct desc_ptr *gdtr) { __asm__ __volatile__ ( "lgdt %0" :: "m" (*gdtr) : "memory" ); --=20 2.11.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel