From nobody Tue Apr 23 07:58:02 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org ARC-Seal: i=1; a=rsa-sha256; t=1557951548; cv=none; d=zoho.com; s=zohoarc; b=HTXon7p8GUz+stNGDNJlg7OtVRW3AXAoa7TNAyaE2KzbA6y1Tlq/RVxwy8M53sbHwo68bT5lC/bdPSuyHjC1gpYWNT1nQe5a8T3FlcxvckjkrzzJLJn/PeoZ2qrEX4t40otG3D5YQ7HydvVxbffCWOVPpwWVRVWph1czIBhWSVY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557951548; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:To:ARC-Authentication-Results; bh=EIPVAc8CoCfPsCHD8fXgngaIxsm3t+VzttFEgTmzc6g=; b=nHAncBpw5ll1KKNdisUrKSw45bs8qXqNnL9hLFHCZmO94SoBcJNDaF/C4DozI5g3aCLwj+qbdE+R/O/8PKoc9Gih7wrH4szifQYl5x1Dizi9WkEPrFgeB/INVufRaPvR1irXizaMq+0F05+QjyvU728bXCWvafWDQZepDVy/9yA= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1557951548534697.2862843134559; Wed, 15 May 2019 13:19:08 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hR0LP-0003jc-BH; Wed, 15 May 2019 20:17:43 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hR0LN-0003jX-V6 for xen-devel@lists.xenproject.org; Wed, 15 May 2019 20:17:41 +0000 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id 7ccc11ea-774e-11e9-96d2-3bf8880a9c96; Wed, 15 May 2019 20:17:40 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6E21C374; Wed, 15 May 2019 13:17:39 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 386143F703; Wed, 15 May 2019 13:17:38 -0700 (PDT) X-Inumbo-ID: 7ccc11ea-774e-11e9-96d2-3bf8880a9c96 From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 15 May 2019 21:17:30 +0100 Message-Id: <20190515201730.19079-1-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 Subject: [Xen-devel] [PATCH] xen/arm: traps: Avoid using BUG_ON() to check guest state in advance_pc() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Lukas=20J=C3=BCnger?= , Oleksandr_Tyshchenko@epam.com, Julien Grall , sstabellini@kernel.org, Andrii_Anisov@epam.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The condition of the BUG_ON() in advance_pc() is pretty wrong because the bits [26:25] and [15:10] have a different meaning between AArch32 and AArch64 state. On AArch32, they are used to store PSTATE.IT. On AArch64, they are RES0 or used for new feature (e.g ARMv8.0-SSBS, ARMv8.5-BTI). This means a 64-bit guest will hit the BUG_ON() if it is trying to use any of these features. More generally, RES0 means that the bits is reserved for future use. So crashing the host is definitely not the right solution. In this particular case, we only need to know the guest was using 32-bit Mode and the Thumb instructions. So replace the BUG_ON() by a proper check. Reported-by: Lukas J=C3=BCnger Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- This patch needs to be backported as far as possible. Otherwise Xen would not be able to run on processor implementing ARMv8.0-SSBS, ARMv8.5-BTI or ARMv8.5-MemTag. The former is actually the most critical as this is used for controlling mitagion for SSBD (aka Spectre v4) in hardware. --- xen/arch/arm/traps.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index d8b9a8a0f0..798a3a45a4 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -1650,12 +1650,9 @@ int check_conditional_instr(struct cpu_user_regs *re= gs, const union hsr hsr) void advance_pc(struct cpu_user_regs *regs, const union hsr hsr) { unsigned long itbits, cond, cpsr =3D regs->cpsr; + bool is_thumb =3D psr_mode_is_32bit(cpsr) && (cpsr & PSR_THUMB); =20 - /* PSR_IT_MASK bits can only be set for 32-bit processors in Thumb mod= e. */ - BUG_ON( (!psr_mode_is_32bit(cpsr)||!(cpsr&PSR_THUMB)) - && (cpsr&PSR_IT_MASK) ); - - if ( cpsr&PSR_IT_MASK ) + if ( is_thumb && (cpsr & PSR_IT_MASK) ) { /* The ITSTATE[7:0] block is contained in CPSR[15:10],CPSR[26:25] * --=20 2.11.0 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel