[Xen-devel] [PATCH v2] x86/vm_event: add gdtr_base to the vm_event structure

Tamas K Lengyel posted 1 patch 62 weeks ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/xen tags/patchew/20190502214203.17279-1-tamas@tklengyel.com
xen/arch/x86/vm_event.c       | 6 ++++++
xen/include/public/vm_event.h | 6 ++++--
2 files changed, 10 insertions(+), 2 deletions(-)

[Xen-devel] [PATCH v2] x86/vm_event: add gdtr_base to the vm_event structure

Posted by Tamas K Lengyel 62 weeks ago
Receiving this register is useful for introspecting 32-bit Windows when the
event being trapped happened while in ring3.

Signed-off-by: Tamas K Lengyel <tamas@tklengyel.com>
Cc: Razvan Cojocaru <rcojocaru@bitdefender.com>
Cc: Tamas K Lengyel <tamas@tklengyel.com>
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>
Cc: Roger Pau Monne <roger.pau@citrix.com>
---
v2: add gdtr limit
---
 xen/arch/x86/vm_event.c       | 6 ++++++
 xen/include/public/vm_event.h | 6 ++++--
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/vm_event.c b/xen/arch/x86/vm_event.c
index 51c3493b1d..52c2a71fa0 100644
--- a/xen/arch/x86/vm_event.c
+++ b/xen/arch/x86/vm_event.c
@@ -179,6 +179,11 @@ static void vm_event_pack_segment_register(enum x86_segment segment,
         reg->es_sel = seg.sel;
         break;
 
+    case x86_seg_gdtr:
+        reg->gdtr_base = seg.base;
+        reg->gdtr_limit = seg.limit;
+        break;
+
     default:
         ASSERT_UNREACHABLE();
     }
@@ -238,6 +243,7 @@ void vm_event_fill_regs(vm_event_request_t *req)
     vm_event_pack_segment_register(x86_seg_ss, &req->data.regs.x86);
     vm_event_pack_segment_register(x86_seg_ds, &req->data.regs.x86);
     vm_event_pack_segment_register(x86_seg_es, &req->data.regs.x86);
+    vm_event_pack_segment_register(x86_seg_gdtr, &req->data.regs.x86);
 
     req->data.regs.x86.shadow_gs = ctxt.shadow_gs;
     req->data.regs.x86.dr6 = ctxt.dr6;
diff --git a/xen/include/public/vm_event.h b/xen/include/public/vm_event.h
index b2bafc0d77..959083d8c4 100644
--- a/xen/include/public/vm_event.h
+++ b/xen/include/public/vm_event.h
@@ -29,7 +29,7 @@
 
 #include "xen.h"
 
-#define VM_EVENT_INTERFACE_VERSION 0x00000004
+#define VM_EVENT_INTERFACE_VERSION 0x00000005
 
 #if defined(__XEN__) || defined(__XEN_TOOLS__)
 
@@ -198,6 +198,7 @@ struct vm_event_regs_x86 {
     uint64_t msr_efer;
     uint64_t msr_star;
     uint64_t msr_lstar;
+    uint64_t gdtr_base;
     uint32_t cs_base;
     uint32_t ss_base;
     uint32_t ds_base;
@@ -211,13 +212,14 @@ struct vm_event_regs_x86 {
     struct vm_event_x86_selector_reg fs;
     struct vm_event_x86_selector_reg gs;
     uint64_t shadow_gs;
+    uint16_t gdtr_limit;
     uint16_t cs_sel;
     uint16_t ss_sel;
     uint16_t ds_sel;
     uint16_t es_sel;
     uint16_t fs_sel;
     uint16_t gs_sel;
-    uint32_t _pad;
+    uint16_t _pad;
 };
 
 /*
-- 
2.20.1


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Re: [Xen-devel] [PATCH v2] x86/vm_event: add gdtr_base to the vm_event structure

Posted by Tamas K Lengyel 62 weeks ago
On Thu, May 2, 2019 at 3:42 PM Tamas K Lengyel <tamas@tklengyel.com> wrote:
>
> Receiving this register is useful for introspecting 32-bit Windows when the
> event being trapped happened while in ring3.
>
> Signed-off-by: Tamas K Lengyel <tamas@tklengyel.com>
> Cc: Razvan Cojocaru <rcojocaru@bitdefender.com>
> Cc: Tamas K Lengyel <tamas@tklengyel.com>
> Cc: Jan Beulich <jbeulich@suse.com>
> Cc: Andrew Cooper <andrew.cooper3@citrix.com>
> Cc: Wei Liu <wei.liu2@citrix.com>
> Cc: Roger Pau Monne <roger.pau@citrix.com>
> ---
> v2: add gdtr limit
> ---
>  xen/arch/x86/vm_event.c       | 6 ++++++
>  xen/include/public/vm_event.h | 6 ++++--
>  2 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/xen/arch/x86/vm_event.c b/xen/arch/x86/vm_event.c
> index 51c3493b1d..52c2a71fa0 100644
> --- a/xen/arch/x86/vm_event.c
> +++ b/xen/arch/x86/vm_event.c
> @@ -179,6 +179,11 @@ static void vm_event_pack_segment_register(enum x86_segment segment,
>          reg->es_sel = seg.sel;
>          break;
>
> +    case x86_seg_gdtr:
> +        reg->gdtr_base = seg.base;
> +        reg->gdtr_limit = seg.limit;
> +        break;
> +
>      default:
>          ASSERT_UNREACHABLE();
>      }
> @@ -238,6 +243,7 @@ void vm_event_fill_regs(vm_event_request_t *req)
>      vm_event_pack_segment_register(x86_seg_ss, &req->data.regs.x86);
>      vm_event_pack_segment_register(x86_seg_ds, &req->data.regs.x86);
>      vm_event_pack_segment_register(x86_seg_es, &req->data.regs.x86);
> +    vm_event_pack_segment_register(x86_seg_gdtr, &req->data.regs.x86);
>
>      req->data.regs.x86.shadow_gs = ctxt.shadow_gs;
>      req->data.regs.x86.dr6 = ctxt.dr6;
> diff --git a/xen/include/public/vm_event.h b/xen/include/public/vm_event.h
> index b2bafc0d77..959083d8c4 100644
> --- a/xen/include/public/vm_event.h
> +++ b/xen/include/public/vm_event.h
> @@ -29,7 +29,7 @@
>
>  #include "xen.h"
>
> -#define VM_EVENT_INTERFACE_VERSION 0x00000004
> +#define VM_EVENT_INTERFACE_VERSION 0x00000005
>
>  #if defined(__XEN__) || defined(__XEN_TOOLS__)
>
> @@ -198,6 +198,7 @@ struct vm_event_regs_x86 {
>      uint64_t msr_efer;
>      uint64_t msr_star;
>      uint64_t msr_lstar;
> +    uint64_t gdtr_base;
>      uint32_t cs_base;
>      uint32_t ss_base;
>      uint32_t ds_base;
> @@ -211,13 +212,14 @@ struct vm_event_regs_x86 {
>      struct vm_event_x86_selector_reg fs;
>      struct vm_event_x86_selector_reg gs;
>      uint64_t shadow_gs;
> +    uint16_t gdtr_limit;

Whoops, just noticed that limit actually needs 20-bits. I'll just grow
this to 32 and drop the pad at the end.

>      uint16_t cs_sel;
>      uint16_t ss_sel;
>      uint16_t ds_sel;
>      uint16_t es_sel;
>      uint16_t fs_sel;
>      uint16_t gs_sel;
> -    uint32_t _pad;
> +    uint16_t _pad;
>  };

Tamas

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Re: [Xen-devel] [PATCH v2] x86/vm_event: add gdtr_base to the vm_event structure

Posted by Andrew Cooper 62 weeks ago
On 02/05/2019 23:40, Tamas K Lengyel wrote:
>> @@ -211,13 +212,14 @@ struct vm_event_regs_x86 {
>>      struct vm_event_x86_selector_reg fs;
>>      struct vm_event_x86_selector_reg gs;
>>      uint64_t shadow_gs;
>> +    uint16_t gdtr_limit;
> Whoops, just noticed that limit actually needs 20-bits. I'll just grow
> this to 32 and drop the pad at the end.

There is no such thing as a GDT or an IDT with a limit beyond 16 bits. 
(Furthermore, an IDT with a limit beyond 12 bits is just a waste of memory).

VT-x performs a consistency check on every vmentry that the
VMCS_{G,I}DTR_LIMIT fields are within 16 bits, despite being encoded as
32bit fields.  SVM specifies the higher 16 bits as ignored.

~Andrew

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Re: [Xen-devel] [PATCH v2] x86/vm_event: add gdtr_base to the vm_event structure

Posted by Tamas K Lengyel 62 weeks ago
On Thu, May 2, 2019 at 5:42 PM Andrew Cooper <andrew.cooper3@citrix.com> wrote:
>
> On 02/05/2019 23:40, Tamas K Lengyel wrote:
> >> @@ -211,13 +212,14 @@ struct vm_event_regs_x86 {
> >>      struct vm_event_x86_selector_reg fs;
> >>      struct vm_event_x86_selector_reg gs;
> >>      uint64_t shadow_gs;
> >> +    uint16_t gdtr_limit;
> > Whoops, just noticed that limit actually needs 20-bits. I'll just grow
> > this to 32 and drop the pad at the end.
>
> There is no such thing as a GDT or an IDT with a limit beyond 16 bits.
> (Furthermore, an IDT with a limit beyond 12 bits is just a waste of memory).
>
> VT-x performs a consistency check on every vmentry that the
> VMCS_{G,I}DTR_LIMIT fields are within 16 bits, despite being encoded as
> 32bit fields.  SVM specifies the higher 16 bits as ignored.
>

Thanks for the clarification - in that case v2 of this patch is correct.

Tamas

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Re: [Xen-devel] [PATCH v2] x86/vm_event: add gdtr_base to the vm_event structure

Posted by Razvan Cojocaru 62 weeks ago
On 5/3/19 12:42 AM, Tamas K Lengyel wrote:
> Receiving this register is useful for introspecting 32-bit Windows when the
> event being trapped happened while in ring3.
> 
> Signed-off-by: Tamas K Lengyel <tamas@tklengyel.com>
> Cc: Razvan Cojocaru <rcojocaru@bitdefender.com>
> Cc: Tamas K Lengyel <tamas@tklengyel.com>
> Cc: Jan Beulich <jbeulich@suse.com>
> Cc: Andrew Cooper <andrew.cooper3@citrix.com>
> Cc: Wei Liu <wei.liu2@citrix.com>
> Cc: Roger Pau Monne <roger.pau@citrix.com>
> ---
> v2: add gdtr limit

Acked-by: Razvan Cojocaru <rcojocaru@bitdefender.com>


Thanks,
Razvan

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