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Mon, 20 Dec 2021 13:16:17 -0800 (PST) From: Oleksandr Tyshchenko To: xen-devel@lists.xenproject.org Cc: Oleksandr Tyshchenko , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Yoshihiro Shimoda , Oleksandr Andrushchenko Subject: [PATCH V2 04/10] iommu/ipmmu-vmsa: Add light version of Linux's ipmmu_features Date: Mon, 20 Dec 2021 23:15:51 +0200 Message-Id: <1640034957-19764-5-git-send-email-olekstysh@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1640034957-19764-1-git-send-email-olekstysh@gmail.com> References: <1640034957-19764-1-git-send-email-olekstysh@gmail.com> X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1640035010371100014 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Oleksandr Tyshchenko This is a prereq work needed to add support for S4 series easily in the future. We don't need to pull the whole struct and all instances as Xen driver doesn't support old Arm32 based Gen2 SoCs, so there is no point in keeping all differences between Gen2 and Gen3 here. All what we need is a minimal support to be able to operate with Gen3 and new S4. Add Gen3 specific info with only two fields (number_of_contexts and num_utlbs) for now, the subsequent patches will add remaining bits. No change in behavior. Signed-off-by: Oleksandr Tyshchenko Reviewed-by: Yoshihiro Shimoda --- Changes V1 -> V2: - add R-b --- xen/drivers/passthrough/arm/ipmmu-vmsa.c | 54 +++++++++++++++++++++++-----= ---- 1 file changed, 40 insertions(+), 14 deletions(-) diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthr= ough/arm/ipmmu-vmsa.c index 1b94af2..369be4c 100644 --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c @@ -71,9 +71,9 @@ * R-Car Gen3 SoCs make use of up to 8 IPMMU contexts (sets of page table)= and * these can be managed independently. Each context is mapped to one Xen d= omain. */ -#define IPMMU_CTX_MAX 8 +#define IPMMU_CTX_MAX 8U /* R-Car Gen3 SoCs make use of up to 48 micro-TLBs per IPMMU device. */ -#define IPMMU_UTLB_MAX 48 +#define IPMMU_UTLB_MAX 48U =20 /* IPMMU context supports IPA size up to 40 bit. */ #define IPMMU_MAX_P2M_IPA_BITS 40 @@ -106,17 +106,22 @@ struct ipmmu_vmsa_xen_device { struct ipmmu_vmsa_device *mmu; }; =20 +struct ipmmu_features { + unsigned int number_of_contexts; + unsigned int num_utlbs; +}; + /* Root/Cache IPMMU device's information */ struct ipmmu_vmsa_device { struct device *dev; void __iomem *base; struct ipmmu_vmsa_device *root; struct list_head list; - unsigned int num_utlbs; unsigned int num_ctx; spinlock_t lock; /* Protects ctx and domains[] */ DECLARE_BITMAP(ctx, IPMMU_CTX_MAX); struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX]; + const struct ipmmu_features *features; }; =20 /* @@ -727,6 +732,11 @@ static int ipmmu_init_platform_device(struct device *d= ev, return 0; } =20 +static const struct ipmmu_features ipmmu_features_rcar_gen3 =3D { + .number_of_contexts =3D 8, + .num_utlbs =3D 48, +}; + static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu) { unsigned int i; @@ -798,6 +808,27 @@ static __init bool ipmmu_stage2_supported(void) return stage2_supported; } =20 +static const struct dt_device_match ipmmu_dt_match[] __initconst =3D +{ + { + .compatible =3D "renesas,ipmmu-r8a7795", + .data =3D &ipmmu_features_rcar_gen3, + }, + { + .compatible =3D "renesas,ipmmu-r8a77965", + .data =3D &ipmmu_features_rcar_gen3, + }, + { + .compatible =3D "renesas,ipmmu-r8a7796", + .data =3D &ipmmu_features_rcar_gen3, + }, + { + .compatible =3D "renesas,ipmmu-r8a77961", + .data =3D &ipmmu_features_rcar_gen3, + }, + { /* sentinel */ }, +}; + /* * This function relies on the fact that Root IPMMU device is being probed * the first. If not the case, it denies further Cache IPMMU device probes @@ -806,6 +837,7 @@ static __init bool ipmmu_stage2_supported(void) */ static int ipmmu_probe(struct dt_device_node *node) { + const struct dt_device_match *match; struct ipmmu_vmsa_device *mmu; uint64_t addr, size; int irq, ret; @@ -817,9 +849,12 @@ static int ipmmu_probe(struct dt_device_node *node) return -ENOMEM; } =20 + match =3D dt_match_node(ipmmu_dt_match, node); + ASSERT(match); + mmu->features =3D match->data; + mmu->dev =3D &node->dev; - mmu->num_utlbs =3D IPMMU_UTLB_MAX; - mmu->num_ctx =3D IPMMU_CTX_MAX; + mmu->num_ctx =3D min(IPMMU_CTX_MAX, mmu->features->number_of_contexts); spin_lock_init(&mmu->lock); bitmap_zero(mmu->ctx, IPMMU_CTX_MAX); =20 @@ -1296,15 +1331,6 @@ static const struct iommu_ops ipmmu_iommu_ops =3D .add_device =3D ipmmu_add_device, }; =20 -static const struct dt_device_match ipmmu_dt_match[] __initconst =3D -{ - DT_MATCH_COMPATIBLE("renesas,ipmmu-r8a7795"), - DT_MATCH_COMPATIBLE("renesas,ipmmu-r8a77965"), - DT_MATCH_COMPATIBLE("renesas,ipmmu-r8a7796"), - DT_MATCH_COMPATIBLE("renesas,ipmmu-r8a77961"), - { /* sentinel */ }, -}; - static __init int ipmmu_init(struct dt_device_node *node, const void *data) { int ret; --=20 2.7.4