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Sat, 27 Nov 2021 09:51:56 -0800 (PST) From: Oleksandr Tyshchenko To: xen-devel@lists.xenproject.org Cc: Oleksandr Tyshchenko , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Yoshihiro Shimoda Subject: [PATCH 06/10] iommu/ipmmu-vmsa: Add utlb_offset_base Date: Sat, 27 Nov 2021 19:51:41 +0200 Message-Id: <1638035505-16931-7-git-send-email-olekstysh@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1638035505-16931-1-git-send-email-olekstysh@gmail.com> References: <1638035505-16931-1-git-send-email-olekstysh@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1638035560634100002 From: Oleksandr Tyshchenko This is a non-verbatim port of corresponding Linux upsteam commit: 1289f7f15001c7ed36be6d23cb145c1d5feacdc8 Original commit message: commit 1289f7f15001c7ed36be6d23cb145c1d5feacdc8 Author: Yoshihiro Shimoda Date: Wed Nov 6 11:35:50 2019 +0900 iommu/ipmmu-vmsa: Add utlb_offset_base Since we will have changed memory mapping of the IPMMU in the future, this patch adds a utlb_offset_base into struct ipmmu_features for IMUCTR and IMUASID registers. No behavior change. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Niklas S=C3=B6derlund Signed-off-by: Joerg Roedel ********** This is a prereq work needed to add support for S4 series easily in the future. Almost the same change as original commit makes, but without updating struct ipmmu_features_default which Xen driver doesn't have (there is no support of old Arm32 based Gen2 SoCs). No change in behavior. Signed-off-by: Oleksandr Tyshchenko Reviewed-by: Yoshihiro Shimoda --- xen/drivers/passthrough/arm/ipmmu-vmsa.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthr= ough/arm/ipmmu-vmsa.c index ca33456..d8f96fc 100644 --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c @@ -111,6 +111,7 @@ struct ipmmu_features { unsigned int num_utlbs; unsigned int ctx_offset_base; unsigned int ctx_offset_stride; + unsigned int utlb_offset_base; }; =20 /* Root/Cache IPMMU device's information */ @@ -374,7 +375,7 @@ static void ipmmu_ctx_write_all(struct ipmmu_vmsa_domai= n *domain, =20 static uint32_t ipmmu_utlb_reg(struct ipmmu_vmsa_device *mmu, uint32_t reg) { - return reg; + return mmu->features->utlb_offset_base + reg; } =20 static void ipmmu_imuasid_write(struct ipmmu_vmsa_device *mmu, @@ -738,6 +739,7 @@ static const struct ipmmu_features ipmmu_features_rcar_= gen3 =3D { .num_utlbs =3D 48, .ctx_offset_base =3D 0, .ctx_offset_stride =3D 0x40, + .utlb_offset_base =3D 0, }; =20 static void ipmmu_device_reset(struct ipmmu_vmsa_device *mmu) --=20 2.7.4