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helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.60.83 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.83; helo=xsj-pvapsmtpgw01; From: Brian Woods To: xen-devel Subject: [RFC v2 1/2] arm,smmu: switch to using iommu_fwspec functions Date: Tue, 21 Jul 2020 21:00:30 -0700 Message-Id: <1595390431-24805-2-git-send-email-brian.woods@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1595390431-24805-1-git-send-email-brian.woods@xilinx.com> References: <1595390431-24805-1-git-send-email-brian.woods@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFTY:; SFS:(376002)(39850400004)(136003)(346002)(396003)(46966005)(8936002)(83380400001)(356005)(336012)(9786002)(70206006)(81166007)(8676002)(86362001)(7696005)(70586007)(54906003)(186003)(2906002)(82740400003)(316002)(82310400002)(107886003)(44832011)(36756003)(5660300002)(426003)(47076004)(4326008)(6916009)(6666004)(26005)(2616005)(478600001)(142933001); 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Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT038.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR02MB5717 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Brian Woods Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: pass (identity @xilinx.onmicrosoft.com) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Modify the smmu driver so that it uses the iommu_fwspec helper functions. This means both ARM IOMMU drivers will both use the iommu_fwspec helper functions. Signed-off-by: Brian Woods --- Interested in if combining the legacy and generic bindings paths are worth or if Xen plans to depreicate legacy bindings at some point. v1 -> v2 - removed MAX_MASTER_STREAMIDS - removed unneeded curly brackets xen/drivers/passthrough/arm/smmu.c | 81 +++++++++++++++++++------------= ---- xen/drivers/passthrough/device_tree.c | 3 ++ 2 files changed, 47 insertions(+), 37 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/a= rm/smmu.c index 94662a8..7a5c6cd 100644 --- a/xen/drivers/passthrough/arm/smmu.c +++ b/xen/drivers/passthrough/arm/smmu.c @@ -49,6 +49,7 @@ #include #include #include +#include #include =20 /* Xen: The below defines are redefined within the file. Undef it */ @@ -302,9 +303,6 @@ static struct iommu_group *iommu_group_get(struct devic= e *dev) =20 /***** Start of Linux SMMU code *****/ =20 -/* Maximum number of stream IDs assigned to a single device */ -#define MAX_MASTER_STREAMIDS MAX_PHANDLE_ARGS - /* Maximum number of context banks per SMMU */ #define ARM_SMMU_MAX_CBS 128 =20 @@ -597,8 +595,7 @@ struct arm_smmu_smr { }; =20 struct arm_smmu_master_cfg { - int num_streamids; - u16 streamids[MAX_MASTER_STREAMIDS]; + struct iommu_fwspec *fwspec; struct arm_smmu_smr *smrs; }; =20 @@ -779,7 +776,7 @@ static int register_smmu_master(struct arm_smmu_device = *smmu, struct device *dev, struct of_phandle_args *masterspec) { - int i; + int i, ret =3D 0; struct arm_smmu_master *master; =20 master =3D find_smmu_master(smmu, masterspec->np); @@ -790,34 +787,37 @@ static int register_smmu_master(struct arm_smmu_devic= e *smmu, return -EBUSY; } =20 - if (masterspec->args_count > MAX_MASTER_STREAMIDS) { - dev_err(dev, - "reached maximum number (%d) of stream IDs for master device %s\n", - MAX_MASTER_STREAMIDS, masterspec->np->name); - return -ENOSPC; - } - master =3D devm_kzalloc(dev, sizeof(*master), GFP_KERNEL); if (!master) return -ENOMEM; + master->of_node =3D masterspec->np; =20 - master->of_node =3D masterspec->np; - master->cfg.num_streamids =3D masterspec->args_count; + ret =3D iommu_fwspec_init(&master->of_node->dev, smmu->dev); + if (ret) { + kfree(master); + return ret; + } + master->cfg.fwspec =3D dev_iommu_fwspec_get(&master->of_node->dev); + + /* adding the ids here */ + ret =3D iommu_fwspec_add_ids(&masterspec->np->dev, + masterspec->args, + masterspec->args_count); + if (ret) + return ret; =20 /* Xen: Let Xen know that the device is protected by an SMMU */ dt_device_set_protected(masterspec->np); =20 - for (i =3D 0; i < master->cfg.num_streamids; ++i) { - u16 streamid =3D masterspec->args[i]; - - if (!(smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) && - (streamid >=3D smmu->num_mapping_groups)) { - dev_err(dev, - "stream ID for master device %s greater than maximum allowed (%d)\n", - masterspec->np->name, smmu->num_mapping_groups); - return -ERANGE; + if (!(smmu->features & ARM_SMMU_FEAT_STREAM_MATCH)) { + for (i =3D 0; i < master->cfg.fwspec->num_ids; ++i) { + if (masterspec->args[i] >=3D smmu->num_mapping_groups) { + dev_err(dev, + "stream ID for master device %s greater than maximum allowed (%d)\n", + masterspec->np->name, smmu->num_mapping_groups); + return -ERANGE; + } } - master->cfg.streamids[i] =3D streamid; } return insert_smmu_master(smmu, master); } @@ -1397,15 +1397,15 @@ static int arm_smmu_master_configure_smrs(struct ar= m_smmu_device *smmu, if (cfg->smrs) return -EEXIST; =20 - smrs =3D kmalloc_array(cfg->num_streamids, sizeof(*smrs), GFP_KERNEL); + smrs =3D kmalloc_array(cfg->fwspec->num_ids, sizeof(*smrs), GFP_KERNEL); if (!smrs) { dev_err(smmu->dev, "failed to allocate %d SMRs\n", - cfg->num_streamids); + cfg->fwspec->num_ids); return -ENOMEM; } =20 /* Allocate the SMRs on the SMMU */ - for (i =3D 0; i < cfg->num_streamids; ++i) { + for (i =3D 0; i < cfg->fwspec->num_ids; ++i) { int idx =3D __arm_smmu_alloc_bitmap(smmu->smr_map, 0, smmu->num_mapping_groups); if (IS_ERR_VALUE(idx)) { @@ -1416,12 +1416,12 @@ static int arm_smmu_master_configure_smrs(struct ar= m_smmu_device *smmu, smrs[i] =3D (struct arm_smmu_smr) { .idx =3D idx, .mask =3D 0, /* We don't currently share SMRs */ - .id =3D cfg->streamids[i], + .id =3D cfg->fwspec->ids[i], }; } =20 /* It worked! Now, poke the actual hardware */ - for (i =3D 0; i < cfg->num_streamids; ++i) { + for (i =3D 0; i < cfg->fwspec->num_ids; ++i) { u32 reg =3D SMR_VALID | smrs[i].id << SMR_ID_SHIFT | smrs[i].mask << SMR_MASK_SHIFT; writel_relaxed(reg, gr0_base + ARM_SMMU_GR0_SMR(smrs[i].idx)); @@ -1448,7 +1448,7 @@ static void arm_smmu_master_free_smrs(struct arm_smmu= _device *smmu, return; =20 /* Invalidate the SMRs before freeing back to the allocator */ - for (i =3D 0; i < cfg->num_streamids; ++i) { + for (i =3D 0; i < cfg->fwspec->num_ids; ++i) { u8 idx =3D smrs[i].idx; =20 writel_relaxed(~SMR_VALID, gr0_base + ARM_SMMU_GR0_SMR(idx)); @@ -1471,10 +1471,10 @@ static int arm_smmu_domain_add_master(struct arm_sm= mu_domain *smmu_domain, if (ret) return ret =3D=3D -EEXIST ? 0 : ret; =20 - for (i =3D 0; i < cfg->num_streamids; ++i) { + for (i =3D 0; i < cfg->fwspec->num_ids; ++i) { u32 idx, s2cr; =20 - idx =3D cfg->smrs ? cfg->smrs[i].idx : cfg->streamids[i]; + idx =3D cfg->smrs ? cfg->smrs[i].idx : cfg->fwspec->ids[i]; s2cr =3D S2CR_TYPE_TRANS | (smmu_domain->cfg.cbndx << S2CR_CBNDX_SHIFT); writel_relaxed(s2cr, gr0_base + ARM_SMMU_GR0_S2CR(idx)); @@ -1499,8 +1499,8 @@ static void arm_smmu_domain_remove_master(struct arm_= smmu_domain *smmu_domain, * that it can be re-allocated immediately. * Xen: Unlike Linux, any access to non-configured stream will fault. */ - for (i =3D 0; i < cfg->num_streamids; ++i) { - u32 idx =3D cfg->smrs ? cfg->smrs[i].idx : cfg->streamids[i]; + for (i =3D 0; i < cfg->fwspec->num_ids; ++i) { + u32 idx =3D cfg->smrs ? cfg->smrs[i].idx : cfg->fwspec->ids[i]; =20 writel_relaxed(S2CR_TYPE_FAULT, gr0_base + ARM_SMMU_GR0_S2CR(idx)); @@ -1924,14 +1924,21 @@ static int arm_smmu_add_device(struct device *dev) ret =3D -ENOMEM; goto out_put_group; } + cfg->fwspec =3D kzalloc(sizeof(struct iommu_fwspec), GFP_KERNEL); + if (!cfg->fwspec) { + kfree(cfg); + ret =3D -ENOMEM; + goto out_put_group; + } + iommu_fwspec_init(dev, smmu->dev); =20 - cfg->num_streamids =3D 1; + cfg->fwspec->num_ids =3D 1; /* * Assume Stream ID =3D=3D Requester ID for now. * We need a way to describe the ID mappings in FDT. */ pci_for_each_dma_alias(pdev, __arm_smmu_get_pci_sid, - &cfg->streamids[0]); + &cfg->fwspec->ids[0]); releasefn =3D __arm_smmu_release_pci_iommudata; } else { struct arm_smmu_master *master; diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index 999b831..acf6b62 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -140,6 +140,9 @@ int iommu_add_dt_device(struct dt_device_node *np) if ( !ops ) return -EINVAL; =20 + if ( dt_device_is_protected(np) ) + return 0; + if ( dev_iommu_fwspec_get(dev) ) return -EEXIST; =20 --=20 2.7.4 From nobody Fri Mar 29 12:15:19 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT030.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB5849 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Brian Woods Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: pass (identity @xilinx.onmicrosoft.com) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Restructure some of the code and add supporting functions for adding generic device tree (DT) binding support. This will allow for using current Linux device trees with just modifying the chosen field to enable Xen. Signed-off-by: Brian Woods --- Just realized that I'm fairly sure I need to do some work on the SMRs. Other than that though, I think things should be okayish. v1 -> v2 - Corrected how reading of DT is done with generic bindings xen/drivers/passthrough/arm/smmu.c | 102 +++++++++++++++++++++++++-----= ---- xen/drivers/passthrough/device_tree.c | 17 +----- 2 files changed, 78 insertions(+), 41 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/a= rm/smmu.c index 7a5c6cd..25c090a 100644 --- a/xen/drivers/passthrough/arm/smmu.c +++ b/xen/drivers/passthrough/arm/smmu.c @@ -251,6 +251,8 @@ struct iommu_group atomic_t ref; }; =20 +static const struct arm_smmu_device *find_smmu(const struct device *dev); + static struct iommu_group *iommu_group_alloc(void) { struct iommu_group *group =3D xzalloc(struct iommu_group); @@ -772,56 +774,104 @@ static int insert_smmu_master(struct arm_smmu_device= *smmu, return 0; } =20 -static int register_smmu_master(struct arm_smmu_device *smmu, - struct device *dev, - struct of_phandle_args *masterspec) +static int arm_smmu_dt_add_device_legacy(struct arm_smmu_device *smmu, + struct device *dev, + struct iommu_fwspec *fwspec) { - int i, ret =3D 0; + int i; struct arm_smmu_master *master; + struct device_node *dev_node =3D dev_get_dev_node(dev); =20 - master =3D find_smmu_master(smmu, masterspec->np); + master =3D find_smmu_master(smmu, dev_node); if (master) { dev_err(dev, "rejecting multiple registrations for master device %s\n", - masterspec->np->name); + dev_node->name); return -EBUSY; } =20 master =3D devm_kzalloc(dev, sizeof(*master), GFP_KERNEL); if (!master) return -ENOMEM; - master->of_node =3D masterspec->np; =20 - ret =3D iommu_fwspec_init(&master->of_node->dev, smmu->dev); - if (ret) { - kfree(master); - return ret; - } - master->cfg.fwspec =3D dev_iommu_fwspec_get(&master->of_node->dev); - - /* adding the ids here */ - ret =3D iommu_fwspec_add_ids(&masterspec->np->dev, - masterspec->args, - masterspec->args_count); - if (ret) - return ret; + master->of_node =3D dev_node; + master->cfg.fwspec =3D fwspec; =20 /* Xen: Let Xen know that the device is protected by an SMMU */ - dt_device_set_protected(masterspec->np); + dt_device_set_protected(dev_node); =20 if (!(smmu->features & ARM_SMMU_FEAT_STREAM_MATCH)) { - for (i =3D 0; i < master->cfg.fwspec->num_ids; ++i) { - if (masterspec->args[i] >=3D smmu->num_mapping_groups) { + for (i =3D 0; i < fwspec->num_ids; ++i) { + if (fwspec->ids[i] >=3D smmu->num_mapping_groups) { dev_err(dev, "stream ID for master device %s greater than maximum allowed (%d)\n", - masterspec->np->name, smmu->num_mapping_groups); + dev_node->name, smmu->num_mapping_groups); return -ERANGE; } } } + return insert_smmu_master(smmu, master); } =20 +static int arm_smmu_dt_add_device_generic(u8 devfn, struct device *dev) +{ + struct arm_smmu_device *smmu; + struct iommu_fwspec *fwspec; + + fwspec =3D dev_iommu_fwspec_get(dev); + if (fwspec =3D=3D NULL) + return -ENXIO; + + smmu =3D (struct arm_smmu_device *) find_smmu(fwspec->iommu_dev); + if (smmu =3D=3D NULL) + return -ENXIO; + + return arm_smmu_dt_add_device_legacy(smmu, dev, fwspec); +} + +static int arm_smmu_dt_xlate_generic(struct device *dev, + const struct of_phandle_args *spec) +{ + uint32_t mask, fwid =3D 0; + + if (spec->args_count > 0) + fwid |=3D ((SMR_ID_MASK << SMR_ID_SHIFT) & spec->args[0]) >> SMR_ID_SHIF= T; + + if (spec->args_count > 1) + fwid |=3D ((SMR_MASK_MASK << SMR_MASK_SHIFT) & spec->args[1]) >> SMR_MAS= K_SHIFT; + else if (!of_property_read_u32(spec->np, "stream-match-mask", &mask)) + fwid |=3D ((SMR_MASK_MASK << SMR_MASK_SHIFT) & mask) >> SMR_MASK_SHIFT; + + return iommu_fwspec_add_ids(dev, + &fwid, + 1); +} + +static int register_smmu_master(struct arm_smmu_device *smmu, + struct device *dev, + struct of_phandle_args *masterspec) +{ + int ret =3D 0; + struct iommu_fwspec *fwspec; + + ret =3D iommu_fwspec_init(&masterspec->np->dev, smmu->dev); + if (ret) + return ret; + + fwspec =3D dev_iommu_fwspec_get(&masterspec->np->dev); + + ret =3D iommu_fwspec_add_ids(&masterspec->np->dev, + masterspec->args, + masterspec->args_count); + if (ret) + return ret; + + return arm_smmu_dt_add_device_legacy(smmu, + &masterspec->np->dev, + fwspec); +} + static struct arm_smmu_device *find_smmu_for_device(struct device *dev) { struct arm_smmu_device *smmu; @@ -2743,6 +2793,7 @@ static void arm_smmu_iommu_domain_teardown(struct dom= ain *d) static const struct iommu_ops arm_smmu_iommu_ops =3D { .init =3D arm_smmu_iommu_domain_init, .hwdom_init =3D arm_smmu_iommu_hwdom_init, + .add_device =3D arm_smmu_dt_add_device_generic, .teardown =3D arm_smmu_iommu_domain_teardown, .iotlb_flush =3D arm_smmu_iotlb_flush, .iotlb_flush_all =3D arm_smmu_iotlb_flush_all, @@ -2750,9 +2801,10 @@ static const struct iommu_ops arm_smmu_iommu_ops =3D= { .reassign_device =3D arm_smmu_reassign_dev, .map_page =3D arm_iommu_map_page, .unmap_page =3D arm_iommu_unmap_page, + .dt_xlate =3D arm_smmu_dt_xlate_generic, }; =20 -static __init const struct arm_smmu_device *find_smmu(const struct device = *dev) +static const struct arm_smmu_device *find_smmu(const struct device *dev) { struct arm_smmu_device *smmu; bool found =3D false; diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index acf6b62..dd9cf65 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -158,22 +158,7 @@ int iommu_add_dt_device(struct dt_device_node *np) * these callback implemented. */ if ( !ops->add_device || !ops->dt_xlate ) - { - /* - * Some Device Trees may expose both legacy SMMU and generic - * IOMMU bindings together. However, the SMMU driver is only - * supporting the former and will protect them during the - * initialization. So we need to skip them and not return - * error here. - * - * XXX: This can be dropped when the SMMU is able to deal - * with generic bindings. - */ - if ( dt_device_is_protected(np) ) - return 0; - else - return -EINVAL; - } + return -EINVAL; =20 if ( !dt_device_is_available(iommu_spec.np) ) break; --=20 2.7.4