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x-sender="postmaster@mail.citrix.com"; x-conformance=sidf_compatible IronPort-SDR: lD+8Cm8wOuf2tc8jvmP2ouhk8vq2MFWUr32k5wd0hkZNEtEdd96l50UOAZwenOd3MVcLisIKo6 TawlJleG2+FbuOpbNe9Y7UGRpc31tz0VKPxI1WhH+cBN4pJ+jzhgTjU3jc4fVH/S1WhRzR18V7 Kg2quwyoKyfxgvfkEsBeqaDltL8MQk3LdNVce1Y01uTMsVIcGqx8WaYpGkxmz47LKEZ9NMbqmO RGF/9NMfsgKN4n0cyXMLevql4KeSoUMuSm4QfFP86nWqzxLAn2SHwLKlcW2ydl8LQ6z+5BR+Zj 9w4= X-SBRS: 2.7 X-MesageID: 11277150 X-Ironport-Server: esa5.hc3370-68.iphmx.com X-Remote-IP: 162.221.158.21 X-Policy: $RELAYED X-IronPort-AV: E=Sophos;i="5.70,320,1574139600"; d="scan'208";a="11277150" From: Igor Druzhinin To: Date: Tue, 14 Jan 2020 19:36:21 +0000 Message-ID: <1579030581-7929-1-git-send-email-igor.druzhinin@citrix.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Subject: [Xen-devel] [PATCH] x86/time: update TSC stamp on restore from deep C-state X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andrew.cooper3@citrix.com, Igor Druzhinin , wl@xen.org, jbeulich@suse.com, roger.pau@citrix.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) If ITSC is not available on CPU (e.g if running nested as PV shim) then X86_FEATURE_NONSTOP_TSC is not advertised in certain cases, i.e. all AMD and some old Intel processors. In which case TSC would need to be restored on CPU from platform time by Xen upon exiting deep C-states. As platform time might be behind the last TSC stamp recorded for the current CPU, invariant of TSC stamp being always behind local TSC counter is violated. This has an effect of get_s_time() going negative resulting in eventual system hang or crash. Fix this issue by updating local TSC stamp along with TSC counter write. Signed-off-by: Igor Druzhinin Acked-by: Jan Beulich Reviewed-by: Roger Pau Monn=C3=A9 --- This caused reliable hangs of shim domains with multiple vCPUs on all AMD systems. The problem got also reproduced on bare-metal by artifically masking ITSC feature bit. The proposed fix has been verified for both cases. --- xen/arch/x86/time.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c index e79cb4d..f6b26f8 100644 --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -955,10 +955,16 @@ u64 stime2tsc(s_time_t stime) =20 void cstate_restore_tsc(void) { + struct cpu_time *t =3D &this_cpu(cpu_time); + if ( boot_cpu_has(X86_FEATURE_NONSTOP_TSC) ) return; =20 - write_tsc(stime2tsc(read_platform_stime(NULL))); + t->stamp.master_stime =3D read_platform_stime(NULL); + t->stamp.local_tsc =3D stime2tsc(t->stamp.master_stime); + t->stamp.local_stime =3D t->stamp.master_stime; + + write_tsc(t->stamp.local_tsc); } =20 /*************************************************************************= ** --=20 2.7.4 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel