From nobody Mon Feb 9 12:14:56 2026 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org ARC-Seal: i=1; a=rsa-sha256; t=1555172700; cv=none; d=zoho.com; s=zohoarc; b=j3KKEWz7OdWmQWyKXEIsfs25BZgl+14XKAzEYa7tlKhs5XwihBK/OWzmgLbRwZgSMvpU3W0jcSpFDHxDeOH2sQ5n7ZVVkDLMiO5S8OaYxsQTQnrfG7Upzg4tiPE/47sKCR2nBNMeIBT5flx5xxuqBClMkDAK7dwynOTAvB2vTGw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1555172700; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=QUvkptgiM4uk/nwq7edo1CUXWXklb/h06X2hnu1i7rU=; b=ZG3YSpjBMGqt/OigoWxlgWfVW10xPGmyb7dtu61rLGck2sD7Oxmvmu2c7W30qxfxfZOa5e0ThCkRBh/lZM3VE0dwI6ifQFj0N50xyDJ5K8dxHOho2wM6S0TK3LdSU5c+UrmGrVYrKpUaS6fNlMfg+ytU7yF0HeLGeuYMJRxpvCk= ARC-Authentication-Results: i=1; mx.zoho.com; spf=none (zoho.com: 192.237.175.120 is neither permitted nor denied by domain of lists.xenproject.org) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 155517270000761.40277039748332; Sat, 13 Apr 2019 09:25:00 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hFLRK-0005FO-Mi; Sat, 13 Apr 2019 16:23:38 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hFLRJ-0005F8-Bk for xen-devel@lists.xenproject.org; Sat, 13 Apr 2019 16:23:37 +0000 Received: from SMTP03.CITRIX.COM (unknown [162.221.156.55]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 7cd49322-5e08-11e9-92d7-bc764e045a96; Sat, 13 Apr 2019 16:23:36 +0000 (UTC) X-Inumbo-ID: 7cd49322-5e08-11e9-92d7-bc764e045a96 X-IronPort-AV: E=Sophos;i="5.60,345,1549929600"; d="scan'208";a="83508406" From: Andrew Cooper To: Xen-devel Date: Sat, 13 Apr 2019 17:22:11 +0100 Message-ID: <1555172532-23814-3-git-send-email-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1555172532-23814-1-git-send-email-andrew.cooper3@citrix.com> References: <1555172532-23814-1-git-send-email-andrew.cooper3@citrix.com> MIME-Version: 1.0 Subject: [Xen-devel] [PATCH 2/3] x86/msr: Definitions for MSR_INTEL_CORE_THREAD_COUNT X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Wei Liu , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" This is a model specific register which details the current configuration cores and threads in the package. Because of how Hyperthread and Core configuration works works in firmware, the MSR it is de-facto constant and will remain unchanged until the next system reset. It is a read only MSR, and for now, reject guest attempts to read it, to av= oid the system setting leaking into guest context. Further CPUID/MSR work is required before we can start virtualising a consistent topology to the gues= t. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- CC: Jan Beulich CC: Wei Liu CC: Roger Pau Monn=C3=A9 Observant people will notice that in the latest SDM at the time of writing, version 069, this MSR is listed in single table for Haswell generation Xeon= 's, and that the thread and core count fields are the wrong way around. I'm informed that this MSR has existed since the Nehalem era (except for so= me of the early in-order Atoms), has had consistent behaviour in that time, and that the documentation will be addressed in future SDM revisions. --- xen/arch/x86/msr.c | 2 ++ xen/include/asm-x86/msr-index.h | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 815d599..948d07d 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -131,6 +131,7 @@ int guest_rdmsr(const struct vcpu *v, uint32_t msr, uin= t64_t *val) case MSR_PRED_CMD: case MSR_FLUSH_CMD: /* Write-only */ + case MSR_INTEL_CORE_THREAD_COUNT: case MSR_TSX_FORCE_ABORT: /* Not offered to guests. */ goto gp_fault; @@ -267,6 +268,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t = val) { uint64_t rsvd; =20 + case MSR_INTEL_CORE_THREAD_COUNT: case MSR_INTEL_PLATFORM_INFO: case MSR_ARCH_CAPABILITIES: /* Read-only */ diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-inde= x.h index 11512d4..389f95f 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -32,6 +32,10 @@ #define EFER_KNOWN_MASK (EFER_SCE | EFER_LME | EFER_LMA | EFER_NX | \ EFER_SVME | EFER_FFXSE) =20 +#define MSR_INTEL_CORE_THREAD_COUNT 0x00000035 +#define MSR_CTC_THREAD_MASK 0x0000ffff +#define MSR_CTC_CORE_MASK 0xffff0000 + /* Speculation Controls. */ #define MSR_SPEC_CTRL 0x00000048 #define SPEC_CTRL_IBRS (_AC(1, ULL) << 0) --=20 2.1.4 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel