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Message-ID: <116bb94f-955c-4c46-f16a-d7a5e1cc72b5@suse.com> Date: Tue, 18 Apr 2023 11:24:19 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 From: Jan Beulich Subject: [PATCH v6] x86: detect CMOS aliasing on ports other than 0x70/0x71 To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Paul Durrant , Wei Liu , =?UTF-8?Q?Roger_Pau_Monn=c3=a9?= References: <5426dd6f-50cd-dc23-5c6b-0ab631d98d38@suse.com> Content-Language: en-US In-Reply-To: <5426dd6f-50cd-dc23-5c6b-0ab631d98d38@suse.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: FRYP281CA0003.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10::13) To VE1PR04MB6560.eurprd04.prod.outlook.com (2603:10a6:803:122::25) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VE1PR04MB6560:EE_|AM7PR04MB7189:EE_ X-MS-Office365-Filtering-Correlation-Id: a887c8ee-cec8-40e4-09ea-08db3feeb126 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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charset="utf-8" ... in order to also intercept Dom0 accesses through the alias ports. Also stop intercepting accesses to the CMOS ports if we won't ourselves use the CMOS RTC, because of there being none. Note that rtc_init() deliberately uses 16 as the upper loop bound, despite probe_cmos_alias() using 8: The higher bound is benign now, but would save us touching the code (or, worse, missing to touch it) in case the lower one was doubled. Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monn=C3=A9 --- v6: Restore lost "return" in rtc_init(). Convert printk() to dprintk() in probe_cmos_alias(). Correct is_cmos_port() for hwdom. v5: Simplify logic in is_cmos_port(). Limit the scope of a local variable. Adjust a comment that's being moved. v4: Also conditionally mask top bit for guest index port accesses. Add missing adjustments to rtc_init(). Re-work to avoid recursive read_lock(). Also adjust guest_io_{read,write}(). Re-base. v3: Re-base over change to earlier patch. v2: Re-base. --- a/xen/arch/x86/hvm/rtc.c +++ b/xen/arch/x86/hvm/rtc.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #include =20 @@ -836,9 +836,19 @@ void rtc_init(struct domain *d) =20 if ( !has_vrtc(d) ) { - if ( is_hardware_domain(d) ) - /* Hardware domain gets mediated access to the physical RTC. */ - register_portio_handler(d, RTC_PORT(0), 2, hw_rtc_io); + unsigned int port; + + if ( !is_hardware_domain(d) ) + return; + + /* + * Hardware domain gets mediated access to the physical RTC/CMOS (= of + * course unless we don't use it ourselves, for there being none). + */ + for ( port =3D RTC_PORT(0); port < RTC_PORT(0) + 0x10; port +=3D 2= ) + if ( is_cmos_port(port, 2, d) ) + register_portio_handler(d, port, 2, hw_rtc_io); + return; } =20 --- a/xen/arch/x86/include/asm/mc146818rtc.h +++ b/xen/arch/x86/include/asm/mc146818rtc.h @@ -9,6 +9,10 @@ =20 extern spinlock_t rtc_lock; /* serialize CMOS RAM access */ =20 +struct domain; +bool is_cmos_port(unsigned int port, unsigned int bytes, + const struct domain *d); + /********************************************************************** * register summary **********************************************************************/ --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -208,7 +208,7 @@ static bool admin_io_okay(unsigned int p return false; =20 /* We also never permit direct access to the RTC/CMOS registers. */ - if ( port <=3D RTC_PORT(1) && port + bytes > RTC_PORT(0) ) + if ( is_cmos_port(port, bytes, d) ) return false; =20 return ioports_access_permitted(d, port, port + bytes - 1); @@ -278,7 +278,7 @@ static uint32_t guest_io_read(unsigned i { sub_data =3D pv_pit_handler(port, 0, 0); } - else if ( port =3D=3D RTC_PORT(0) || port =3D=3D RTC_PORT(1) ) + else if ( is_cmos_port(port, 1, currd) ) { sub_data =3D rtc_guest_read(port); } @@ -424,7 +424,7 @@ static void guest_io_write(unsigned int { pv_pit_handler(port, (uint8_t)data, 1); } - else if ( port =3D=3D RTC_PORT(0) || port =3D=3D RTC_PORT(1) ) + else if ( is_cmos_port(port, 1, currd) ) { rtc_guest_write(port, data); } --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -2130,37 +2130,36 @@ int __hwdom_init xen_in_range(unsigned l static int __hwdom_init cf_check io_bitmap_cb( unsigned long s, unsigned long e, void *ctx) { - struct domain *d =3D ctx; + const struct domain *d =3D ctx; unsigned int i; =20 ASSERT(e <=3D INT_MAX); for ( i =3D s; i <=3D e; i++ ) - __clear_bit(i, d->arch.hvm.io_bitmap); + /* + * Accesses to RTC ports also need to be trapped in order to keep + * consistency with hypervisor accesses. + */ + if ( !is_cmos_port(i, 1, d) ) + __clear_bit(i, d->arch.hvm.io_bitmap); =20 return 0; } =20 void __hwdom_init setup_io_bitmap(struct domain *d) { - int rc; + if ( !is_hvm_domain(d) ) + return; =20 - if ( is_hvm_domain(d) ) - { - bitmap_fill(d->arch.hvm.io_bitmap, 0x10000); - rc =3D rangeset_report_ranges(d->arch.ioport_caps, 0, 0x10000, - io_bitmap_cb, d); - BUG_ON(rc); - /* - * NB: we need to trap accesses to 0xcf8 in order to intercept - * 4 byte accesses, that need to be handled by Xen in order to - * keep consistency. - * Access to 1 byte RTC ports also needs to be trapped in order - * to keep consistency with PV. - */ - __set_bit(0xcf8, d->arch.hvm.io_bitmap); - __set_bit(RTC_PORT(0), d->arch.hvm.io_bitmap); - __set_bit(RTC_PORT(1), d->arch.hvm.io_bitmap); - } + bitmap_fill(d->arch.hvm.io_bitmap, 0x10000); + if ( rangeset_report_ranges(d->arch.ioport_caps, 0, 0x10000, + io_bitmap_cb, d) ) + BUG(); + + /* + * We need to trap 4-byte accesses to 0xcf8 (see admin_io_okay(), + * guest_io_read(), and guest_io_write()). + */ + __set_bit(0xcf8, d->arch.hvm.io_bitmap); } =20 /* --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -1234,7 +1234,10 @@ static unsigned long get_cmos_time(void) if ( seconds < 60 ) { if ( rtc.sec !=3D seconds ) + { cmos_rtc_probe =3D false; + acpi_gbl_FADT.boot_flags &=3D ~ACPI_FADT_NO_CMOS_RTC; + } break; } =20 @@ -1249,6 +1252,79 @@ static unsigned long get_cmos_time(void) return mktime(rtc.year, rtc.mon, rtc.day, rtc.hour, rtc.min, rtc.sec); } =20 +static unsigned int __ro_after_init cmos_alias_mask; + +static int __init cf_check probe_cmos_alias(void) +{ + unsigned int offs; + + if ( acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC ) + return 0; + + for ( offs =3D 2; offs < 8; offs <<=3D 1 ) + { + unsigned int i; + bool read =3D true; + + for ( i =3D RTC_REG_D + 1; i < 0x80; ++i ) + { + uint8_t normal, alt; + unsigned long flags; + + if ( i =3D=3D acpi_gbl_FADT.century ) + continue; + + spin_lock_irqsave(&rtc_lock, flags); + + normal =3D CMOS_READ(i); + if ( inb(RTC_PORT(offs)) !=3D i ) + read =3D false; + + alt =3D inb(RTC_PORT(offs + 1)); + + spin_unlock_irqrestore(&rtc_lock, flags); + + if ( normal !=3D alt ) + break; + + process_pending_softirqs(); + } + if ( i =3D=3D 0x80 ) + { + cmos_alias_mask |=3D offs; + dprintk(XENLOG_INFO, "CMOS aliased at %02x, index %s\n", + RTC_PORT(offs), read ? "r/w" : "w/o"); + } + } + + return 0; +} +__initcall(probe_cmos_alias); + +bool is_cmos_port(unsigned int port, unsigned int bytes, const struct doma= in *d) +{ + unsigned int offs; + + if ( !is_hardware_domain(d) ) + return port <=3D RTC_PORT(1) && port + bytes > RTC_PORT(0); + + if ( acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC ) + return false; + + if ( port <=3D RTC_PORT(1) && port + bytes > RTC_PORT(0) ) + return true; + + for ( offs =3D 2; offs <=3D cmos_alias_mask; offs <<=3D 1 ) + { + if ( !(offs & cmos_alias_mask) ) + continue; + if ( port <=3D RTC_PORT(offs | 1) && port + bytes > RTC_PORT(offs)= ) + return true; + } + + return false; +} + /* Helpers for guest accesses to the physical RTC. */ unsigned int rtc_guest_read(unsigned int port) { @@ -1256,23 +1332,25 @@ unsigned int rtc_guest_read(unsigned int unsigned long flags; unsigned int data =3D ~0; =20 - switch ( port ) + switch ( port & ~cmos_alias_mask ) { case RTC_PORT(0): /* * All PV domains (and PVH dom0) are allowed to read the latched v= alue * of the first RTC port, as there's no access to the physical IO - * ports. + * ports. Note that we return the index value regardless of wheth= er + * underlying hardware would permit doing so. */ - data =3D currd->arch.cmos_idx; + data =3D currd->arch.cmos_idx & (0xff >> (port =3D=3D RTC_PORT(0))= ); break; =20 case RTC_PORT(1): - if ( !ioports_access_permitted(currd, RTC_PORT(0), RTC_PORT(1)) ) + if ( !ioports_access_permitted(currd, port - 1, port) ) break; spin_lock_irqsave(&rtc_lock, flags); - outb(currd->arch.cmos_idx & 0x7f, RTC_PORT(0)); - data =3D inb(RTC_PORT(1)); + outb(currd->arch.cmos_idx & (0xff >> (port =3D=3D RTC_PORT(1))), + port - 1); + data =3D inb(port); spin_unlock_irqrestore(&rtc_lock, flags); break; =20 @@ -1288,9 +1366,10 @@ void rtc_guest_write(unsigned int port, struct domain *currd =3D current->domain; unsigned long flags; =20 - switch ( port ) + switch ( port & ~cmos_alias_mask ) { typeof(pv_rtc_handler) hook; + unsigned int idx; =20 case RTC_PORT(0): /* @@ -1298,20 +1377,22 @@ void rtc_guest_write(unsigned int port, * value of the first RTC port, as there's no access to the physic= al IO * ports. */ - currd->arch.cmos_idx =3D data; + currd->arch.cmos_idx =3D data & (0xff >> (port =3D=3D RTC_PORT(0))= ); break; =20 case RTC_PORT(1): - if ( !ioports_access_permitted(currd, RTC_PORT(0), RTC_PORT(1)) ) + if ( !ioports_access_permitted(currd, port - 1, port) ) break; =20 + idx =3D currd->arch.cmos_idx & (0xff >> (port =3D=3D RTC_PORT(1))); + hook =3D ACCESS_ONCE(pv_rtc_handler); if ( hook ) - hook(currd->arch.cmos_idx & 0x7f, data); + hook(idx, data); =20 spin_lock_irqsave(&rtc_lock, flags); - outb(currd->arch.cmos_idx & 0x7f, RTC_PORT(0)); - outb(data, RTC_PORT(1)); + outb(idx, port - 1); + outb(data, port); spin_unlock_irqrestore(&rtc_lock, flags); break;