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Thu, 20 Aug 2026 01:52:10 -0700 (PDT) Message-ID: <04b55ed1-1103-483f-9bca-72b8955f6cdf@suse.com> Date: Thu, 20 Aug 2026 10:52:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 1/2] x86emul: latch XCR0 early during decode From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Andrew Mbugua References: <0c3cb1ae-4888-4319-a348-263f7913a7f2@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <0c3cb1ae-4888-4319-a348-263f7913a7f2@suse.com> Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-bad1c0/1787215930-BCCCF034-2A0849DB/0/0 X-purgate-type: clean X-purgate-size: 4680 X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1787215952152158500 Content-Type: text/plain; charset="utf-8" We'll need to consult it to decide whether to treat 0xD5 as a REX2 prefix, and whether to recognize extended EVEX encodings. Utilize this in adjust_bnd() right away, but leave leveraging in x86emul_get_fpu() for a separate change. Signed-off-by: Jan Beulich --- While not directly relevant in this series, should we perhaps latch CR4 into the state structure as well right away, since we need to read it here anyway? --- a/xen/arch/x86/x86_emulate/decode.c +++ b/xen/arch/x86/x86_emulate/decode.c @@ -1036,6 +1036,24 @@ int x86emul_decode(struct x86_emulate_st #endif } =20 + /* Latch XCR0, if available. */ + if ( ops->read_cr && ops->read_xcr ) + { + unsigned long cr4; + + rc =3D ops->read_cr(4, &cr4, ctxt); + if ( rc =3D=3D X86EMUL_OKAY && (cr4 & X86_CR4_OSXSAVE) && + ops->read_xcr(0, &s->xcr0, ctxt) !=3D X86EMUL_OKAY ) + s->xcr0 =3D 0; + + /* + * To ease consuming, strip 64-bit-only state right away for non-6= 4-bit + * environments. + */ + if ( !mode_64bit() ) + s->xcr0 &=3D ~(X86_XCR0_TILE_CFG | X86_XCR0_TILE_DATA); + } + /* Prefix bytes. */ for ( ; ; ) { --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -334,6 +334,8 @@ struct x86_emulate_state { =20 unsigned long ip; =20 + uint64_t xcr0; + struct stub_exn *stub_exn; =20 #ifndef NDEBUG --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1234,17 +1234,17 @@ static bool is_branch_step(struct x86_em return debugctl & IA32_DEBUGCTLMSR_BTF; } =20 -static void adjust_bnd(struct x86_emulate_ctxt *ctxt, +static void adjust_bnd(const struct x86_emulate_state *s, + struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops, enum vex_pfx pfx) { - uint64_t xcr0, bndcfg; + uint64_t bndcfg; int rc; =20 if ( pfx =3D=3D vex_f2 || !cpu_has_mpx || !vcpu_has_mpx() ) return; =20 - if ( !ops->read_xcr || ops->read_xcr(0, &xcr0, ctxt) !=3D X86EMUL_OKAY= || - !(xcr0 & X86_XCR0_BNDREGS) || !(xcr0 & X86_XCR0_BNDCSR) ) + if ( !(s->xcr0 & X86_XCR0_BNDREGS) || !(s->xcr0 & X86_XCR0_BNDCSR) ) { ASSERT(!ctxt->event_pending); return; @@ -1952,7 +1952,7 @@ x86_emulate( case 0x70 ... 0x7f: /* jcc (short) */ if ( test_cc(b, _regs.eflags) ) jmp_rel((int32_t)src.val); - adjust_bnd(ctxt, ops, vex.pfx); + adjust_bnd(state, ctxt, ops, vex.pfx); break; =20 case 0x80: case 0x81: case 0x82: case 0x83: /* Grp1 */ @@ -2363,7 +2363,7 @@ x86_emulate( (rc =3D ops->insn_fetch(dst.val, NULL, 0, ctxt)) ) goto done; _regs.r(ip) =3D dst.val; - adjust_bnd(ctxt, ops, vex.pfx); + adjust_bnd(state, ctxt, ops, vex.pfx); break; =20 case 0xc4: /* les */ @@ -2594,7 +2594,7 @@ x86_emulate( op_bytes =3D ((op_bytes =3D=3D 4) && mode_64bit()) ? 8 : op_bytes; src.val =3D _regs.r(ip); jmp_rel(rel); - adjust_bnd(ctxt, ops, vex.pfx); + adjust_bnd(state, ctxt, ops, vex.pfx); goto push; } =20 @@ -2602,7 +2602,7 @@ x86_emulate( case 0xeb: /* jmp (short) */ jmp_rel((int32_t)src.val); if ( !(b & 2) ) - adjust_bnd(ctxt, ops, vex.pfx); + adjust_bnd(state, ctxt, ops, vex.pfx); break; =20 case 0xea: /* jmp (far, absolute) */ @@ -2885,14 +2885,14 @@ x86_emulate( goto done; _regs.r(ip) =3D src.val; src.val =3D dst.val; - adjust_bnd(ctxt, ops, vex.pfx); + adjust_bnd(state, ctxt, ops, vex.pfx); goto push; case 4: /* jmp (near) */ if ( (rc =3D ops->insn_fetch(src.val, NULL, 0, ctxt)) ) goto done; _regs.r(ip) =3D src.val; dst.type =3D OP_NONE; - adjust_bnd(ctxt, ops, vex.pfx); + adjust_bnd(state, ctxt, ops, vex.pfx); break; case 3: /* call (far, absolute indirect) */ case 5: /* jmp (far, absolute indirect) */ @@ -4981,7 +4981,7 @@ x86_emulate( case X86EMUL_OPC(0x0f, 0x80) ... X86EMUL_OPC(0x0f, 0x8f): /* jcc (near= ) */ if ( test_cc(b, _regs.eflags) ) jmp_rel((int32_t)src.val); - adjust_bnd(ctxt, ops, vex.pfx); + adjust_bnd(state, ctxt, ops, vex.pfx); break; =20 case X86EMUL_OPC(0x0f, 0x90) ... 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Thu, 20 Aug 2026 01:52:32 -0700 (PDT) Message-ID: <39a438f2-e54f-4975-952e-cfcd101c8050@suse.com> Date: Thu, 20 Aug 2026 10:52:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 2/2] x86emul: use latched XCR0 in x86emul_get_fpu() From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Andrew Mbugua References: <0c3cb1ae-4888-4319-a348-263f7913a7f2@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <0c3cb1ae-4888-4319-a348-263f7913a7f2@suse.com> Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1787215952-504DBB50-80ADE671/0/0 X-purgate-type: clean X-purgate-size: 3770 X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1787215973908158500 Content-Type: text/plain; charset="utf-8" Avoid re-reading, and instead pass state into the function. For get_fpu() to use "s" as new argument, we need a new local variable in x86_emulate() though. Signed-off-by: Jan Beulich --- That new local "s" can likely be leveraged to replace explicit uses of "state" in the function (past the point where the alias #define is). Long term we probably want to aim at consistently using "s" everywhere where a struct x86_emulate_state * variable/parameter is needed. x86emul_get_fpu() isn't using "s" right away just because that would end up inconsistent with adjacent code (put_fpu() first and foremost). I could certainly change that. --- a/xen/arch/x86/x86_emulate/private.h +++ b/xen/arch/x86/x86_emulate/private.h @@ -743,12 +743,13 @@ int x86emul_get_cpl(struct x86_emulate_c const struct x86_emulate_ops *ops); =20 int x86emul_get_fpu(enum x86_emulate_fpu_type type, + const struct x86_emulate_state *state, struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops); =20 #define get_fpu(type) \ do { \ - rc =3D x86emul_get_fpu(fpu_type =3D (type), ctxt, ops); \ + rc =3D x86emul_get_fpu(fpu_type =3D (type), s, ctxt, ops); \ if ( rc ) goto done; \ } while (0) =20 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -394,36 +394,30 @@ do { =20 int x86emul_get_fpu( enum x86_emulate_fpu_type type, + const struct x86_emulate_state *state, struct x86_emulate_ctxt *ctxt, const struct x86_emulate_ops *ops) { - uint64_t xcr0; int rc; =20 fail_if(!ops->get_fpu); ASSERT(type !=3D X86EMUL_FPU_none); =20 - if ( type < X86EMUL_FPU_ymm || !ops->read_xcr || - ops->read_xcr(0, &xcr0, ctxt) !=3D X86EMUL_OKAY ) - { - ASSERT(!ctxt->event_pending); - xcr0 =3D 0; - } - switch ( type ) { case X86EMUL_FPU_zmm: - if ( !(xcr0 & X86_XCR0_ZMM) || !(xcr0 & X86_XCR0_HI_ZMM) || - !(xcr0 & X86_XCR0_OPMASK) ) + if ( !(state->xcr0 & X86_XCR0_ZMM) || + !(state->xcr0 & X86_XCR0_HI_ZMM) || + !(state->xcr0 & X86_XCR0_OPMASK) ) return X86EMUL_UNHANDLEABLE; /* fall through */ case X86EMUL_FPU_ymm: - if ( !(xcr0 & X86_XCR0_SSE) || !(xcr0 & X86_XCR0_YMM) ) + if ( !(state->xcr0 & X86_XCR0_SSE) || !(state->xcr0 & X86_XCR0_YMM= ) ) return X86EMUL_UNHANDLEABLE; break; =20 case X86EMUL_FPU_opmask: - if ( !(xcr0 & X86_XCR0_SSE) || !(xcr0 & X86_XCR0_OPMASK) ) + if ( !(state->xcr0 & X86_XCR0_SSE) || !(state->xcr0 & X86_XCR0_OPM= ASK) ) return X86EMUL_UNHANDLEABLE; break; =20 @@ -1310,7 +1304,7 @@ x86_emulate( /* Shadow copy of register state. Committed on successful emulation. */ struct cpu_user_regs _regs =3D *ctxt->regs; const struct cpu_policy *__maybe_unused cp =3D ctxt->cpu_policy; - struct x86_emulate_state state; + struct x86_emulate_state state, *s =3D &state; int rc; uint8_t b, d, *opc =3D NULL; unsigned int first_byte =3D 0, elem_bytes, insn_bytes =3D 0; @@ -1439,7 +1433,7 @@ x86_emulate( /* With a memory operand, fetch the mask register in use (if any). */ if ( ea.type =3D=3D OP_MEM && evex.opmsk && x86emul_get_fpu(fpu_type =3D X86EMUL_FPU_opmask, - ctxt, ops) =3D=3D X86EMUL_OKAY ) + s, ctxt, ops) =3D=3D X86EMUL_OKAY ) { uint8_t *stb =3D get_stub(stub);