[SeaBIOS] [PATCH] e820: Add E820_SOFT_RESERVED type support

fanhuang via SeaBIOS posted 1 patch 2 weeks, 2 days ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/seabios tags/patchew/20260508035040.3022445-1-FangSheng.Huang@amd.com
src/e820map.h     |  1 +
src/fw/paravirt.c | 14 ++++++++++++++
2 files changed, 15 insertions(+)
[SeaBIOS] [PATCH] e820: Add E820_SOFT_RESERVED type support
Posted by fanhuang via SeaBIOS 2 weeks, 2 days ago
Add support for E820 Soft Reserved Memory type which is used by QEMU
to expose Specific Purpose Memory (SPM) regions.

Changes:
- Define E820_SOFT_RESERVED in e820map.h
- Handle E820_SOFT_RESERVED in qemu_early_e820()

Signed-off-by: FangSheng Huang <FangSheng.Huang@amd.com>
---
 src/e820map.h     |  1 +
 src/fw/paravirt.c | 14 ++++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/src/e820map.h b/src/e820map.h
index 07ce16ec..a46fcc42 100644
--- a/src/e820map.h
+++ b/src/e820map.h
@@ -8,6 +8,7 @@
 #define E820_ACPI         3
 #define E820_NVS          4
 #define E820_UNUSABLE     5
+#define E820_SOFT_RESERVED  0xEFFFFFFF
 
 struct e820entry {
     u64 start;
diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c
index e5d4eca0..802e30d0 100644
--- a/src/fw/paravirt.c
+++ b/src/fw/paravirt.c
@@ -768,6 +768,20 @@ static int qemu_early_e820(void)
             dprintf(1, "qemu/e820: addr 0x%016llx len 0x%016llx [reserved]\n",
                     table.address, table.length);
             break;
+        case E820_SOFT_RESERVED:
+            e820_add(table.address, table.length, table.type);
+            dprintf(1, "qemu/e820: addr 0x%016llx len 0x%016llx [soft reserved]\n",
+                    table.address, table.length);
+            if (table.address < 0x100000000LL) {
+                // below 4g
+                if (RamSize < table.address + table.length)
+                    RamSize = table.address + table.length;
+            } else {
+                // above 4g
+                if (RamSizeOver4G < table.address + table.length - 0x100000000LL)
+                    RamSizeOver4G = table.address + table.length - 0x100000000LL;
+            }
+            break;
         case E820_RAM:
             e820_add(table.address, table.length, table.type);
             dprintf(1, "qemu/e820: addr 0x%016llx len 0x%016llx [RAM]\n",
-- 
2.34.1

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[SeaBIOS] Re: [PATCH] e820: Add E820_SOFT_RESERVED type support
Posted by Gerd Hoffmann via SeaBIOS 2 weeks, 2 days ago
> diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c
> index e5d4eca0..802e30d0 100644
> --- a/src/fw/paravirt.c
> +++ b/src/fw/paravirt.c
> @@ -768,6 +768,20 @@ static int qemu_early_e820(void)
>              dprintf(1, "qemu/e820: addr 0x%016llx len 0x%016llx [reserved]\n",
>                      table.address, table.length);
>              break;
> +        case E820_SOFT_RESERVED:
> +            e820_add(table.address, table.length, table.type);
> +            dprintf(1, "qemu/e820: addr 0x%016llx len 0x%016llx [soft reserved]\n",
> +                    table.address, table.length);
> +            if (table.address < 0x100000000LL) {
> +                // below 4g
> +                if (RamSize < table.address + table.length)
> +                    RamSize = table.address + table.length;
> +            } else {
> +                // above 4g
> +                if (RamSizeOver4G < table.address + table.length - 0x100000000LL)
> +                    RamSizeOver4G = table.address + table.length - 0x100000000LL;
> +            }
> +            break;

Why do you update RamSize + RamSizeOver4G?  Shouldn't this be handled
more like E820_RESERVED?

take care,
  Gerd

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[SeaBIOS] Re: [PATCH] e820: Add E820_SOFT_RESERVED type support
Posted by Huang, FangSheng (Jerry) via SeaBIOS 2 weeks, 2 days ago

On 5/8/2026 3:34 PM, Gerd Hoffmann wrote:
> [You don't often get email from kraxel@redhat.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
> 
>> diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c
>> index e5d4eca0..802e30d0 100644
>> --- a/src/fw/paravirt.c
>> +++ b/src/fw/paravirt.c
>> @@ -768,6 +768,20 @@ static int qemu_early_e820(void)
>>               dprintf(1, "qemu/e820: addr 0x%016llx len 0x%016llx [reserved]\n",
>>                       table.address, table.length);
>>               break;
>> +        case E820_SOFT_RESERVED:
>> +            e820_add(table.address, table.length, table.type);
>> +            dprintf(1, "qemu/e820: addr 0x%016llx len 0x%016llx [soft reserved]\n",
>> +                    table.address, table.length);
>> +            if (table.address < 0x100000000LL) {
>> +                // below 4g
>> +                if (RamSize < table.address + table.length)
>> +                    RamSize = table.address + table.length;
>> +            } else {
>> +                // above 4g
>> +                if (RamSizeOver4G < table.address + table.length - 0x100000000LL)
>> +                    RamSizeOver4G = table.address + table.length - 0x100000000LL;
>> +            }
>> +            break;
> 
> Why do you update RamSize + RamSizeOver4G?  Shouldn't this be handled
> more like E820_RESERVED?
> 
> take care,
>    Gerd
> 
Hi Gerd,

The RamSize / RamSizeOver4G update is intentional. SOFT_RESERVED
behaves differently from E820_RESERVED here:

   * E820_RESERVED regions sit *within* the existing RAM range
     (firmware tables, MMIO holes), so they don't change where RAM
     "ends".
   * E820_SOFT_RESERVED (SPM -- driver-managed memory such as HBM
     or CXL exposed to the guest) is real physical memory that
     *extends* the top of RAM. The OS will not allocate from it,
     but the address space is occupied.

That distinction matters for SeaBIOS's 64-bit PCI MMIO window,
which is anchored at end-of-RAM in src/fw/pciinit.c:

     if (r64_mem.base < 0x100000000LL + RamSizeOver4G)
         r64_mem.base = 0x100000000LL + RamSizeOver4G;

If SOFT_RESERVED doesn't bump RamSizeOver4G, SeaBIOS underestimates
where RAM ends and assigns 64-bit BARs into addresses that overlap
the SPM region. I hit exactly this overlap during bring-up testing
with a SOFT_RESERVED region above 4G; updating RamSize /
RamSizeOver4G is what fixes it.

Thanks for the review!

Best regards,
FangSheng Huang (Jerry)



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[SeaBIOS] Re: [PATCH] e820: Add E820_SOFT_RESERVED type support
Posted by Gerd Hoffmann via SeaBIOS 2 weeks, 2 days ago
  Hi,

> That distinction matters for SeaBIOS's 64-bit PCI MMIO window,
> which is anchored at end-of-RAM in src/fw/pciinit.c:
> 
>     if (r64_mem.base < 0x100000000LL + RamSizeOver4G)
>         r64_mem.base = 0x100000000LL + RamSizeOver4G;
> 
> If SOFT_RESERVED doesn't bump RamSizeOver4G, SeaBIOS underestimates
> where RAM ends and assigns 64-bit BARs into addresses that overlap
> the SPM region. I hit exactly this overlap during bring-up testing
> with a SOFT_RESERVED region above 4G; updating RamSize /
> RamSizeOver4G is what fixes it.

Makes sense.  I think you can update RamSizeOver4G unconditionally, the
above / below 4g check doesn't make much sense here.  It is slightly
hacky, because it is not real RAM but only reserves address space.
Given that seabios does run in 32-bit mode and never actually uses
memory above 4G this should not cause any problems.  But please
add a comment explaining this.

thanks,
  Gerd

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