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no-senders; approved; loop; banned-address; header-match-seabios.seabios.org-0; header-match-seabios.seabios.org-1; emergency; member-moderation; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: Jiaxun Yang X-Mailman-Version: 3.3.11b1 Precedence: list Subject: [SeaBIOS] [PATCH v3 7/9] LegacyBios.h: Import from edk2-stable202311 List-Id: SeaBIOS mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable Authentication-Results: coreboot.org; auth=pass smtp.auth=mailman@coreboot.org smtp.mailfrom=seabios-bounces@seabios.org X-Spamd-Bar: ---- X-ZohoMail-DKIM: fail (found 2 invalid signatures) X-ZM-MESSAGEID: 1757391637046124100 Content-Type: text/plain; charset="utf-8" Import from last known EDK2 version with Csm support to leverage various fixes to this header. Signed-off-by: Jiaxun Yang --- src/std/LegacyBios.h | 1972 +++++++++++++++++++++++++---------------------= ---- 1 file changed, 987 insertions(+), 985 deletions(-) diff --git a/src/std/LegacyBios.h b/src/std/LegacyBios.h index 5170c37865fc573d54a06c8b1140a353721daec7..697c4453d66c10eb6ccbc42a9cd= 5dcce9ff449e9 100644 --- a/src/std/LegacyBios.h +++ b/src/std/LegacyBios.h @@ -1,985 +1,987 @@ -/** @file - The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage - under EFI and Legacy OS boot. This file also includes all the related - COMPATIBILIY16 structures and defintions. - - Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow - well known naming conventions. - - Thunk is the code that switches from 32-bit protected environment into t= he 16-bit real-mode - environment. Reverse thunk is the code that does the opposite. - -Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.
-This program and the accompanying materials are licensed and made availabl= e under=20 -the terms and conditions of the BSD License that accompanies this distribu= tion. =20 -The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php. = =20 - =20 -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLI= ED. - - @par Revision Reference: - This protocol is defined in Framework for EFI Compatibility Support Modu= le spec - Version 0.97. - -**/ - -#ifndef _EFI_LEGACY_BIOS_H_ -#define _EFI_LEGACY_BIOS_H_ - -/// -///=20 -/// -#pragma pack(1) - -typedef UINT8 SERIAL_MODE; -typedef UINT8 PARALLEL_MODE; - -#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '= $') - -/// -/// There is a table located within the traditional BIOS in either the 0xF= 000:xxxx or 0xE000:xxxx -/// physical address range. It is located on a 16-byte boundary and provid= es the physical address of the -/// entry point for the Compatibility16 functions. These functions provide= the platform-specific -/// information that is required by the generic EfiCompatibility code. The= functions are invoked via -/// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit= physical -/// entry point. -/// -typedef struct { - /// - /// The string "$EFI" denotes the start of the EfiCompatibility table. B= yte 0 is "I," byte - /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed = as a DWORD or UINT32. - /// - UINT32 Signature; - =20 - /// - /// The value required such that byte checksum of TableLength equals zer= o. - /// - UINT8 TableChecksum; - =20 - /// - /// The length of this table. - /// - UINT8 TableLength; - =20 - /// - /// The major EFI revision for which this table was generated. - ///=20 - UINT8 EfiMajorRevision; - =20 - /// - /// The minor EFI revision for which this table was generated. - /// - UINT8 EfiMinorRevision; - =20 - /// - /// The major revision of this table. - /// - UINT8 TableMajorRevision; - =20 - /// - /// The minor revision of this table. - /// - UINT8 TableMinorRevision; - =20 - /// - /// Reserved for future usage. - /// - UINT16 Reserved; - =20 - /// - /// The segment of the entry point within the traditional BIOS for Compa= tibility16 functions. - /// - UINT16 Compatibility16CallSegment; - =20 - /// - /// The offset of the entry point within the traditional BIOS for Compat= ibility16 functions. - /// - UINT16 Compatibility16CallOffset; - =20 - /// - /// The segment of the entry point within the traditional BIOS for EfiCo= mpatibility=20 - /// to invoke the PnP installation check. - /// - UINT16 PnPInstallationCheckSegment; - =20 - /// - /// The Offset of the entry point within the traditional BIOS for EfiCom= patibility=20 - /// to invoke the PnP installation check. - /// - UINT16 PnPInstallationCheckOffset; - =20 - /// - /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the = IntelPlatform=20 - ///Innovation Framework for EFI Driver Execution Environment Core Interf= ace Specification (DXE CIS). - /// - UINT32 EfiSystemTable;=20 - =20 - /// - /// The address of an OEM-provided identifier string. The string is null= terminated. - /// - UINT32 OemIdStringPointer; - =20 - /// - /// The 32-bit physical address where ACPI RSD PTR is stored within the = traditional - /// BIOS. The remained of the ACPI tables are located at their EFI addre= sses. The size - /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill= in the ACPI - /// RSD PTR with either the ACPI 1.0b or 2.0 values. - /// - UINT32 AcpiRsdPtrPointer; - =20 - /// - /// The OEM revision number. Usage is undefined but provided for OEM mod= ule usage. - /// - UINT16 OemRevision; - =20 - /// - /// The 32-bit physical address where INT15 E820 data is stored within t= he traditional - /// BIOS. The EfiCompatibility code will fill in the E820Pointer value a= nd copy the - /// data to the indicated area. - /// - UINT32 E820Pointer; - =20 - /// - /// The length of the E820 data and is filled in by the EfiCompatibility= code. - /// - UINT32 E820Length; - =20 - /// - /// The 32-bit physical address where the $PIR table is stored in the tr= aditional BIOS. - /// The EfiCompatibility code will fill in the IrqRoutingTablePointer va= lue and - /// copy the data to the indicated area. - /// - UINT32 IrqRoutingTablePointer; - =20 - /// - /// The length of the $PIR table and is filled in by the EfiCompatibilit= y code. - /// - UINT32 IrqRoutingTableLength; - =20 - /// - /// The 32-bit physical address where the MP table is stored in the trad= itional BIOS. - /// The EfiCompatibility code will fill in the MpTablePtr value and copy= the data=20 - /// to the indicated area. - /// - UINT32 MpTablePtr; - =20 - /// - /// The length of the MP table and is filled in by the EfiCompatibility = code. - /// - UINT32 MpTableLength; - =20 - /// - /// The segment of the OEM-specific INT table/code. - ///=20 - UINT16 OemIntSegment; - =20 - /// - /// The offset of the OEM-specific INT table/code. - /// - UINT16 OemIntOffset; - =20 - /// - /// The segment of the OEM-specific 32-bit table/code. - /// - UINT16 Oem32Segment; - =20 - /// - /// The offset of the OEM-specific 32-bit table/code. - /// - UINT16 Oem32Offset; - =20 - /// - /// The segment of the OEM-specific 16-bit table/code. - /// - UINT16 Oem16Segment; - =20 - /// - /// The offset of the OEM-specific 16-bit table/code. - /// - UINT16 Oem16Offset; - =20 - /// - /// The segment of the TPM binary passed to 16-bit CSM. - /// - UINT16 TpmSegment; - =20 - /// - /// The offset of the TPM binary passed to 16-bit CSM. - /// - UINT16 TpmOffset; - =20 - /// - /// A pointer to a string identifying the independent BIOS vendor. - /// - UINT32 IbvPointer; - =20 - /// - /// This field is NULL for all systems not supporting PCI Express. This = field is the base - /// value of the start of the PCI Express memory-mapped configuration re= gisters and - /// must be filled in prior to EfiCompatibility code issuing the Compati= bility16 function - /// Compatibility16InitializeYourself(). - /// Compatibility16InitializeYourself() is defined in Compatability16 - /// Functions. - /// - UINT32 PciExpressBase; - =20 - /// - /// Maximum PCI bus number assigned. - /// - UINT8 LastPciBus; - - /// - /// Start address of UMB RAM - /// - UINT32 UmaAddress; - - /// - /// Size of UMB RAM - /// - UINT32 UmaSize; - - /// - /// Start address of persistent allocation in high (>1MiB) memory - /// - UINT32 HiPermanentMemoryAddress; - - /// - /// Size of persistent allocation in high (>1MiB) memory - /// - UINT32 HiPermanentMemorySize; -} EFI_COMPATIBILITY16_TABLE; - -/// -/// Functions provided by the CSM binary which communicate between the Efi= Compatibility=20 -/// and Compatability16 code. -/// -/// Inconsistent with the specification here:=20 -/// The member's name started with "Compatibility16" [defined in Intel Fra= mework=20 -/// Compatibility Support Module Specification / 0.97 version]=20 -/// has been changed to "Legacy16" since keeping backward compatible. -/// -typedef enum { - /// - /// Causes the Compatibility16 code to do any internal initialization re= quired. - /// Input: - /// AX =3D Compatibility16InitializeYourself - /// ES:BX =3D Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE - /// Return: - /// AX =3D Return Status codes - /// - Legacy16InitializeYourself =3D 0x0000, - =20 - /// - /// Causes the Compatibility16 BIOS to perform any drive number translat= ions to match the boot sequence. - /// Input: - /// AX =3D Compatibility16UpdateBbs - /// ES:BX =3D Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE - /// Return: - /// AX =3D Returned status codes - /// - Legacy16UpdateBbs =3D 0x0001, - =20 - /// - /// Allows the Compatibility16 code to perform any final actions before = booting. The Compatibility16 - /// code is read/write. - /// Input: - /// AX =3D Compatibility16PrepareToBoot - /// ES:BX =3D Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure =20 - /// Return: - /// AX =3D Returned status codes - /// - Legacy16PrepareToBoot =3D 0x0002, - =20 - /// - /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is= Read/Only. - /// Input: - /// AX =3D Compatibility16Boot - /// Output: - /// AX =3D Returned status codes - /// - Legacy16Boot =3D 0x0003, - =20 - /// - /// Allows the Compatibility16 code to get the last device from which a = boot was attempted. This is - /// stored in CMOS and is the priority number of the last attempted boot= device. - /// Input: - /// AX =3D Compatibility16RetrieveLastBootDevice - /// Output: - /// AX =3D Returned status codes - /// BX =3D Priority number of the boot device. - /// - Legacy16RetrieveLastBootDevice =3D 0x0004, - =20 - /// - /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 af= ter dispatching a legacy OpROM. - /// Input: - /// AX =3D Compatibility16DispatchOprom - /// ES:BX =3D Pointer to EFI_DISPATCH_OPROM_TABLE - /// Output: - /// AX =3D Returned status codes - /// BX =3D Number of non-BBS-compliant devices found. Equals 0 if BBS = compliant. - /// - Legacy16DispatchOprom =3D 0x0005, - =20 - /// - /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified = length and returns the address - /// of that region. - /// Input: - /// AX =3D Compatibility16GetTableAddress - /// BX =3D Allocation region - /// 00 =3D Allocate from either 0xE0000 or 0xF0000 64 KB blocks. - /// Bit 0 =3D 1 Allocate from 0xF0000 64 KB block - /// Bit 1 =3D 1 Allocate from 0xE0000 64 KB block - /// CX =3D Requested length in bytes. - /// DX =3D Required address alignment. Bit mapped. First non-zero bit = from the right is the alignment. - /// Output: - /// AX =3D Returned status codes - /// DS:BX =3D Address of the region - /// - Legacy16GetTableAddress =3D 0x0006, - =20 - /// - /// Enables the EfiCompatibility module to do any nonstandard processing= of keyboard LEDs or state. - /// Input: - /// AX =3D Compatibility16SetKeyboardLeds - /// CL =3D LED status. - /// Bit 0 Scroll Lock 0 =3D Off - /// Bit 1 NumLock - /// Bit 2 Caps Lock - /// Output: - /// AX =3D Returned status codes - /// - Legacy16SetKeyboardLeds =3D 0x0007, - =20 - /// - /// Enables the EfiCompatibility module to install an interrupt handler = for PCI mass media devices that - /// do not have an OpROM associated with them. An example is SATA. - /// Input: - /// AX =3D Compatibility16InstallPciHandler - /// ES:BX =3D Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure - /// Output: - /// AX =3D Returned status codes - /// - Legacy16InstallPciHandler =3D 0x0008 -} EFI_COMPATIBILITY_FUNCTIONS; - - -/// -/// EFI_DISPATCH_OPROM_TABLE -/// -typedef struct { - UINT16 PnPInstallationCheckSegment; ///< A pointer to the PnpInstallat= ionCheck data structure. - UINT16 PnPInstallationCheckOffset; ///< A pointer to the PnpInstallat= ionCheck data structure. - UINT16 OpromSegment; ///< The segment where the OpROM w= as placed. Offset is assumed to be 3. - UINT8 PciBus; ///< The PCI bus. - UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI f= unction. - UINT8 NumberBbsEntries; ///< The number of valid BBS table= entries upon entry and exit. The IBV code may - ///< increase this number, if BBS-= compliant devices also hook INTs in order to force the - ///< OpROM BIOS Setup to be execut= ed. - UINT32 BbsTablePointer; ///< A pointer to the BBS table. - UINT16 RuntimeSegment; ///< The segment where the OpROM c= an be relocated to. If this value is 0x0000, this - ///< means that the relocation of = this run time code is not supported. - ///< Inconsistent with specificati= on here:=20 - ///< The member's name "OpromDesti= nationSegment" [defined in Intel Framework Compatibility Support Module Spe= cification / 0.97 version]=20 - ///< has been changed to "RuntimeS= egment" since keeping backward compatible. - -} EFI_DISPATCH_OPROM_TABLE; - -/// -/// EFI_TO_COMPATIBILITY16_INIT_TABLE -/// -typedef struct { - /// - /// Starting address of memory under 1 MB. The ending address is assumed= to be 640 KB or 0x9FFFF. - /// - UINT32 BiosLessThan1MB; - =20 - /// - /// The starting address of the high memory block. - /// - UINT32 HiPmmMemory; - =20 - /// - /// The length of high memory block. - /// - UINT32 HiPmmMemorySizeInBytes; - =20 - /// - /// The segment of the reverse thunk call code. - /// - UINT16 ReverseThunkCallSegment; - =20 - /// - /// The offset of the reverse thunk call code. - /// - UINT16 ReverseThunkCallOffset; - =20 - /// - /// The number of E820 entries copied to the Compatibility16 BIOS. - /// - UINT32 NumberE820Entries; - =20 - /// - /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory. - /// - UINT32 OsMemoryAbove1Mb; - =20 - /// - /// The start of thunk code in main memory. Memory cannot be used by BIO= S or PMM. - /// - UINT32 ThunkStart; - =20 - /// - /// The size of the thunk code. - /// - UINT32 ThunkSizeInBytes; - =20 - /// - /// Starting address of memory under 1 MB. - /// - UINT32 LowPmmMemory; - =20 - /// - /// The length of low Memory block. - /// - UINT32 LowPmmMemorySizeInBytes; -} EFI_TO_COMPATIBILITY16_INIT_TABLE; - -/// -/// DEVICE_PRODUCER_SERIAL. -/// -typedef struct { - UINT16 Address; ///< I/O address assigned = to the serial port. - UINT8 Irq; ///< IRQ assigned to the s= erial port. - SERIAL_MODE Mode; ///< Mode of serial port. = Values are defined below. -} DEVICE_PRODUCER_SERIAL; - -/// -/// DEVICE_PRODUCER_SERIAL's modes. -///@{ -#define DEVICE_SERIAL_MODE_NORMAL 0x00 -#define DEVICE_SERIAL_MODE_IRDA 0x01 -#define DEVICE_SERIAL_MODE_ASK_IR 0x02 -#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00 -#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10 -///@) - -/// -/// DEVICE_PRODUCER_PARALLEL. -/// -typedef struct { - UINT16 Address; ///< I/O address assigned to= the parallel port. - UINT8 Irq; ///< IRQ assigned to the par= allel port. - UINT8 Dma; ///< DMA assigned to the par= allel port. - PARALLEL_MODE Mode; ///< Mode of the parallel po= rt. Values are defined below. -} DEVICE_PRODUCER_PARALLEL; - -/// -/// DEVICE_PRODUCER_PARALLEL's modes. -///@{ -#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00 -#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01 -#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02 -#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03 -///@} - -/// -/// DEVICE_PRODUCER_FLOPPY -/// -typedef struct { - UINT16 Address; ///< I/O address ass= igned to the floppy. - UINT8 Irq; ///< IRQ assigned to= the floppy. - UINT8 Dma; ///< DMA assigned to= the floppy. - UINT8 NumberOfFloppy; ///< Number of flopp= ies in the system. -} DEVICE_PRODUCER_FLOPPY; - -/// -/// LEGACY_DEVICE_FLAGS -/// -typedef struct { - UINT32 A20Kybd : 1; ///< A20 controller = by keyboard controller. - UINT32 A20Port90 : 1; ///< A20 controlled = by port 0x92. - UINT32 Reserved : 30; ///< Reserved for fu= ture usage. -} LEGACY_DEVICE_FLAGS; - -/// -/// DEVICE_PRODUCER_DATA_HEADER -/// -typedef struct { - DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial p= ort x. Type DEVICE_PRODUCER_SERIAL is defined below. - DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel= port x. Type DEVICE_PRODUCER_PARALLEL is defined below. - DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. = Type DEVICE_PRODUCER_FLOPPY is defined below. - UINT8 MousePresent; ///< Flag to indicate = if mouse is present. - LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boo= lean state information passed to CSM. -} DEVICE_PRODUCER_DATA_HEADER; - -/// -/// ATAPI_IDENTIFY -/// -typedef struct { - UINT16 Raw[256]; ///< Raw data from the I= DE IdentifyDrive command. -} ATAPI_IDENTIFY; - -/// -/// HDD_INFO -/// -typedef struct { - /// - /// Status of IDE device. Values are defined below. There is one HDD_INF= O structure - /// per IDE controller. The IdentifyDrive is per drive. Index 0 is maste= r and index - /// 1 is slave. - /// - UINT16 Status; =20 - =20 - /// - /// PCI bus of IDE controller. - /// - UINT32 Bus; - =20 - /// - /// PCI device of IDE controller. - /// - UINT32 Device; - =20 - /// - /// PCI function of IDE controller. - /// - UINT32 Function; - =20 - /// - /// Command ports base address. - /// - UINT16 CommandBaseAddress; - =20 - /// - /// Control ports base address. - /// - UINT16 ControlBaseAddress; - =20 - /// - /// Bus master address. - /// - UINT16 BusMasterAddress; - =20 - UINT8 HddIrq; - =20 - /// - /// Data that identifies the drive data; one per possible attached drive. - /// - ATAPI_IDENTIFY IdentifyDrive[2]; -} HDD_INFO; - -/// -/// HDD_INFO status bits -/// -#define HDD_PRIMARY 0x01 -#define HDD_SECONDARY 0x02 -#define HDD_MASTER_ATAPI_CDROM 0x04 -#define HDD_SLAVE_ATAPI_CDROM 0x08 -#define HDD_MASTER_IDE 0x20 -#define HDD_SLAVE_IDE 0x40 -#define HDD_MASTER_ATAPI_ZIPDISK 0x10 -#define HDD_SLAVE_ATAPI_ZIPDISK 0x80 - -/// -/// BBS_STATUS_FLAGS;\. -/// -typedef struct { - UINT16 OldPosition : 4; ///< Prior priorit= y. - UINT16 Reserved1 : 4; ///< Reserved for = future use. - UINT16 Enabled : 1; ///< If 0, ignore = this entry. - UINT16 Failed : 1; ///< 0 =3D Not kno= wn if boot failure occurred. - ///< 1 =3D Boot at= tempted failed. - =20 - /// - /// State of media present. - /// 00 =3D No bootable media is present in the device. - /// 01 =3D Unknown if a bootable media present. - /// 10 =3D Media is present and appears bootable. - /// 11 =3D Reserved. - /// - UINT16 MediaPresent : 2; - UINT16 Reserved2 : 4; ///< Reserved for = future use. -} BBS_STATUS_FLAGS; - -/// -/// BBS_TABLE, device type values & boot priority values. -/// -typedef struct { - /// - /// The boot priority for this boot device. Values are defined below. - /// - UINT16 BootPriority; - =20 - /// - /// The PCI bus for this boot device. - /// - UINT32 Bus; - =20 - /// - /// The PCI device for this boot device. - /// - UINT32 Device; - =20 - /// - /// The PCI function for the boot device. - /// - UINT32 Function; - =20 - /// - /// The PCI class for this boot device. - /// - UINT8 Class; - =20 - /// - /// The PCI Subclass for this boot device. - /// - UINT8 SubClass; - =20 - /// - /// Segment:offset address of an ASCIIZ description string describing th= e manufacturer. - /// - UINT16 MfgStringOffset; - =20 - /// - /// Segment:offset address of an ASCIIZ description string describing th= e manufacturer. - /// =20 - UINT16 MfgStringSegment; - =20 - /// - /// BBS device type. BBS device types are defined below. - /// - UINT16 DeviceType; - =20 - /// - /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below. - /// - BBS_STATUS_FLAGS StatusFlags; - =20 - /// - /// Segment:Offset address of boot loader for IPL devices or install INT= 13 handler for - /// BCV devices. - /// - UINT16 BootHandlerOffset; - =20 - /// - /// Segment:Offset address of boot loader for IPL devices or install INT= 13 handler for - /// BCV devices. - /// =20 - UINT16 BootHandlerSegment; - =20 - /// - /// Segment:offset address of an ASCIIZ description string describing th= is device. - /// - UINT16 DescStringOffset; - - /// - /// Segment:offset address of an ASCIIZ description string describing th= is device. - /// - UINT16 DescStringSegment; - =20 - /// - /// Reserved. - /// - UINT32 InitPerReserved; - =20 - /// - /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM - /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI - /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup - /// - UINT32 AdditionalIrq13Handler; - =20 - /// - /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM - /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI - /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup - /// =20 - UINT32 AdditionalIrq18Handler; - =20 - /// - /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM - /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI - /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup - /// =20 - UINT32 AdditionalIrq19Handler; - =20 - /// - /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM - /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI - /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup - /// =20 - UINT32 AdditionalIrq40Handler; - UINT8 AssignedDriveNumber; - UINT32 AdditionalIrq41Handler; - UINT32 AdditionalIrq46Handler; - UINT32 IBV1; - UINT32 IBV2; -} BBS_TABLE; - -/// -/// BBS device type values -///@{ -#define BBS_FLOPPY 0x01 -#define BBS_HARDDISK 0x02 -#define BBS_CDROM 0x03 -#define BBS_PCMCIA 0x04 -#define BBS_USB 0x05 -#define BBS_EMBED_NETWORK 0x06 -#define BBS_BEV_DEVICE 0x80 -#define BBS_UNKNOWN 0xff -///@} - -/// -/// BBS boot priority values -///@{ -#define BBS_DO_NOT_BOOT_FROM 0xFFFC -#define BBS_LOWEST_PRIORITY 0xFFFD -#define BBS_UNPRIORITIZED_ENTRY 0xFFFE -#define BBS_IGNORE_ENTRY 0xFFFF -///@} - -/// -/// SMM_ATTRIBUTES -/// -typedef struct { - /// - /// Access mechanism used to generate the soft SMI. Defined types are be= low. The other - /// values are reserved for future usage. - /// - UINT16 Type : 3; - =20 - /// - /// The size of "port" in bits. Defined values are below. - /// - UINT16 PortGranularity : 3; - =20 - /// - /// The size of data in bits. Defined values are below. - /// - UINT16 DataGranularity : 3; - =20 - /// - /// Reserved for future use. - /// - UINT16 Reserved : 7; -} SMM_ATTRIBUTES; - -/// -/// SMM_ATTRIBUTES type values. -///@{ -#define STANDARD_IO 0x00 -#define STANDARD_MEMORY 0x01 -///@} - -/// -/// SMM_ATTRIBUTES port size constants. -///@{ -#define PORT_SIZE_8 0x00 -#define PORT_SIZE_16 0x01 -#define PORT_SIZE_32 0x02 -#define PORT_SIZE_64 0x03 -///@} - -/// -/// SMM_ATTRIBUTES data size constants. -///@{ -#define DATA_SIZE_8 0x00 -#define DATA_SIZE_16 0x01 -#define DATA_SIZE_32 0x02 -#define DATA_SIZE_64 0x03 -///@} - -/// -/// SMM_FUNCTION & relating constants. -/// -typedef struct { - UINT16 Function : 15; - UINT16 Owner : 1; -} SMM_FUNCTION; - -/// -/// SMM_FUNCTION Function constants. -///@{ -#define INT15_D042 0x0000 -#define GET_USB_BOOT_INFO 0x0001 -#define DMI_PNP_50_57 0x0002 -///@} - -/// -/// SMM_FUNCTION Owner constants. -///@{ -#define STANDARD_OWNER 0x0 -#define OEM_OWNER 0x1 -///@} - -/// -/// This structure assumes both port and data sizes are 1. SmmAttribute mu= st be -/// properly to reflect that assumption. -/// -typedef struct { - /// - /// Describes the access mechanism, SmmPort, and SmmData sizes. Type - /// SMM_ATTRIBUTES is defined below. - /// - SMM_ATTRIBUTES SmmAttributes; - =20 - /// - /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below. - /// - SMM_FUNCTION SmmFunction; - =20 - /// - /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16= bytes. - /// - UINT8 SmmPort; - =20 - /// - /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16= bytes. - /// - UINT8 SmmData; -} SMM_ENTRY; - -/// -/// SMM_TABLE -/// -typedef struct { - UINT16 NumSmmEntries; ///< Number of entri= es represented by SmmEntry. - SMM_ENTRY SmmEntry; ///< One entry per f= unction. Type SMM_ENTRY is defined below. -} SMM_TABLE; - -/// -/// UDC_ATTRIBUTES -/// -typedef struct { - /// - /// This bit set indicates that the ServiceAreaData is valid. - /// - UINT8 DirectoryServiceValidity : 1; - =20 - /// - /// This bit set indicates to use the Reserve Area Boot Code Address (RA= CBA) only if - /// DirectoryServiceValidity is 0. - /// - UINT8 RabcaUsedFlag : 1; - =20 - /// - /// This bit set indicates to execute hard disk diagnostics. - /// - UINT8 ExecuteHddDiagnosticsFlag : 1; - =20 - /// - /// Reserved for future use. Set to 0. - /// - UINT8 Reserved : 5; -} UDC_ATTRIBUTES; - -/// -/// UD_TABLE -/// -typedef struct { - /// - /// This field contains the bit-mapped attributes of the PARTIES informa= tion. Type - /// UDC_ATTRIBUTES is defined below. - /// - UDC_ATTRIBUTES Attributes; - =20 - /// - /// This field contains the zero-based device on which the selected - /// ServiceDataArea is present. It is 0 for master and 1 for the slave d= evice. =20 - /// - UINT8 DeviceNumber; - =20 - /// - /// This field contains the zero-based index into the BbsTable for the p= arent device. - /// This index allows the user to reference the parent device informatio= n such as PCI - /// bus, device function. - /// - UINT8 BbsTableEntryNumberForParentDevice; - =20 - /// - /// This field contains the zero-based index into the BbsTable for the b= oot entry. - /// - UINT8 BbsTableEntryNumberForBoot; - =20 - /// - /// This field contains the zero-based index into the BbsTable for the H= DD diagnostics entry. - /// - UINT8 BbsTableEntryNumberForHddDiag; - =20 - /// - /// The raw Beer data. - /// - UINT8 BeerData[128]; - =20 - /// - /// The raw data of selected service area. - /// - UINT8 ServiceAreaData[64]; -} UD_TABLE; - -#define EFI_TO_LEGACY_MAJOR_VERSION 0x02 -#define EFI_TO_LEGACY_MINOR_VERSION 0x00 -#define MAX_IDE_CONTROLLER 8 - -/// -/// EFI_TO_COMPATIBILITY16_BOOT_TABLE -/// -typedef struct { - UINT16 MajorVersion; ///< The= EfiCompatibility major version number. - UINT16 MinorVersion; ///< The= EfiCompatibility minor version number. - UINT32 AcpiTable; ///< The= location of the RSDT ACPI table. < 4G range. - UINT32 SmbiosTable; ///< The= location of the SMBIOS table in EFI memory. < 4G range. - UINT32 SmbiosTableLength; - // - // Legacy SIO state - // - DEVICE_PRODUCER_DATA_HEADER SioData; ///< Sta= ndard traditional device information. - UINT16 DevicePathType; ///< The= default boot type. - UINT16 PciIrqMask; ///< Mas= k of which IRQs have been assigned to PCI. - UINT32 NumberE820Entries; ///< Num= ber of E820 entries. The number can change from the - ///< Com= patibility16InitializeYourself() function. - // - // Controller & Drive Identify[2] per controller information - // - HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Har= d disk drive information, including raw Identify Drive data. - UINT32 NumberBbsEntries; ///< Num= ber of entries in the BBS table - UINT32 BbsTable; ///< A p= ointer to the BBS table. Type BBS_TABLE is defined below. - UINT32 SmmTable; ///< A p= ointer to the SMM table. Type SMM_TABLE is defined below. - UINT32 OsMemoryAbove1Mb; ///< The= amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can - ///< dif= fer from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more - ///< mem= ory may have been discovered. - UINT32 UnconventionalDeviceTable; ///< Inf= ormation to boot off an unconventional device like a PARTIES partition. Type - ///< UD_= TABLE is defined below. -} EFI_TO_COMPATIBILITY16_BOOT_TABLE; - -/// -/// EFI_LEGACY_INSTALL_PCI_HANDLER -/// -typedef struct { - UINT8 PciBus; ///< The PCI bus o= f the device. - UINT8 PciDeviceFun; ///< The PCI devic= e in bits 7:3 and function in bits 2:0. - UINT8 PciSegment; ///< The PCI segme= nt of the device. - UINT8 PciClass; ///< The PCI class= code of the device. - UINT8 PciSubclass; ///< The PCI subcl= ass code of the device. - UINT8 PciInterface; ///< The PCI inter= face code of the device. - // - // Primary section - // - UINT8 PrimaryIrq; ///< The primary d= evice IRQ. - UINT8 PrimaryReserved; ///< Reserved. - UINT16 PrimaryControl; ///< The primary d= evice control I/O base. - UINT16 PrimaryBase; ///< The primary d= evice I/O base. - UINT16 PrimaryBusMaster; ///< The primary d= evice bus master I/O base. - // - // Secondary Section - // - UINT8 SecondaryIrq; ///< The secondary= device IRQ. - UINT8 SecondaryReserved; ///< Reserved. - UINT16 SecondaryControl; ///< The secondary= device control I/O base. - UINT16 SecondaryBase; ///< The secondary= device I/O base. - UINT16 SecondaryBusMaster; ///< The secondary= device bus master I/O base. -} EFI_LEGACY_INSTALL_PCI_HANDLER; - -#endif +/** @file + The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage + under EFI and Legacy OS boot. This file also includes all the related + COMPATIBILITY16 structures and definitions. + + Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow + well known naming conventions. + + Thunk is the code that switches from 32-bit protected environment into t= he 16-bit real-mode + environment. Reverse thunk is the code that does the opposite. + +Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Revision Reference: + This protocol is defined in Framework for EFI Compatibility Support Modu= le spec + Version 0.98. + +**/ + +#ifndef _EFI_LEGACY_BIOS_H_ +#define _EFI_LEGACY_BIOS_H_ + +/// +/// +/// +#pragma pack(1) + +typedef UINT8 SERIAL_MODE; +typedef UINT8 PARALLEL_MODE; + +#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', = '$') + +/// +/// There is a table located within the traditional BIOS in either the 0xF= 000:xxxx or 0xE000:xxxx +/// physical address range. It is located on a 16-byte boundary and provid= es the physical address of the +/// entry point for the Compatibility16 functions. These functions provide= the platform-specific +/// information that is required by the generic EfiCompatibility code. The= functions are invoked via +/// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit= physical +/// entry point. +/// +typedef struct { + /// + /// The string "$EFI" denotes the start of the EfiCompatibility table. B= yte 0 is "I," byte + /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed = as a DWORD or UINT32. + /// + UINT32 Signature; + + /// + /// The value required such that byte checksum of TableLength equals zer= o. + /// + UINT8 TableChecksum; + + /// + /// The length of this table. + /// + UINT8 TableLength; + + /// + /// The major EFI revision for which this table was generated. + /// + UINT8 EfiMajorRevision; + + /// + /// The minor EFI revision for which this table was generated. + /// + UINT8 EfiMinorRevision; + + /// + /// The major revision of this table. + /// + UINT8 TableMajorRevision; + + /// + /// The minor revision of this table. + /// + UINT8 TableMinorRevision; + + /// + /// Reserved for future usage. + /// + UINT16 Reserved; + + /// + /// The segment of the entry point within the traditional BIOS for Compa= tibility16 functions. + /// + UINT16 Compatibility16CallSegment; + + /// + /// The offset of the entry point within the traditional BIOS for Compat= ibility16 functions. + /// + UINT16 Compatibility16CallOffset; + + /// + /// The segment of the entry point within the traditional BIOS for EfiCo= mpatibility + /// to invoke the PnP installation check. + /// + UINT16 PnPInstallationCheckSegment; + + /// + /// The Offset of the entry point within the traditional BIOS for EfiCom= patibility + /// to invoke the PnP installation check. + /// + UINT16 PnPInstallationCheckOffset; + + /// + /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the = IntelPlatform + /// Innovation Framework for EFI Driver Execution Environment Core Inter= face Specification (DXE CIS). + /// + UINT32 EfiSystemTable; + + /// + /// The address of an OEM-provided identifier string. The string is null= terminated. + /// + UINT32 OemIdStringPointer; + + /// + /// The 32-bit physical address where ACPI RSD PTR is stored within the = traditional + /// BIOS. The remained of the ACPI tables are located at their EFI addre= sses. The size + /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill= in the ACPI + /// RSD PTR with either the ACPI 1.0b or 2.0 values. + /// + UINT32 AcpiRsdPtrPointer; + + /// + /// The OEM revision number. Usage is undefined but provided for OEM mod= ule usage. + /// + UINT16 OemRevision; + + /// + /// The 32-bit physical address where INT15 E820 data is stored within t= he traditional + /// BIOS. The EfiCompatibility code will fill in the E820Pointer value a= nd copy the + /// data to the indicated area. + /// + UINT32 E820Pointer; + + /// + /// The length of the E820 data and is filled in by the EfiCompatibility= code. + /// + UINT32 E820Length; + + /// + /// The 32-bit physical address where the $PIR table is stored in the tr= aditional BIOS. + /// The EfiCompatibility code will fill in the IrqRoutingTablePointer va= lue and + /// copy the data to the indicated area. + /// + UINT32 IrqRoutingTablePointer; + + /// + /// The length of the $PIR table and is filled in by the EfiCompatibilit= y code. + /// + UINT32 IrqRoutingTableLength; + + /// + /// The 32-bit physical address where the MP table is stored in the trad= itional BIOS. + /// The EfiCompatibility code will fill in the MpTablePtr value and copy= the data + /// to the indicated area. + /// + UINT32 MpTablePtr; + + /// + /// The length of the MP table and is filled in by the EfiCompatibility = code. + /// + UINT32 MpTableLength; + + /// + /// The segment of the OEM-specific INT table/code. + /// + UINT16 OemIntSegment; + + /// + /// The offset of the OEM-specific INT table/code. + /// + UINT16 OemIntOffset; + + /// + /// The segment of the OEM-specific 32-bit table/code. + /// + UINT16 Oem32Segment; + + /// + /// The offset of the OEM-specific 32-bit table/code. + /// + UINT16 Oem32Offset; + + /// + /// The segment of the OEM-specific 16-bit table/code. + /// + UINT16 Oem16Segment; + + /// + /// The offset of the OEM-specific 16-bit table/code. + /// + UINT16 Oem16Offset; + + /// + /// The segment of the TPM binary passed to 16-bit CSM. + /// + UINT16 TpmSegment; + + /// + /// The offset of the TPM binary passed to 16-bit CSM. + /// + UINT16 TpmOffset; + + /// + /// A pointer to a string identifying the independent BIOS vendor. + /// + UINT32 IbvPointer; + + /// + /// This field is NULL for all systems not supporting PCI Express. This = field is the base + /// value of the start of the PCI Express memory-mapped configuration re= gisters and + /// must be filled in prior to EfiCompatibility code issuing the Compati= bility16 function + /// Compatibility16InitializeYourself(). + /// Compatibility16InitializeYourself() is defined in Compatibility16 + /// Functions. + /// + UINT32 PciExpressBase; + + /// + /// Maximum PCI bus number assigned. + /// + UINT8 LastPciBus; + + /// + /// Start Address of Upper Memory Area (UMA) to be set as Read/Write. If + /// UmaAddress is a valid address in the shadow RAM, it also indicates t= hat the region + /// from 0xC0000 to (UmaAddress - 1) can be used for Option ROM. + /// + UINT32 UmaAddress; + + /// + /// Upper Memory Area size in bytes to be set as Read/Write. If zero, no= UMA region + /// will be set as Read/Write (i.e. all Shadow RAM is set as Read-Only). + /// + UINT32 UmaSize; + + /// + /// Start Address of high memory that can be used for permanent allocati= on. If zero, + /// high memory is not available for permanent allocation. + /// + UINT32 HiPermanentMemoryAddress; + + /// + /// Size of high memory that can be used for permanent allocation in byt= es. If zero, + /// high memory is not available for permanent allocation. + /// + UINT32 HiPermanentMemorySize; +} EFI_COMPATIBILITY16_TABLE; + +/// +/// Functions provided by the CSM binary which communicate between the Efi= Compatibility +/// and Compatibility16 code. +/// +/// Inconsistent with the specification here: +/// The member's name started with "Compatibility16" [defined in Intel Fra= mework +/// Compatibility Support Module Specification / 0.97 version] +/// has been changed to "Legacy16" since keeping backward compatible. +/// +typedef enum { + /// + /// Causes the Compatibility16 code to do any internal initialization re= quired. + /// Input: + /// AX =3D Compatibility16InitializeYourself + /// ES:BX =3D Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE + /// Return: + /// AX =3D Return Status codes + /// + Legacy16InitializeYourself =3D 0x0000, + + /// + /// Causes the Compatibility16 BIOS to perform any drive number translat= ions to match the boot sequence. + /// Input: + /// AX =3D Compatibility16UpdateBbs + /// ES:BX =3D Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE + /// Return: + /// AX =3D Returned status codes + /// + Legacy16UpdateBbs =3D 0x0001, + + /// + /// Allows the Compatibility16 code to perform any final actions before = booting. The Compatibility16 + /// code is read/write. + /// Input: + /// AX =3D Compatibility16PrepareToBoot + /// ES:BX =3D Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure + /// Return: + /// AX =3D Returned status codes + /// + Legacy16PrepareToBoot =3D 0x0002, + + /// + /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is= Read/Only. + /// Input: + /// AX =3D Compatibility16Boot + /// Output: + /// AX =3D Returned status codes + /// + Legacy16Boot =3D 0x0003, + + /// + /// Allows the Compatibility16 code to get the last device from which a = boot was attempted. This is + /// stored in CMOS and is the priority number of the last attempted boot= device. + /// Input: + /// AX =3D Compatibility16RetrieveLastBootDevice + /// Output: + /// AX =3D Returned status codes + /// BX =3D Priority number of the boot device. + /// + Legacy16RetrieveLastBootDevice =3D 0x0004, + + /// + /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 af= ter dispatching a legacy OpROM. + /// Input: + /// AX =3D Compatibility16DispatchOprom + /// ES:BX =3D Pointer to EFI_DISPATCH_OPROM_TABLE + /// Output: + /// AX =3D Returned status codes + /// BX =3D Number of non-BBS-compliant devices found. Equals 0 if BBS = compliant. + /// + Legacy16DispatchOprom =3D 0x0005, + + /// + /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified = length and returns the address + /// of that region. + /// Input: + /// AX =3D Compatibility16GetTableAddress + /// BX =3D Allocation region + /// 00 =3D Allocate from either 0xE0000 or 0xF0000 64 KB blocks. + /// Bit 0 =3D 1 Allocate from 0xF0000 64 KB block + /// Bit 1 =3D 1 Allocate from 0xE0000 64 KB block + /// CX =3D Requested length in bytes. + /// DX =3D Required address alignment. Bit mapped. First non-zero bit = from the right is the alignment. + /// Output: + /// AX =3D Returned status codes + /// DS:BX =3D Address of the region + /// + Legacy16GetTableAddress =3D 0x0006, + + /// + /// Enables the EfiCompatibility module to do any nonstandard processing= of keyboard LEDs or state. + /// Input: + /// AX =3D Compatibility16SetKeyboardLeds + /// CL =3D LED status. + /// Bit 0 Scroll Lock 0 =3D Off + /// Bit 1 NumLock + /// Bit 2 Caps Lock + /// Output: + /// AX =3D Returned status codes + /// + Legacy16SetKeyboardLeds =3D 0x0007, + + /// + /// Enables the EfiCompatibility module to install an interrupt handler = for PCI mass media devices that + /// do not have an OpROM associated with them. An example is SATA. + /// Input: + /// AX =3D Compatibility16InstallPciHandler + /// ES:BX =3D Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure + /// Output: + /// AX =3D Returned status codes + /// + Legacy16InstallPciHandler =3D 0x0008 +} EFI_COMPATIBILITY_FUNCTIONS; + +/// +/// EFI_DISPATCH_OPROM_TABLE +/// +typedef struct { + UINT16 PnPInstallationCheckSegment; ///< A pointer to the PnpInstalla= tionCheck data structure. + UINT16 PnPInstallationCheckOffset; ///< A pointer to the PnpInstalla= tionCheck data structure. + UINT16 OpromSegment; ///< The segment where the OpROM = was placed. Offset is assumed to be 3. + UINT8 PciBus; ///< The PCI bus. + UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI = function. + UINT8 NumberBbsEntries; ///< The number of valid BBS tabl= e entries upon entry and exit. The IBV code may + ///< increase this number, if BBS= -compliant devices also hook INTs in order to force the + ///< OpROM BIOS Setup to be execu= ted. + UINT32 BbsTablePointer; ///< A pointer to the BBS table. + UINT16 RuntimeSegment; ///< The segment where the OpROM = can be relocated to. If this value is 0x0000, this + ///< means that the relocation of= this run time code is not supported. + ///< Inconsistent with specificat= ion here: + ///< The member's name "OpromDest= inationSegment" [defined in Intel Framework Compatibility Support Module Sp= ecification / 0.97 version] + ///< has been changed to "Runtime= Segment" since keeping backward compatible. +} EFI_DISPATCH_OPROM_TABLE; + +/// +/// EFI_TO_COMPATIBILITY16_INIT_TABLE +/// +typedef struct { + /// + /// Starting address of memory under 1 MB. The ending address is assumed= to be 640 KB or 0x9FFFF. + /// + UINT32 BiosLessThan1MB; + + /// + /// The starting address of the high memory block. + /// + UINT32 HiPmmMemory; + + /// + /// The length of high memory block. + /// + UINT32 HiPmmMemorySizeInBytes; + + /// + /// The segment of the reverse thunk call code. + /// + UINT16 ReverseThunkCallSegment; + + /// + /// The offset of the reverse thunk call code. + /// + UINT16 ReverseThunkCallOffset; + + /// + /// The number of E820 entries copied to the Compatibility16 BIOS. + /// + UINT32 NumberE820Entries; + + /// + /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory. + /// + UINT32 OsMemoryAbove1Mb; + + /// + /// The start of thunk code in main memory. Memory cannot be used by BIO= S or PMM. + /// + UINT32 ThunkStart; + + /// + /// The size of the thunk code. + /// + UINT32 ThunkSizeInBytes; + + /// + /// Starting address of memory under 1 MB. + /// + UINT32 LowPmmMemory; + + /// + /// The length of low Memory block. + /// + UINT32 LowPmmMemorySizeInBytes; +} EFI_TO_COMPATIBILITY16_INIT_TABLE; + +/// +/// DEVICE_PRODUCER_SERIAL. +/// +typedef struct { + UINT16 Address; ///< I/O address assigned = to the serial port. + UINT8 Irq; ///< IRQ assigned to the s= erial port. + SERIAL_MODE Mode; ///< Mode of serial port. = Values are defined below. +} DEVICE_PRODUCER_SERIAL; + +/// +/// DEVICE_PRODUCER_SERIAL's modes. +///@{ +#define DEVICE_SERIAL_MODE_NORMAL 0x00 +#define DEVICE_SERIAL_MODE_IRDA 0x01 +#define DEVICE_SERIAL_MODE_ASK_IR 0x02 +#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00 +#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10 +/// @) + +/// +/// DEVICE_PRODUCER_PARALLEL. +/// +typedef struct { + UINT16 Address; ///< I/O address assigned to= the parallel port. + UINT8 Irq; ///< IRQ assigned to the par= allel port. + UINT8 Dma; ///< DMA assigned to the par= allel port. + PARALLEL_MODE Mode; ///< Mode of the parallel po= rt. Values are defined below. +} DEVICE_PRODUCER_PARALLEL; + +/// +/// DEVICE_PRODUCER_PARALLEL's modes. +///@{ +#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00 +#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01 +#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02 +#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03 +///@} + +/// +/// DEVICE_PRODUCER_FLOPPY +/// +typedef struct { + UINT16 Address; ///< I/O address ass= igned to the floppy. + UINT8 Irq; ///< IRQ assigned to= the floppy. + UINT8 Dma; ///< DMA assigned to= the floppy. + UINT8 NumberOfFloppy; ///< Number of flopp= ies in the system. +} DEVICE_PRODUCER_FLOPPY; + +/// +/// LEGACY_DEVICE_FLAGS +/// +typedef struct { + UINT32 A20Kybd : 1; ///< A20 controller = by keyboard controller. + UINT32 A20Port90 : 1; ///< A20 controlled = by port 0x92. + UINT32 Reserved : 30; ///< Reserved for fu= ture usage. +} LEGACY_DEVICE_FLAGS; + +/// +/// DEVICE_PRODUCER_DATA_HEADER +/// +typedef struct { + DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial p= ort x. Type DEVICE_PRODUCER_SERIAL is defined below. + DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel= port x. Type DEVICE_PRODUCER_PARALLEL is defined below. + DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. = Type DEVICE_PRODUCER_FLOPPY is defined below. + UINT8 MousePresent; ///< Flag to indicate = if mouse is present. + LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boo= lean state information passed to CSM. +} DEVICE_PRODUCER_DATA_HEADER; + +/// +/// ATAPI_IDENTIFY +/// +typedef struct { + UINT16 Raw[256]; ///< Raw data from the I= DE IdentifyDrive command. +} ATAPI_IDENTIFY; + +/// +/// HDD_INFO +/// +typedef struct { + /// + /// Status of IDE device. Values are defined below. There is one HDD_INF= O structure + /// per IDE controller. The IdentifyDrive is per drive. Index 0 is maste= r and index + /// 1 is slave. + /// + UINT16 Status; + + /// + /// PCI bus of IDE controller. + /// + UINT32 Bus; + + /// + /// PCI device of IDE controller. + /// + UINT32 Device; + + /// + /// PCI function of IDE controller. + /// + UINT32 Function; + + /// + /// Command ports base address. + /// + UINT16 CommandBaseAddress; + + /// + /// Control ports base address. + /// + UINT16 ControlBaseAddress; + + /// + /// Bus master address. + /// + UINT16 BusMasterAddress; + + UINT8 HddIrq; + + /// + /// Data that identifies the drive data; one per possible attached drive. + /// + ATAPI_IDENTIFY IdentifyDrive[2]; +} HDD_INFO; + +/// +/// HDD_INFO status bits +/// +#define HDD_PRIMARY 0x01 +#define HDD_SECONDARY 0x02 +#define HDD_MASTER_ATAPI_CDROM 0x04 +#define HDD_SLAVE_ATAPI_CDROM 0x08 +#define HDD_MASTER_IDE 0x20 +#define HDD_SLAVE_IDE 0x40 +#define HDD_MASTER_ATAPI_ZIPDISK 0x10 +#define HDD_SLAVE_ATAPI_ZIPDISK 0x80 + +/// +/// BBS_STATUS_FLAGS;\. +/// +typedef struct { + UINT16 OldPosition : 4; ///< Prior priorit= y. + UINT16 Reserved1 : 4; ///< Reserved for = future use. + UINT16 Enabled : 1; ///< If 0, ignore = this entry. + UINT16 Failed : 1; ///< 0 =3D Not kno= wn if boot failure occurred. + ///< 1 =3D Boot at= tempted failed. + + /// + /// State of media present. + /// 00 =3D No bootable media is present in the device. + /// 01 =3D Unknown if a bootable media present. + /// 10 =3D Media is present and appears bootable. + /// 11 =3D Reserved. + /// + UINT16 MediaPresent : 2; + UINT16 Reserved2 : 4; ///< Reserved for = future use. +} BBS_STATUS_FLAGS; + +/// +/// BBS_TABLE, device type values & boot priority values. +/// +typedef struct { + /// + /// The boot priority for this boot device. Values are defined below. + /// + UINT16 BootPriority; + + /// + /// The PCI bus for this boot device. + /// + UINT32 Bus; + + /// + /// The PCI device for this boot device. + /// + UINT32 Device; + + /// + /// The PCI function for the boot device. + /// + UINT32 Function; + + /// + /// The PCI class for this boot device. + /// + UINT8 Class; + + /// + /// The PCI Subclass for this boot device. + /// + UINT8 SubClass; + + /// + /// Segment:offset address of an ASCIIZ description string describing th= e manufacturer. + /// + UINT16 MfgStringOffset; + + /// + /// Segment:offset address of an ASCIIZ description string describing th= e manufacturer. + /// + UINT16 MfgStringSegment; + + /// + /// BBS device type. BBS device types are defined below. + /// + UINT16 DeviceType; + + /// + /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below. + /// + BBS_STATUS_FLAGS StatusFlags; + + /// + /// Segment:Offset address of boot loader for IPL devices or install INT= 13 handler for + /// BCV devices. + /// + UINT16 BootHandlerOffset; + + /// + /// Segment:Offset address of boot loader for IPL devices or install INT= 13 handler for + /// BCV devices. + /// + UINT16 BootHandlerSegment; + + /// + /// Segment:offset address of an ASCIIZ description string describing th= is device. + /// + UINT16 DescStringOffset; + + /// + /// Segment:offset address of an ASCIIZ description string describing th= is device. + /// + UINT16 DescStringSegment; + + /// + /// Reserved. + /// + UINT32 InitPerReserved; + + /// + /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM + /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI + /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup + /// + UINT32 AdditionalIrq13Handler; + + /// + /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM + /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI + /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup + /// + UINT32 AdditionalIrq18Handler; + + /// + /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM + /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI + /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup + /// + UINT32 AdditionalIrq19Handler; + + /// + /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM + /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI + /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup + /// + UINT32 AdditionalIrq40Handler; + UINT8 AssignedDriveNumber; + UINT32 AdditionalIrq41Handler; + UINT32 AdditionalIrq46Handler; + UINT32 IBV1; + UINT32 IBV2; +} BBS_TABLE; + +/// +/// BBS device type values +///@{ +#define BBS_FLOPPY 0x01 +#define BBS_HARDDISK 0x02 +#define BBS_CDROM 0x03 +#define BBS_PCMCIA 0x04 +#define BBS_USB 0x05 +#define BBS_EMBED_NETWORK 0x06 +#define BBS_BEV_DEVICE 0x80 +#define BBS_UNKNOWN 0xff +///@} + +/// +/// BBS boot priority values +///@{ +#define BBS_DO_NOT_BOOT_FROM 0xFFFC +#define BBS_LOWEST_PRIORITY 0xFFFD +#define BBS_UNPRIORITIZED_ENTRY 0xFFFE +#define BBS_IGNORE_ENTRY 0xFFFF +///@} + +/// +/// SMM_ATTRIBUTES +/// +typedef struct { + /// + /// Access mechanism used to generate the soft SMI. Defined types are be= low. The other + /// values are reserved for future usage. + /// + UINT16 Type : 3; + + /// + /// The size of "port" in bits. Defined values are below. + /// + UINT16 PortGranularity : 3; + + /// + /// The size of data in bits. Defined values are below. + /// + UINT16 DataGranularity : 3; + + /// + /// Reserved for future use. + /// + UINT16 Reserved : 7; +} SMM_ATTRIBUTES; + +/// +/// SMM_ATTRIBUTES type values. +///@{ +#define STANDARD_IO 0x00 +#define STANDARD_MEMORY 0x01 +///@} + +/// +/// SMM_ATTRIBUTES port size constants. +///@{ +#define PORT_SIZE_8 0x00 +#define PORT_SIZE_16 0x01 +#define PORT_SIZE_32 0x02 +#define PORT_SIZE_64 0x03 +///@} + +/// +/// SMM_ATTRIBUTES data size constants. +///@{ +#define DATA_SIZE_8 0x00 +#define DATA_SIZE_16 0x01 +#define DATA_SIZE_32 0x02 +#define DATA_SIZE_64 0x03 +///@} + +/// +/// SMM_FUNCTION & relating constants. +/// +typedef struct { + UINT16 Function : 15; + UINT16 Owner : 1; +} SMM_FUNCTION; + +/// +/// SMM_FUNCTION Function constants. +///@{ +#define INT15_D042 0x0000 +#define GET_USB_BOOT_INFO 0x0001 +#define DMI_PNP_50_57 0x0002 +///@} + +/// +/// SMM_FUNCTION Owner constants. +///@{ +#define STANDARD_OWNER 0x0 +#define OEM_OWNER 0x1 +///@} + +/// +/// This structure assumes both port and data sizes are 1. SmmAttribute mu= st be +/// properly to reflect that assumption. +/// +typedef struct { + /// + /// Describes the access mechanism, SmmPort, and SmmData sizes. Type + /// SMM_ATTRIBUTES is defined below. + /// + SMM_ATTRIBUTES SmmAttributes; + + /// + /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below. + /// + SMM_FUNCTION SmmFunction; + + /// + /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16= bytes. + /// + UINT8 SmmPort; + + /// + /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16= bytes. + /// + UINT8 SmmData; +} SMM_ENTRY; + +/// +/// SMM_TABLE +/// +typedef struct { + UINT16 NumSmmEntries; ///< Number of entri= es represented by SmmEntry. + SMM_ENTRY SmmEntry; ///< One entry per f= unction. Type SMM_ENTRY is defined below. +} SMM_TABLE; + +/// +/// UDC_ATTRIBUTES +/// +typedef struct { + /// + /// This bit set indicates that the ServiceAreaData is valid. + /// + UINT8 DirectoryServiceValidity : 1; + + /// + /// This bit set indicates to use the Reserve Area Boot Code Address (RA= CBA) only if + /// DirectoryServiceValidity is 0. + /// + UINT8 RabcaUsedFlag : 1; + + /// + /// This bit set indicates to execute hard disk diagnostics. + /// + UINT8 ExecuteHddDiagnosticsFlag : 1; + + /// + /// Reserved for future use. Set to 0. + /// + UINT8 Reserved : 5; +} UDC_ATTRIBUTES; + +/// +/// UD_TABLE +/// +typedef struct { + /// + /// This field contains the bit-mapped attributes of the PARTIES informa= tion. Type + /// UDC_ATTRIBUTES is defined below. + /// + UDC_ATTRIBUTES Attributes; + + /// + /// This field contains the zero-based device on which the selected + /// ServiceDataArea is present. It is 0 for master and 1 for the slave d= evice. + /// + UINT8 DeviceNumber; + + /// + /// This field contains the zero-based index into the BbsTable for the p= arent device. + /// This index allows the user to reference the parent device informatio= n such as PCI + /// bus, device function. + /// + UINT8 BbsTableEntryNumberForParentDevice; + + /// + /// This field contains the zero-based index into the BbsTable for the b= oot entry. + /// + UINT8 BbsTableEntryNumberForBoot; + + /// + /// This field contains the zero-based index into the BbsTable for the H= DD diagnostics entry. + /// + UINT8 BbsTableEntryNumberForHddDiag; + + /// + /// The raw Beer data. + /// + UINT8 BeerData[128]; + + /// + /// The raw data of selected service area. + /// + UINT8 ServiceAreaData[64]; +} UD_TABLE; + +#define EFI_TO_LEGACY_MAJOR_VERSION 0x02 +#define EFI_TO_LEGACY_MINOR_VERSION 0x00 +#define MAX_IDE_CONTROLLER 8 + +/// +/// EFI_TO_COMPATIBILITY16_BOOT_TABLE +/// +typedef struct { + UINT16 MajorVersion; ///< The= EfiCompatibility major version number. + UINT16 MinorVersion; ///< The= EfiCompatibility minor version number. + UINT32 AcpiTable; ///< The= location of the RSDT ACPI table. < 4G range. + UINT32 SmbiosTable; ///< The= location of the SMBIOS table in EFI memory. < 4G range. + UINT32 SmbiosTableLength; + // + // Legacy SIO state + // + DEVICE_PRODUCER_DATA_HEADER SioData; ///< Sta= ndard traditional device information. + UINT16 DevicePathType; ///< The= default boot type. + UINT16 PciIrqMask; ///< Mas= k of which IRQs have been assigned to PCI. + UINT32 NumberE820Entries; ///< Num= ber of E820 entries. The number can change from the + ///< Com= patibility16InitializeYourself() function. + // + // Controller & Drive Identify[2] per controller information + // + HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Har= d disk drive information, including raw Identify Drive data. + UINT32 NumberBbsEntries; ///< Num= ber of entries in the BBS table + UINT32 BbsTable; ///< A p= ointer to the BBS table. Type BBS_TABLE is defined below. + UINT32 SmmTable; ///< A p= ointer to the SMM table. Type SMM_TABLE is defined below. + UINT32 OsMemoryAbove1Mb; ///< The= amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can + ///< dif= fer from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more + ///< mem= ory may have been discovered. + UINT32 UnconventionalDeviceTable; ///< Inf= ormation to boot off an unconventional device like a PARTIES partition. Type + ///< UD_= TABLE is defined below. +} EFI_TO_COMPATIBILITY16_BOOT_TABLE; + +/// +/// EFI_LEGACY_INSTALL_PCI_HANDLER +/// +typedef struct { + UINT8 PciBus; ///< The PCI bus o= f the device. + UINT8 PciDeviceFun; ///< The PCI devic= e in bits 7:3 and function in bits 2:0. + UINT8 PciSegment; ///< The PCI segme= nt of the device. + UINT8 PciClass; ///< The PCI class= code of the device. + UINT8 PciSubclass; ///< The PCI subcl= ass code of the device. + UINT8 PciInterface; ///< The PCI inter= face code of the device. + // + // Primary section + // + UINT8 PrimaryIrq; ///< The primary d= evice IRQ. + UINT8 PrimaryReserved; ///< Reserved. + UINT16 PrimaryControl; ///< The primary d= evice control I/O base. + UINT16 PrimaryBase; ///< The primary d= evice I/O base. + UINT16 PrimaryBusMaster; ///< The primary d= evice bus master I/O base. + // + // Secondary Section + // + UINT8 SecondaryIrq; ///< The secondary= device IRQ. + UINT8 SecondaryReserved; ///< Reserved. + UINT16 SecondaryControl; ///< The secondary= device control I/O base. + UINT16 SecondaryBase; ///< The secondary= device I/O base. + UINT16 SecondaryBusMaster; ///< The secondary= device bus master I/O base. +} EFI_LEGACY_INSTALL_PCI_HANDLER; + +// +// Restore default pack value +// +#pragma pack() + +#endif --=20 2.43.0 _______________________________________________ SeaBIOS mailing list -- seabios@seabios.org To unsubscribe send an email to seabios-leave@seabios.org