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no-senders; approved; loop; banned-address; header-match-seabios.seabios.org-0; header-match-seabios.seabios.org-1; emergency; member-moderation; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: Jiaxun Yang X-Mailman-Version: 3.3.11b1 Precedence: list Subject: [SeaBIOS] [PATCH v2 7/9] LegacyBios.h: Add missing pack() pragma List-Id: SeaBIOS mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable Authentication-Results: coreboot.org; auth=pass smtp.auth=mailman@coreboot.org smtp.mailfrom=seabios-bounces@seabios.org X-Spamd-Bar: ---- X-ZohoMail-DKIM: fail (found 2 invalid signatures) X-ZM-MESSAGEID: 1756882431847116600 Content-Type: text/plain; charset="utf-8" To match #pragma pack(1) at begining of this file. Signed-off-by: Jiaxun Yang --- src/std/LegacyBios.h | 238 ++++++++++++++++++++++++++---------------------= ---- 1 file changed, 120 insertions(+), 118 deletions(-) diff --git a/src/std/LegacyBios.h b/src/std/LegacyBios.h index 5170c37865fc573d54a06c8b1140a353721daec7..04fbc350abe6cf90e5643293c4e= 6fbd70739b536 100644 --- a/src/std/LegacyBios.h +++ b/src/std/LegacyBios.h @@ -10,12 +10,12 @@ environment. Reverse thunk is the code that does the opposite. =20 Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.
-This program and the accompanying materials are licensed and made availabl= e under=20 -the terms and conditions of the BSD License that accompanies this distribu= tion. =20 +This program and the accompanying materials are licensed and made availabl= e under +the terms and conditions of the BSD License that accompanies this distribu= tion. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php. = =20 - =20 -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLI= ED. =20 @par Revision Reference: @@ -28,7 +28,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER= EXPRESS OR IMPLIED. #define _EFI_LEGACY_BIOS_H_ =20 /// -///=20 +/// /// #pragma pack(1) =20 @@ -51,75 +51,75 @@ typedef struct { /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed = as a DWORD or UINT32. /// UINT32 Signature; - =20 + /// /// The value required such that byte checksum of TableLength equals zer= o. /// UINT8 TableChecksum; - =20 + /// /// The length of this table. /// UINT8 TableLength; - =20 + /// /// The major EFI revision for which this table was generated. - ///=20 + /// UINT8 EfiMajorRevision; - =20 + /// /// The minor EFI revision for which this table was generated. /// UINT8 EfiMinorRevision; - =20 + /// /// The major revision of this table. /// UINT8 TableMajorRevision; - =20 + /// /// The minor revision of this table. /// UINT8 TableMinorRevision; - =20 + /// /// Reserved for future usage. /// UINT16 Reserved; - =20 + /// /// The segment of the entry point within the traditional BIOS for Compa= tibility16 functions. /// UINT16 Compatibility16CallSegment; - =20 + /// /// The offset of the entry point within the traditional BIOS for Compat= ibility16 functions. /// UINT16 Compatibility16CallOffset; - =20 + /// - /// The segment of the entry point within the traditional BIOS for EfiCo= mpatibility=20 + /// The segment of the entry point within the traditional BIOS for EfiCo= mpatibility /// to invoke the PnP installation check. /// UINT16 PnPInstallationCheckSegment; - =20 + /// - /// The Offset of the entry point within the traditional BIOS for EfiCom= patibility=20 + /// The Offset of the entry point within the traditional BIOS for EfiCom= patibility /// to invoke the PnP installation check. /// UINT16 PnPInstallationCheckOffset; - =20 + /// - /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the = IntelPlatform=20 + /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the = IntelPlatform ///Innovation Framework for EFI Driver Execution Environment Core Interf= ace Specification (DXE CIS). /// - UINT32 EfiSystemTable;=20 - =20 + UINT32 EfiSystemTable; + /// /// The address of an OEM-provided identifier string. The string is null= terminated. /// UINT32 OemIdStringPointer; - =20 + /// /// The 32-bit physical address where ACPI RSD PTR is stored within the = traditional /// BIOS. The remained of the ACPI tables are located at their EFI addre= sses. The size @@ -127,93 +127,93 @@ typedef struct { /// RSD PTR with either the ACPI 1.0b or 2.0 values. /// UINT32 AcpiRsdPtrPointer; - =20 + /// /// The OEM revision number. Usage is undefined but provided for OEM mod= ule usage. /// UINT16 OemRevision; - =20 + /// /// The 32-bit physical address where INT15 E820 data is stored within t= he traditional /// BIOS. The EfiCompatibility code will fill in the E820Pointer value a= nd copy the /// data to the indicated area. /// UINT32 E820Pointer; - =20 + /// /// The length of the E820 data and is filled in by the EfiCompatibility= code. /// UINT32 E820Length; - =20 + /// /// The 32-bit physical address where the $PIR table is stored in the tr= aditional BIOS. /// The EfiCompatibility code will fill in the IrqRoutingTablePointer va= lue and /// copy the data to the indicated area. /// UINT32 IrqRoutingTablePointer; - =20 + /// /// The length of the $PIR table and is filled in by the EfiCompatibilit= y code. /// UINT32 IrqRoutingTableLength; - =20 + /// /// The 32-bit physical address where the MP table is stored in the trad= itional BIOS. - /// The EfiCompatibility code will fill in the MpTablePtr value and copy= the data=20 + /// The EfiCompatibility code will fill in the MpTablePtr value and copy= the data /// to the indicated area. /// UINT32 MpTablePtr; - =20 + /// /// The length of the MP table and is filled in by the EfiCompatibility = code. /// UINT32 MpTableLength; - =20 + /// /// The segment of the OEM-specific INT table/code. - ///=20 + /// UINT16 OemIntSegment; - =20 + /// /// The offset of the OEM-specific INT table/code. /// UINT16 OemIntOffset; - =20 + /// /// The segment of the OEM-specific 32-bit table/code. /// UINT16 Oem32Segment; - =20 + /// /// The offset of the OEM-specific 32-bit table/code. /// UINT16 Oem32Offset; - =20 + /// /// The segment of the OEM-specific 16-bit table/code. /// UINT16 Oem16Segment; - =20 + /// /// The offset of the OEM-specific 16-bit table/code. /// UINT16 Oem16Offset; - =20 + /// /// The segment of the TPM binary passed to 16-bit CSM. /// UINT16 TpmSegment; - =20 + /// /// The offset of the TPM binary passed to 16-bit CSM. /// UINT16 TpmOffset; - =20 + /// /// A pointer to a string identifying the independent BIOS vendor. /// UINT32 IbvPointer; - =20 + /// /// This field is NULL for all systems not supporting PCI Express. This = field is the base /// value of the start of the PCI Express memory-mapped configuration re= gisters and @@ -223,7 +223,7 @@ typedef struct { /// Functions. /// UINT32 PciExpressBase; - =20 + /// /// Maximum PCI bus number assigned. /// @@ -251,12 +251,12 @@ typedef struct { } EFI_COMPATIBILITY16_TABLE; =20 /// -/// Functions provided by the CSM binary which communicate between the Efi= Compatibility=20 +/// Functions provided by the CSM binary which communicate between the Efi= Compatibility /// and Compatability16 code. /// -/// Inconsistent with the specification here:=20 -/// The member's name started with "Compatibility16" [defined in Intel Fra= mework=20 -/// Compatibility Support Module Specification / 0.97 version]=20 +/// Inconsistent with the specification here: +/// The member's name started with "Compatibility16" [defined in Intel Fra= mework +/// Compatibility Support Module Specification / 0.97 version] /// has been changed to "Legacy16" since keeping backward compatible. /// typedef enum { @@ -269,7 +269,7 @@ typedef enum { /// AX =3D Return Status codes /// Legacy16InitializeYourself =3D 0x0000, - =20 + /// /// Causes the Compatibility16 BIOS to perform any drive number translat= ions to match the boot sequence. /// Input: @@ -279,18 +279,18 @@ typedef enum { /// AX =3D Returned status codes /// Legacy16UpdateBbs =3D 0x0001, - =20 + /// /// Allows the Compatibility16 code to perform any final actions before = booting. The Compatibility16 /// code is read/write. /// Input: /// AX =3D Compatibility16PrepareToBoot - /// ES:BX =3D Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure =20 + /// ES:BX =3D Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure /// Return: /// AX =3D Returned status codes /// Legacy16PrepareToBoot =3D 0x0002, - =20 + /// /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is= Read/Only. /// Input: @@ -299,7 +299,7 @@ typedef enum { /// AX =3D Returned status codes /// Legacy16Boot =3D 0x0003, - =20 + /// /// Allows the Compatibility16 code to get the last device from which a = boot was attempted. This is /// stored in CMOS and is the priority number of the last attempted boot= device. @@ -310,7 +310,7 @@ typedef enum { /// BX =3D Priority number of the boot device. /// Legacy16RetrieveLastBootDevice =3D 0x0004, - =20 + /// /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 af= ter dispatching a legacy OpROM. /// Input: @@ -321,7 +321,7 @@ typedef enum { /// BX =3D Number of non-BBS-compliant devices found. Equals 0 if BBS = compliant. /// Legacy16DispatchOprom =3D 0x0005, - =20 + /// /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified = length and returns the address /// of that region. @@ -338,7 +338,7 @@ typedef enum { /// DS:BX =3D Address of the region /// Legacy16GetTableAddress =3D 0x0006, - =20 + /// /// Enables the EfiCompatibility module to do any nonstandard processing= of keyboard LEDs or state. /// Input: @@ -351,7 +351,7 @@ typedef enum { /// AX =3D Returned status codes /// Legacy16SetKeyboardLeds =3D 0x0007, - =20 + /// /// Enables the EfiCompatibility module to install an interrupt handler = for PCI mass media devices that /// do not have an OpROM associated with them. An example is SATA. @@ -380,8 +380,8 @@ typedef struct { UINT32 BbsTablePointer; ///< A pointer to the BBS table. UINT16 RuntimeSegment; ///< The segment where the OpROM c= an be relocated to. If this value is 0x0000, this ///< means that the relocation of = this run time code is not supported. - ///< Inconsistent with specificati= on here:=20 - ///< The member's name "OpromDesti= nationSegment" [defined in Intel Framework Compatibility Support Module Spe= cification / 0.97 version]=20 + ///< Inconsistent with specificati= on here: + ///< The member's name "OpromDesti= nationSegment" [defined in Intel Framework Compatibility Support Module Spe= cification / 0.97 version] ///< has been changed to "RuntimeS= egment" since keeping backward compatible. =20 } EFI_DISPATCH_OPROM_TABLE; @@ -394,52 +394,52 @@ typedef struct { /// Starting address of memory under 1 MB. The ending address is assumed= to be 640 KB or 0x9FFFF. /// UINT32 BiosLessThan1MB; - =20 + /// /// The starting address of the high memory block. /// UINT32 HiPmmMemory; - =20 + /// /// The length of high memory block. /// UINT32 HiPmmMemorySizeInBytes; - =20 + /// /// The segment of the reverse thunk call code. /// UINT16 ReverseThunkCallSegment; - =20 + /// /// The offset of the reverse thunk call code. /// UINT16 ReverseThunkCallOffset; - =20 + /// /// The number of E820 entries copied to the Compatibility16 BIOS. /// UINT32 NumberE820Entries; - =20 + /// /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory. /// UINT32 OsMemoryAbove1Mb; - =20 + /// /// The start of thunk code in main memory. Memory cannot be used by BIO= S or PMM. /// UINT32 ThunkStart; - =20 + /// /// The size of the thunk code. /// UINT32 ThunkSizeInBytes; - =20 + /// /// Starting address of memory under 1 MB. /// UINT32 LowPmmMemory; - =20 + /// /// The length of low Memory block. /// @@ -530,40 +530,40 @@ typedef struct { /// per IDE controller. The IdentifyDrive is per drive. Index 0 is maste= r and index /// 1 is slave. /// - UINT16 Status; =20 - =20 + UINT16 Status; + /// /// PCI bus of IDE controller. /// UINT32 Bus; - =20 + /// /// PCI device of IDE controller. /// UINT32 Device; - =20 + /// /// PCI function of IDE controller. /// UINT32 Function; - =20 + /// /// Command ports base address. /// UINT16 CommandBaseAddress; - =20 + /// /// Control ports base address. /// UINT16 ControlBaseAddress; - =20 + /// /// Bus master address. /// UINT16 BusMasterAddress; - =20 + UINT8 HddIrq; - =20 + /// /// Data that identifies the drive data; one per possible attached drive. /// @@ -591,7 +591,7 @@ typedef struct { UINT16 Enabled : 1; ///< If 0, ignore = this entry. UINT16 Failed : 1; ///< 0 =3D Not kno= wn if boot failure occurred. ///< 1 =3D Boot at= tempted failed. - =20 + /// /// State of media present. /// 00 =3D No bootable media is present in the device. @@ -611,64 +611,64 @@ typedef struct { /// The boot priority for this boot device. Values are defined below. /// UINT16 BootPriority; - =20 + /// /// The PCI bus for this boot device. /// UINT32 Bus; - =20 + /// /// The PCI device for this boot device. /// UINT32 Device; - =20 + /// /// The PCI function for the boot device. /// UINT32 Function; - =20 + /// /// The PCI class for this boot device. /// UINT8 Class; - =20 + /// /// The PCI Subclass for this boot device. /// UINT8 SubClass; - =20 + /// /// Segment:offset address of an ASCIIZ description string describing th= e manufacturer. /// UINT16 MfgStringOffset; - =20 + /// /// Segment:offset address of an ASCIIZ description string describing th= e manufacturer. - /// =20 + /// UINT16 MfgStringSegment; - =20 + /// /// BBS device type. BBS device types are defined below. /// UINT16 DeviceType; - =20 + /// /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below. /// BBS_STATUS_FLAGS StatusFlags; - =20 + /// /// Segment:Offset address of boot loader for IPL devices or install INT= 13 handler for /// BCV devices. /// UINT16 BootHandlerOffset; - =20 + /// /// Segment:Offset address of boot loader for IPL devices or install INT= 13 handler for /// BCV devices. - /// =20 + /// UINT16 BootHandlerSegment; - =20 + /// /// Segment:offset address of an ASCIIZ description string describing th= is device. /// @@ -678,38 +678,38 @@ typedef struct { /// Segment:offset address of an ASCIIZ description string describing th= is device. /// UINT16 DescStringSegment; - =20 + /// /// Reserved. /// UINT32 InitPerReserved; - =20 + /// /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup /// UINT32 AdditionalIrq13Handler; - =20 + /// /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup - /// =20 + /// UINT32 AdditionalIrq18Handler; - =20 + /// /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup - /// =20 + /// UINT32 AdditionalIrq19Handler; - =20 + /// /// The use of these fields is IBV dependent. They can be used to flag t= hat an OpROM /// has hooked the specified IRQ. The OpROM may be BBS compliant as some= SCSI /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIO= S Setup - /// =20 + /// UINT32 AdditionalIrq40Handler; UINT8 AssignedDriveNumber; UINT32 AdditionalIrq41Handler; @@ -749,17 +749,17 @@ typedef struct { /// values are reserved for future usage. /// UINT16 Type : 3; - =20 + /// /// The size of "port" in bits. Defined values are below. /// UINT16 PortGranularity : 3; - =20 + /// /// The size of data in bits. Defined values are below. /// UINT16 DataGranularity : 3; - =20 + /// /// Reserved for future use. /// @@ -824,17 +824,17 @@ typedef struct { /// SMM_ATTRIBUTES is defined below. /// SMM_ATTRIBUTES SmmAttributes; - =20 + /// /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below. /// SMM_FUNCTION SmmFunction; - =20 + /// /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16= bytes. /// UINT8 SmmPort; - =20 + /// /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16= bytes. /// @@ -857,18 +857,18 @@ typedef struct { /// This bit set indicates that the ServiceAreaData is valid. /// UINT8 DirectoryServiceValidity : 1; - =20 + /// /// This bit set indicates to use the Reserve Area Boot Code Address (RA= CBA) only if /// DirectoryServiceValidity is 0. /// UINT8 RabcaUsedFlag : 1; - =20 + /// /// This bit set indicates to execute hard disk diagnostics. /// UINT8 ExecuteHddDiagnosticsFlag : 1; - =20 + /// /// Reserved for future use. Set to 0. /// @@ -884,35 +884,35 @@ typedef struct { /// UDC_ATTRIBUTES is defined below. /// UDC_ATTRIBUTES Attributes; - =20 + /// /// This field contains the zero-based device on which the selected - /// ServiceDataArea is present. It is 0 for master and 1 for the slave d= evice. =20 + /// ServiceDataArea is present. It is 0 for master and 1 for the slave d= evice. /// UINT8 DeviceNumber; - =20 + /// /// This field contains the zero-based index into the BbsTable for the p= arent device. /// This index allows the user to reference the parent device informatio= n such as PCI /// bus, device function. /// UINT8 BbsTableEntryNumberForParentDevice; - =20 + /// /// This field contains the zero-based index into the BbsTable for the b= oot entry. /// UINT8 BbsTableEntryNumberForBoot; - =20 + /// /// This field contains the zero-based index into the BbsTable for the H= DD diagnostics entry. /// UINT8 BbsTableEntryNumberForHddDiag; - =20 + /// /// The raw Beer data. /// UINT8 BeerData[128]; - =20 + /// /// The raw data of selected service area. /// @@ -982,4 +982,6 @@ typedef struct { UINT16 SecondaryBusMaster; ///< The secondary= device bus master I/O base. } EFI_LEGACY_INSTALL_PCI_HANDLER; =20 +#pragma pack() + #endif --=20 2.43.0 _______________________________________________ SeaBIOS mailing list -- seabios@seabios.org To unsubscribe send an email to seabios-leave@seabios.org