From nobody Fri Dec 19 22:04:59 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of seabios.org designates 78.46.105.101 as permitted sender) client-ip=78.46.105.101; envelope-from=seabios-bounces@seabios.org; helo=coreboot.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of seabios.org designates 78.46.105.101 as permitted sender) smtp.mailfrom=seabios-bounces@seabios.org; dmarc=fail(p=none dis=none) header.from=flygoat.com Return-Path: Received: from coreboot.org (mail.coreboot.org [78.46.105.101]) by mx.zohomail.com with SMTPS id 1747925724525103.48498691500174; Thu, 22 May 2025 07:55:24 -0700 (PDT) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTPA id 81A654039A; Thu, 22 May 2025 14:55:18 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTP id E5BD34026E for ; Thu, 22 May 2025 14:55:04 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by mailfhigh.stl.internal (Postfix) with ESMTP id 0AFEE254012B; Thu, 22 May 2025 10:55:03 -0400 (EDT) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by phl-compute-03.internal (MEProxy); Thu, 22 May 2025 10:55:03 -0400 Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) 22 May 2025 10:55:02 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=flygoat.com; h= cc:cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:message-id:mime-version:reply-to :subject:subject:to:to; s=fm1; t=1747925702; x=1748012102; bh=+h hBWaLlh7OZsxSIpBMQ+fg+APUQEsDWCl5u7acWNlI=; b=aSvfe5Jn7v8B78TqUN lGgKmj5HNUJxvlJTPE2a3DiKeb9favPJ7glq4Xg0Jp4uW/qP91MVe2MXA1ZAaObF abxDUQPL32ZyZKGVucmyJQOuOd41T3bJuTz0KL5O6asnht7g8pOfva8+19bVR5Gj MZ9gy5ejsJAwpIrgA4WiUXlrolc41w/cPHPXokNg6nXoeDhB1mvnLQhLjfv8DZKD 2QEdVytpDaqTx7gCmHVQ+B9LSIdOZ9gxbevevatMvsNuJ0P0waasAtMKq0ldooTk 2NKWaIuGTOcazU5uOpyy+/DZXQAMPViGBpnVLBiZeO2dtnHOjqHFvzfj8BOpGiH2 ALhQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:message-id:mime-version:reply-to:subject :subject:to:to:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; t=1747925702; x=1748012102; bh=+hhBWaLlh7OZsxSIpBMQ+fg+APUQ EsDWCl5u7acWNlI=; b=L7lew8RL9dzKIKb4KzfWEfusoHjds/5V8F2K4MLLjg1L VdJZvuz90hltQZzM+9y6FSCkS9gJY17wM/pg1AXzRydqKwEA9P2/j/d8mb2rwPsa iUCrZb35on9KHQMFwb4hDONIyNGKb+2s45D48ab4AOG9fwPFTuZrZMgb2FSwTMy5 1C5ZRO7IGkSf7txkcTyocC+8ZiXEiCQpNJbNn+i1feh/y8qhJsIs0qq0Ud1vIMhO w9cENK6593gaBzijNQQZYg4K+gctUuOQuPpczQszGST9Kf4ySY66VJOqrDWbGZzI XLUAZWqy2IWY5j3ZPm38iR7lVG5Mja3YFWi6mC+JXA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtddtgdeivdehucdltddurdegfedvrddttd dmucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdggtfgf nhhsuhgsshgtrhhisggvpdfurfetoffkrfgpnffqhgenuceurghilhhouhhtmecufedttd enucenucfjughrpefhfffugggtgffkvfevofesthejredtredtjeenucfhrhhomheplfhi rgiguhhnucgjrghnghcuoehjihgrgihunhdrhigrnhhgsehflhihghhorghtrdgtohhmqe enucggtffrrghtthgvrhhnpeegledthedvkeetleffvdejtdfhueduheffheeggeevleeu kefggefgleegtdekffenucffohhmrghinheptghorhgvsghoohhtrdhorhhgpdhgihhthh husgdrtghomhenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhr ohhmpehjihgrgihunhdrhigrnhhgsehflhihghhorghtrdgtohhmpdhnsggprhgtphhtth hopedvpdhmohguvgepshhmthhpohhuthdprhgtphhtthhopehjihgrgihunhdrhigrnhhg sehflhihghhorghtrdgtohhmpdhrtghpthhtohepshgvrggsihhoshesshgvrggsihhosh drohhrgh X-ME-Proxy: Feedback-ID: ifd894703:Fastmail From: Jiaxun Yang Date: Thu, 22 May 2025 15:54:57 +0100 MIME-Version: 1.0 Message-Id: <20250522-ahci-v1-1-a9de195854f5@flygoat.com> X-B4-Tracking: v=1; b=H4sIAMA6L2gC/13MQQ6DIBCF4auYWZeGwWKkq96jcYE4yiStGDCmx nD3Updd/i8v3wGJIlOCe3VApI0Th7kEXipw3s4TCR5Kg5JKS62UsN6xaK1ramNML9sblOsSaeT PyTy70p7TGuJ+qhv+1j9gQ4GCLDld9w3ioB/ja5+CXa8uvKHLOX8BN3uNFZoAAAA= X-Change-ID: 20250522-ahci-8ac63999b084 To: seabios@seabios.org X-Developer-Signature: v=1; a=openpgp-sha256; l=2143; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=4bYxYJs95hzjHzaRRpN0Ps8wiFM9bpNA9lQ404sdfn4=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhgx9q6NerVYhjTpvtLduWLVo+al1a1UTY900ONMbO97kV 82ddOp1RykLgxgXg6yYIkuIgFLfhsaLC64/yPoDM4eVCWQIAxenAExEOp7hf0boxxiTMxf8OhiC t9sdzbPPt82v2sEX/t3RTkp0G6deASPDt3dBX+4KiBx/svVq2/wrs/40Nz5NL/j9VXeS/MR63+A EbgA= X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Message-ID-Hash: UJPJNZC6ATTHAZW24Y5YEJ27FG2LXOPT X-Message-ID-Hash: UJPJNZC6ATTHAZW24Y5YEJ27FG2LXOPT X-MailFrom: jiaxun.yang@flygoat.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-seabios.seabios.org-0; header-match-seabios.seabios.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: Jiaxun Yang X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [SeaBIOS] [PATCH] ahci: Controller reset fixes List-Id: SeaBIOS mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable Authentication-Results: coreboot.org; auth=pass smtp.auth=mailman@coreboot.org smtp.mailfrom=seabios-bounces@seabios.org X-Spamd-Bar: / X-ZM-MESSAGEID: 1747925726628116600 Content-Type: text/plain; charset="utf-8" After adding AHCI controller functionality there are multiple reports on AHCI booting regression. As per my experiments on various machines, to reset controller properly it is necessary to poll HOST_CTL_RESET bit until it's clear. It is also required to read back HOST_CTL after changing HOST_CTL_AHCI_EN bits to ensure the controller has accepted write. Tested on ASMedia ASM1061, Intel H61 native SATA and AMD Phoenix native SATA. Link: https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/thread/= RDNRKWBN4N5XQX2TQMM5P4WZ2OOPPNAM/ Link: https://github.com/FlyGoat/csmwrap/issues/14 Fixes: 8863cbbd15a7 ("ahci: add controller reset") Signed-off-by: Jiaxun Yang Acked-by: Paul Menzel --- To: seabios@seabios.org --- src/hw/ahci.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/src/hw/ahci.c b/src/hw/ahci.c index 2285d33d4ae21335e5222ab04608685b5bff3763..7e7a03ddd010d53fa439c8ca495= 05a2da00241f4 100644 --- a/src/hw/ahci.c +++ b/src/hw/ahci.c @@ -660,8 +660,23 @@ ahci_controller_setup(struct pci_device *pci) =20 pci_enable_busmaster(pci); =20 - ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET); - ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN); + u32 val =3D ahci_ctrl_readl(ctrl, HOST_CTL); + ahci_ctrl_writel(ctrl, HOST_CTL, val | HOST_CTL_RESET); + u32 end =3D timer_calc(AHCI_RESET_TIMEOUT); + for (;;) { + val =3D ahci_ctrl_readl(ctrl, HOST_CTL); + if (!(val & HOST_CTL_RESET)) + break; + if (timer_check(end)) { + warn_timeout(); + dprintf(1, "AHCI: controller reset failed\n"); + free(ctrl); + return; + } + yield(); + } + ahci_ctrl_writel(ctrl, HOST_CTL, val | HOST_CTL_AHCI_EN); + (void)ahci_ctrl_readl(ctrl, HOST_CTL); /* Flush */ =20 ctrl->caps =3D ahci_ctrl_readl(ctrl, HOST_CAP); ctrl->ports =3D ahci_ctrl_readl(ctrl, HOST_PORTS_IMPL); --- base-commit: 9029a010ec413e6c3c0eb52c29c252a5b9a9f774 change-id: 20250522-ahci-8ac63999b084 Best regards, --=20 Jiaxun Yang _______________________________________________ SeaBIOS mailing list -- seabios@seabios.org To unsubscribe send an email to seabios-leave@seabios.org