From nobody Sun Dec 22 03:59:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of seabios.org designates 78.46.105.101 as permitted sender) client-ip=78.46.105.101; envelope-from=seabios-bounces@seabios.org; helo=coreboot.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of seabios.org designates 78.46.105.101 as permitted sender) smtp.mailfrom=seabios-bounces@seabios.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from coreboot.org (coreboot.org [78.46.105.101]) by mx.zohomail.com with SMTPS id 173220799254149.37783996611745; Thu, 21 Nov 2024 08:53:12 -0800 (PST) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTPA id 2E1FCE15D0; Thu, 21 Nov 2024 16:53:06 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTP id 6BF87E1647 for ; Thu, 21 Nov 2024 16:52:50 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-221-3cgbDkxZMuiuV1J8LLPF4w-1; Thu, 21 Nov 2024 11:52:47 -0500 Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 333EF1956064 for ; Thu, 21 Nov 2024 16:52:46 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id A7A5819560A3; Thu, 21 Nov 2024 16:52:45 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) id 5B8F61800632; Thu, 21 Nov 2024 17:52:43 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1732207969; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Zi8qE6i6JGf4MvbWHkXp6hGV1Y+E5xN+yMUPbyJ8Z+0=; b=go+QR3bpdEFLwoDDdod4A7xOxEtwCul+e88MKjiik51dOgw/DwIH+e5RvwDBIXtpkRf2Fr xd1Aax+0FN54jlXtGVYmdBz1XAF3iQB47lGCD+QuQmO8mjjScrGfeNrnuz9IO/f3mAj8wY /F4FD0N105wItUpMRTX/w/Yj/t20dII= X-MC-Unique: 3cgbDkxZMuiuV1J8LLPF4w-1 X-Mimecast-MFC-AGG-ID: 3cgbDkxZMuiuV1J8LLPF4w From: Gerd Hoffmann To: seabios@seabios.org Date: Thu, 21 Nov 2024 17:52:42 +0100 Message-ID: <20241121165243.331061-2-kraxel@redhat.com> In-Reply-To: <20241121165243.331061-1-kraxel@redhat.com> References: <20241121165243.331061-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: VdaYRVayHL_7IyuDEYNZxAJHVXGipbFA_2XpCfcs7l0_1732207966 X-Mimecast-Originator: redhat.com Message-ID-Hash: GTWG66YFO4COFOV4CUCYNDPW6IVSVL7N X-Message-ID-Hash: GTWG66YFO4COFOV4CUCYNDPW6IVSVL7N X-MailFrom: kraxel@redhat.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-seabios.seabios.org-0; header-match-seabios.seabios.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: Gerd Hoffmann X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [SeaBIOS] [PATCH 1/2] drop obsolete acpi table code List-Id: SeaBIOS mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable Authentication-Results: coreboot.org; auth=pass smtp.auth=mailman@coreboot.org smtp.mailfrom=seabios-bounces@seabios.org X-Spamd-Bar: / X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1732207994762116600 Content-Type: text/plain; charset="utf-8"; x-default="true" It's there for backward compatibility with qemu 1.6 and older. This release is older than a decade. Even qemu itself has removed backward compatibility support (i.e. machine types) for qemu versions that old. It should be safe to remove this code now. Signed-off-by: Gerd Hoffmann Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- Makefile | 15 -- src/fw/acpi.c | 668 +------------------------------------------------- src/Kconfig | 10 - 3 files changed, 1 insertion(+), 692 deletions(-) diff --git a/Makefile b/Makefile index d3341870a760..4ccc2bee8129 100644 --- a/Makefile +++ b/Makefile @@ -251,21 +251,6 @@ $(OUT)vgabios.bin: $(OUT)vgabios.bin.raw scripts/build= rom.py $(Q)$(PYTHON) ./scripts/buildrom.py $< $@ =20 =20 -################ DSDT build rules - -iasl-option=3D$(shell if test -z "`$(1) $(2) 2>&1 > /dev/null`" \ - ; then echo "$(2)"; else echo "$(3)"; fi ;) - -%.hex: %.dsl ./scripts/acpi_extract_preprocess.py ./scripts/acpi_extract.py - @echo " Compiling IASL $@" - $(Q)$(CPP) $(CPPFLAGS) $< -o $(OUT)$*.dsl.i.orig - $(Q)$(PYTHON) ./scripts/acpi_extract_preprocess.py $(OUT)$*.dsl.i.orig > = $(OUT)$*.dsl.i - $(Q)$(IASL) $(call iasl-option,$(IASL),-Pn,) -vs -l -tc -p $(OUT)$* $(OUT= )$*.dsl.i - $(Q)$(PYTHON) ./scripts/acpi_extract.py $(OUT)$*.lst > $(OUT)$*.off - $(Q)cat $(OUT)$*.off > $@ - -iasl: src/fw/acpi-dsdt.hex src/fw/ssdt-proc.hex src/fw/ssdt-pcihp.hex src/= fw/ssdt-misc.hex - ################ Kconfig rules =20 define do-kconfig diff --git a/src/fw/acpi.c b/src/fw/acpi.c index 8bc2ca6b5842..f23234e9f5c7 100644 --- a/src/fw/acpi.c +++ b/src/fw/acpi.c @@ -6,680 +6,14 @@ // // This file may be distributed under the terms of the GNU LGPLv3 license. =20 -#include "byteorder.h" // cpu_to_le16 #include "config.h" // CONFIG_* -#include "dev-q35.h" -#include "dev-piix.h" -#include "hw/pcidevice.h" // pci_find_init_device -#include "hw/pci_ids.h" // PCI_VENDOR_ID_INTEL -#include "hw/pci_regs.h" // PCI_INTERRUPT_LINE -#include "malloc.h" // free #include "output.h" // dprintf -#include "paravirt.h" // RamSize -#include "romfile.h" // romfile_loadint -#include "std/acpi.h" // struct rsdp_descriptor -#include "string.h" // memset -#include "util.h" // MaxCountCPUs -#include "x86.h" // readl =20 -#include "fw/acpi-dsdt.hex" - -static void -build_header(struct acpi_table_header *h, u32 sig, int len, u8 rev) -{ - h->signature =3D cpu_to_le32(sig); - h->length =3D cpu_to_le32(len); - h->revision =3D rev; - memcpy(h->oem_id, BUILD_APPNAME6, 6); - memcpy(h->oem_table_id, BUILD_APPNAME4, 4); - memcpy(h->oem_table_id + 4, (void*)&sig, 4); - h->oem_revision =3D cpu_to_le32(1); - memcpy(h->asl_compiler_id, BUILD_APPNAME4, 4); - h->asl_compiler_revision =3D cpu_to_le32(1); - h->checksum -=3D checksum(h, len); -} - -static void piix4_fadt_setup(struct pci_device *pci, void *arg) -{ - struct fadt_descriptor_rev1 *fadt =3D arg; - - fadt->model =3D 1; - fadt->reserved1 =3D 0; - fadt->sci_int =3D cpu_to_le16(PIIX_PM_INTRRUPT); - fadt->smi_cmd =3D cpu_to_le32(PORT_SMI_CMD); - fadt->acpi_enable =3D PIIX_ACPI_ENABLE; - fadt->acpi_disable =3D PIIX_ACPI_DISABLE; - fadt->pm1a_evt_blk =3D cpu_to_le32(acpi_pm_base); - fadt->pm1a_cnt_blk =3D cpu_to_le32(acpi_pm_base + 0x04); - fadt->pm_tmr_blk =3D cpu_to_le32(acpi_pm_base + 0x08); - fadt->gpe0_blk =3D cpu_to_le32(PIIX_GPE0_BLK); - fadt->pm1_evt_len =3D 4; - fadt->pm1_cnt_len =3D 2; - fadt->pm_tmr_len =3D 4; - fadt->gpe0_blk_len =3D PIIX_GPE0_BLK_LEN; - fadt->plvl2_lat =3D cpu_to_le16(0xfff); // C2 state not supported - fadt->plvl3_lat =3D cpu_to_le16(0xfff); // C3 state not supported - fadt->flags =3D cpu_to_le32(ACPI_FADT_F_WBINVD | - ACPI_FADT_F_PROC_C1 | - ACPI_FADT_F_SLP_BUTTON | - ACPI_FADT_F_RTC_S4 | - ACPI_FADT_F_USE_PLATFORM_CLOCK); -} - -/* PCI_VENDOR_ID_INTEL && PCI_DEVICE_ID_INTEL_ICH9_LPC */ -static void ich9_lpc_fadt_setup(struct pci_device *dev, void *arg) -{ - struct fadt_descriptor_rev1 *fadt =3D arg; - - fadt->model =3D 1; - fadt->reserved1 =3D 0; - fadt->sci_int =3D cpu_to_le16(9); - fadt->smi_cmd =3D cpu_to_le32(PORT_SMI_CMD); - fadt->acpi_enable =3D ICH9_ACPI_ENABLE; - fadt->acpi_disable =3D ICH9_ACPI_DISABLE; - fadt->pm1a_evt_blk =3D cpu_to_le32(acpi_pm_base); - fadt->pm1a_cnt_blk =3D cpu_to_le32(acpi_pm_base + 0x04); - fadt->pm_tmr_blk =3D cpu_to_le32(acpi_pm_base + 0x08); - fadt->gpe0_blk =3D cpu_to_le32(acpi_pm_base + ICH9_PMIO_GPE0_STS); - fadt->pm1_evt_len =3D 4; - fadt->pm1_cnt_len =3D 2; - fadt->pm_tmr_len =3D 4; - fadt->gpe0_blk_len =3D ICH9_PMIO_GPE0_BLK_LEN; - fadt->plvl2_lat =3D cpu_to_le16(0xfff); // C2 state not supported - fadt->plvl3_lat =3D cpu_to_le16(0xfff); // C3 state not supported - fadt->flags =3D cpu_to_le32(ACPI_FADT_F_WBINVD | - ACPI_FADT_F_PROC_C1 | - ACPI_FADT_F_SLP_BUTTON | - ACPI_FADT_F_RTC_S4 | - ACPI_FADT_F_USE_PLATFORM_CLOCK); -} - -static const struct pci_device_id fadt_init_tbl[] =3D { - /* PIIX4 Power Management device (for ACPI) */ - PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, - piix4_fadt_setup), - PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_LPC, - ich9_lpc_fadt_setup), - PCI_DEVICE_END -}; - -static void fill_dsdt(struct fadt_descriptor_rev1 *fadt, void *dsdt) -{ - if (fadt->dsdt) { - free((void *)le32_to_cpu(fadt->dsdt)); - } - fadt->dsdt =3D cpu_to_le32((u32)dsdt); - fadt->checksum -=3D checksum(fadt, sizeof(*fadt)); - dprintf(1, "ACPI DSDT=3D%p\n", dsdt); -} - -static void * -build_fadt(struct pci_device *pci) -{ - struct fadt_descriptor_rev1 *fadt =3D malloc_high(sizeof(*fadt)); - struct facs_descriptor_rev1 *facs =3D memalign_high(64, sizeof(*facs)); - - if (!fadt || !facs) { - warn_noalloc(); - return NULL; - } - - /* FACS */ - memset(facs, 0, sizeof(*facs)); - facs->signature =3D cpu_to_le32(FACS_SIGNATURE); - facs->length =3D cpu_to_le32(sizeof(*facs)); - - /* FADT */ - memset(fadt, 0, sizeof(*fadt)); - fadt->firmware_ctrl =3D cpu_to_le32((u32)facs); - fadt->dsdt =3D 0; /* dsdt will be filled later in acpi_setup() - by fill_dsdt() */ - pci_init_device(fadt_init_tbl, pci, fadt); - - build_header((void*)fadt, FACP_SIGNATURE, sizeof(*fadt), 1); - - return fadt; -} - -static void* -build_madt(void) -{ - int madt_size =3D (sizeof(struct multiple_apic_table) - + sizeof(struct madt_processor_apic) * MaxCountCPUs - + sizeof(struct madt_io_apic) - + sizeof(struct madt_intsrcovr) * 16 - + sizeof(struct madt_local_nmi)); - - struct multiple_apic_table *madt =3D malloc_high(madt_size); - if (!madt) { - warn_noalloc(); - return NULL; - } - memset(madt, 0, madt_size); - madt->local_apic_address =3D cpu_to_le32(BUILD_APIC_ADDR); - madt->flags =3D cpu_to_le32(1); - struct madt_processor_apic *apic =3D (void*)&madt[1]; - int i; - for (i=3D0; itype =3D APIC_PROCESSOR; - apic->length =3D sizeof(*apic); - apic->processor_id =3D i; - apic->local_apic_id =3D i; - if (apic_id_is_present(apic->local_apic_id)) - apic->flags =3D cpu_to_le32(1); - else - apic->flags =3D cpu_to_le32(0); - apic++; - } - struct madt_io_apic *io_apic =3D (void*)apic; - io_apic->type =3D APIC_IO; - io_apic->length =3D sizeof(*io_apic); - io_apic->io_apic_id =3D BUILD_IOAPIC_ID; - io_apic->address =3D cpu_to_le32(BUILD_IOAPIC_ADDR); - io_apic->interrupt =3D cpu_to_le32(0); - - struct madt_intsrcovr *intsrcovr =3D (void*)&io_apic[1]; - if (romfile_loadint("etc/irq0-override", 0)) { - memset(intsrcovr, 0, sizeof(*intsrcovr)); - intsrcovr->type =3D APIC_XRUPT_OVERRIDE; - intsrcovr->length =3D sizeof(*intsrcovr); - intsrcovr->source =3D 0; - intsrcovr->gsi =3D cpu_to_le32(2); - intsrcovr->flags =3D cpu_to_le16(0); /* conforms to bus specifica= tions */ - intsrcovr++; - } - for (i =3D 1; i < 16; i++) { - if (!(BUILD_PCI_IRQS & (1 << i))) - /* No need for a INT source override structure. */ - continue; - memset(intsrcovr, 0, sizeof(*intsrcovr)); - intsrcovr->type =3D APIC_XRUPT_OVERRIDE; - intsrcovr->length =3D sizeof(*intsrcovr); - intsrcovr->source =3D i; - intsrcovr->gsi =3D cpu_to_le32(i); - intsrcovr->flags =3D cpu_to_le16(0xd); /* active high, level trig= gered */ - intsrcovr++; - } - - struct madt_local_nmi *local_nmi =3D (void*)intsrcovr; - local_nmi->type =3D APIC_LOCAL_NMI; - local_nmi->length =3D sizeof(*local_nmi); - local_nmi->processor_id =3D 0xff; /* all processors */ - local_nmi->flags =3D cpu_to_le16(0); - local_nmi->lint =3D 1; /* LINT1 */ - local_nmi++; - - build_header((void*)madt, APIC_SIGNATURE, (void*)local_nmi - (void*)ma= dt, 1); - return madt; -} - -// Encode a hex value -static inline char getHex(u32 val) { - val &=3D 0x0f; - return (val <=3D 9) ? ('0' + val) : ('A' + val - 10); -} - -// Encode a length in an SSDT. -static u8 * -encodeLen(u8 *ssdt_ptr, int length, int bytes) -{ - switch (bytes) { - default: - case 4: ssdt_ptr[3] =3D ((length >> 20) & 0xff); - case 3: ssdt_ptr[2] =3D ((length >> 12) & 0xff); - case 2: ssdt_ptr[1] =3D ((length >> 4) & 0xff); - ssdt_ptr[0] =3D (((bytes-1) & 0x3) << 6) | (length & 0x0f); - break; - case 1: ssdt_ptr[0] =3D length & 0x3f; - } - return ssdt_ptr + bytes; -} - -#include "fw/ssdt-proc.hex" - -/* 0x5B 0x83 ProcessorOp PkgLength NameString ProcID */ -#define PROC_OFFSET_CPUHEX (*ssdt_proc_name - *ssdt_proc_start + 2) -#define PROC_OFFSET_CPUID1 (*ssdt_proc_name - *ssdt_proc_start + 4) -#define PROC_OFFSET_CPUID2 (*ssdt_proc_id - *ssdt_proc_start) -#define PROC_SIZEOF (*ssdt_proc_end - *ssdt_proc_start) -#define PROC_AML (ssdp_proc_aml + *ssdt_proc_start) - -/* 0x5B 0x82 DeviceOp PkgLength NameString */ -#define PCIHP_OFFSET_HEX (*ssdt_pcihp_name - *ssdt_pcihp_start + 1) -#define PCIHP_OFFSET_ID (*ssdt_pcihp_id - *ssdt_pcihp_start) -#define PCIHP_OFFSET_ADR (*ssdt_pcihp_adr - *ssdt_pcihp_start) -#define PCIHP_OFFSET_EJ0 (*ssdt_pcihp_ej0 - *ssdt_pcihp_start) -#define PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start) -#define PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start) -#define PCI_SLOTS 32 - -#define SSDT_SIGNATURE 0x54445353 // SSDT -#define SSDT_HEADER_LENGTH 36 - -#include "fw/ssdt-misc.hex" -#include "fw/ssdt-pcihp.hex" - -#define PCI_RMV_BASE 0xae0c - -static u8* -build_notify(u8 *ssdt_ptr, const char *name, int skip, int count, - const char *target, int ofs) -{ - count -=3D skip; - - *(ssdt_ptr++) =3D 0x14; // MethodOp - ssdt_ptr =3D encodeLen(ssdt_ptr, 2+5+(12*count), 2); - memcpy(ssdt_ptr, name, 4); - ssdt_ptr +=3D 4; - *(ssdt_ptr++) =3D 0x02; // MethodOp - - int i; - for (i =3D skip; count-- > 0; i++) { - *(ssdt_ptr++) =3D 0xA0; // IfOp - ssdt_ptr =3D encodeLen(ssdt_ptr, 11, 1); - *(ssdt_ptr++) =3D 0x93; // LEqualOp - *(ssdt_ptr++) =3D 0x68; // Arg0Op - *(ssdt_ptr++) =3D 0x0A; // BytePrefix - *(ssdt_ptr++) =3D i; - *(ssdt_ptr++) =3D 0x86; // NotifyOp - memcpy(ssdt_ptr, target, 4); - ssdt_ptr[ofs] =3D getHex(i >> 4); - ssdt_ptr[ofs + 1] =3D getHex(i); - ssdt_ptr +=3D 4; - *(ssdt_ptr++) =3D 0x69; // Arg1Op - } - return ssdt_ptr; -} - -static void patch_pcihp(int slot, u8 *ssdt_ptr, u32 eject) -{ - ssdt_ptr[PCIHP_OFFSET_HEX] =3D getHex(slot >> 4); - ssdt_ptr[PCIHP_OFFSET_HEX+1] =3D getHex(slot); - ssdt_ptr[PCIHP_OFFSET_ID] =3D slot; - ssdt_ptr[PCIHP_OFFSET_ADR + 2] =3D slot; - - /* Runtime patching of EJ0: to disable hotplug for a slot, - * replace the method name: _EJ0 by EJ0_. */ - /* Sanity check */ - if (memcmp(ssdt_ptr + PCIHP_OFFSET_EJ0, "_EJ0", 4)) { - warn_internalerror(); - } - if (!eject) { - memcpy(ssdt_ptr + PCIHP_OFFSET_EJ0, "EJ0_", 4); - } -} - -static void* -build_ssdt(void) -{ - int acpi_cpus =3D MaxCountCPUs > 0xff ? 0xff : MaxCountCPUs; - int length =3D (sizeof(ssdp_misc_aml) // _S3_ / _S= 4_ / _S5_ - + (1+3+4) // Scope(_SB_) - + (acpi_cpus * PROC_SIZEOF) // procs - + (1+2+5+(12*acpi_cpus)) // NTFY - + (6+2+1+(1*acpi_cpus)) // CPON - + (1+3+4) // Scope(PCI0) - + ((PCI_SLOTS - 1) * PCIHP_SIZEOF) // slots - + (1+2+5+(12*(PCI_SLOTS - 1)))); // PCNT - u8 *ssdt =3D malloc_high(length); - if (! ssdt) { - warn_noalloc(); - return NULL; - } - u8 *ssdt_ptr =3D ssdt; - - // Copy header and encode fwcfg values in the S3_ / S4_ / S5_ packages - int sys_state_size; - char *sys_states =3D romfile_loadfile("etc/system-states", &sys_state_= size); - if (!sys_states || sys_state_size !=3D 6) - sys_states =3D (char[]){128, 0, 0, 129, 128, 128}; - - memcpy(ssdt_ptr, ssdp_misc_aml, sizeof(ssdp_misc_aml)); - if (!(sys_states[3] & 128)) - ssdt_ptr[acpi_s3_name[0]] =3D 'X'; - if (!(sys_states[4] & 128)) - ssdt_ptr[acpi_s4_name[0]] =3D 'X'; - else - ssdt_ptr[acpi_s4_pkg[0] + 1] =3D ssdt[acpi_s4_pkg[0] + 3] =3D sys_= states[4] & 127; - - // store pci io windows - *(u32*)&ssdt_ptr[acpi_pci32_start[0]] =3D cpu_to_le32(pcimem_start); - *(u32*)&ssdt_ptr[acpi_pci32_end[0]] =3D cpu_to_le32(pcimem_end - 1); - if (pcimem64_start) { - ssdt_ptr[acpi_pci64_valid[0]] =3D 1; - *(u64*)&ssdt_ptr[acpi_pci64_start[0]] =3D cpu_to_le64(pcimem64_sta= rt); - *(u64*)&ssdt_ptr[acpi_pci64_end[0]] =3D cpu_to_le64(pcimem64_end -= 1); - *(u64*)&ssdt_ptr[acpi_pci64_length[0]] =3D cpu_to_le64( - pcimem64_end - pcimem64_start); - } else { - ssdt_ptr[acpi_pci64_valid[0]] =3D 0; - } - - int pvpanic_port =3D romfile_loadint("etc/pvpanic-port", 0x0); - *(u16 *)(ssdt_ptr + *ssdt_isa_pest) =3D pvpanic_port; - - ssdt_ptr +=3D sizeof(ssdp_misc_aml); - - // build Scope(_SB_) header - *(ssdt_ptr++) =3D 0x10; // ScopeOp - ssdt_ptr =3D encodeLen(ssdt_ptr, length - (ssdt_ptr - ssdt), 3); - *(ssdt_ptr++) =3D '_'; - *(ssdt_ptr++) =3D 'S'; - *(ssdt_ptr++) =3D 'B'; - *(ssdt_ptr++) =3D '_'; - - // build Processor object for each processor - int i; - for (i=3D0; i> 4); - ssdt_ptr[PROC_OFFSET_CPUHEX+1] =3D getHex(i); - ssdt_ptr[PROC_OFFSET_CPUID1] =3D i; - ssdt_ptr[PROC_OFFSET_CPUID2] =3D i; - ssdt_ptr +=3D PROC_SIZEOF; - } - - // build "Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)= } ...}" - // Arg0 =3D Processor ID =3D APIC ID - ssdt_ptr =3D build_notify(ssdt_ptr, "NTFY", 0, acpi_cpus, "CP00", 2); - - // build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" - *(ssdt_ptr++) =3D 0x08; // NameOp - *(ssdt_ptr++) =3D 'C'; - *(ssdt_ptr++) =3D 'P'; - *(ssdt_ptr++) =3D 'O'; - *(ssdt_ptr++) =3D 'N'; - *(ssdt_ptr++) =3D 0x12; // PackageOp - ssdt_ptr =3D encodeLen(ssdt_ptr, 2+1+(1*acpi_cpus), 2); - *(ssdt_ptr++) =3D acpi_cpus; - for (i=3D0; i> 16; - u32 hpet_period =3D readl(hpet_base + HPET_PERIOD); - - if (hpet_vendor =3D=3D 0 || hpet_vendor =3D=3D 0xffff || - hpet_period =3D=3D 0 || hpet_period > 100000000) - return NULL; - - hpet =3D malloc_high(sizeof(*hpet)); - if (!hpet) { - warn_noalloc(); - return NULL; - } - - memset(hpet, 0, sizeof(*hpet)); - /* Note timer_block_id value must be kept in sync with value advertise= d by - * emulated hpet - */ - hpet->timer_block_id =3D cpu_to_le32(0x8086a201); - hpet->addr.address =3D cpu_to_le64(BUILD_HPET_ADDRESS); - build_header((void*)hpet, HPET_SIGNATURE, sizeof(*hpet), 1); - - return hpet; -} - -static void -acpi_build_srat_memory(struct srat_memory_affinity *numamem, - u64 base, u64 len, int node, int enabled) -{ - numamem->type =3D SRAT_MEMORY; - numamem->length =3D sizeof(*numamem); - memset(numamem->proximity, 0, 4); - numamem->proximity[0] =3D node; - numamem->flags =3D cpu_to_le32(!!enabled); - numamem->base_addr =3D cpu_to_le64(base); - numamem->range_length =3D cpu_to_le64(len); -} - -static void * -build_srat(void) -{ - int numadatasize, numacpusize; - u64 *numadata =3D romfile_loadfile("etc/numa-nodes", &numadatasize); - u64 *numacpumap =3D romfile_loadfile("etc/numa-cpu-map", &numacpusize); - if (!numadata || !numacpumap) - goto fail; - int max_cpu =3D numacpusize / sizeof(u64); - int nb_numa_nodes =3D numadatasize / sizeof(u64); - - struct system_resource_affinity_table *srat; - int srat_size =3D sizeof(*srat) + - sizeof(struct srat_processor_affinity) * max_cpu + - sizeof(struct srat_memory_affinity) * (nb_numa_nodes + 2); - - srat =3D malloc_high(srat_size); - if (!srat) { - warn_noalloc(); - goto fail; - } - - memset(srat, 0, srat_size); - srat->reserved1=3Dcpu_to_le32(1); - struct srat_processor_affinity *core =3D (void*)(srat + 1); - int i; - u64 curnode; - - for (i =3D 0; i < max_cpu; ++i) { - core->type =3D SRAT_PROCESSOR; - core->length =3D sizeof(*core); - core->local_apic_id =3D i; - curnode =3D *numacpumap++; - core->proximity_lo =3D curnode; - memset(core->proximity_hi, 0, 3); - core->local_sapic_eid =3D 0; - if (apic_id_is_present(i)) - core->flags =3D cpu_to_le32(1); - else - core->flags =3D cpu_to_le32(0); - core++; - } - - - /* the memory map is a bit tricky, it contains at least one hole - * from 640k-1M and possibly another one from 3.5G-4G. - */ - struct srat_memory_affinity *numamem =3D (void*)core; - int slots =3D 0; - u64 mem_len, mem_base, next_base =3D 0; - - acpi_build_srat_memory(numamem, 0, 640*1024, 0, 1); - next_base =3D 1024 * 1024; - numamem++; - slots++; - for (i =3D 1; i < nb_numa_nodes + 1; ++i) { - mem_base =3D next_base; - mem_len =3D *numadata++; - if (i =3D=3D 1) - mem_len -=3D 1024 * 1024; - next_base =3D mem_base + mem_len; - - /* Cut out the PCI hole */ - if (mem_base <=3D RamSize && next_base > RamSize) { - mem_len -=3D next_base - RamSize; - if (mem_len > 0) { - acpi_build_srat_memory(numamem, mem_base, mem_len, i-1, 1); - numamem++; - slots++; - } - mem_base =3D 1ULL << 32; - mem_len =3D next_base - RamSize; - next_base +=3D (1ULL << 32) - RamSize; - } - acpi_build_srat_memory(numamem, mem_base, mem_len, i-1, 1); - numamem++; - slots++; - } - for (; slots < nb_numa_nodes + 2; slots++) { - acpi_build_srat_memory(numamem, 0, 0, 0, 0); - numamem++; - } - - build_header((void*)srat, SRAT_SIGNATURE, srat_size, 1); - - free(numadata); - free(numacpumap); - return srat; -fail: - free(numadata); - free(numacpumap); - return NULL; -} - -static void * -build_mcfg_q35(void) -{ - struct acpi_table_mcfg *mcfg; - - int len =3D sizeof(*mcfg) + 1 * sizeof(mcfg->allocation[0]); - mcfg =3D malloc_high(len); - if (!mcfg) { - warn_noalloc(); - return NULL; - } - memset(mcfg, 0, len); - mcfg->allocation[0].address =3D cpu_to_le64(Q35_HOST_BRIDGE_PCIEXBAR_A= DDR); - mcfg->allocation[0].pci_segment =3D cpu_to_le16(Q35_HOST_PCIE_PCI_SEGM= ENT); - mcfg->allocation[0].start_bus_number =3D Q35_HOST_PCIE_START_BUS_NUMBE= R; - mcfg->allocation[0].end_bus_number =3D Q35_HOST_PCIE_END_BUS_NUMBER; - - build_header((void *)mcfg, MCFG_SIGNATURE, len, 1); - return mcfg; -} - -static const struct pci_device_id acpi_find_tbl[] =3D { - /* PIIX4 Power Management device. */ - PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, NULL), - PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_LPC, NULL), - PCI_DEVICE_END, -}; - -#define MAX_ACPI_TABLES 20 void acpi_setup(void) { if (! CONFIG_ACPI) return; =20 - dprintf(3, "init ACPI tables\n"); - - // This code is hardcoded for PIIX4 Power Management device. - struct pci_device *pci =3D pci_find_init_device(acpi_find_tbl, NULL); - if (!pci) - // Device not found - return; - - // Build ACPI tables - u32 tables[MAX_ACPI_TABLES], tbl_idx =3D 0; - -#define ACPI_INIT_TABLE(X) \ - do { \ - tables[tbl_idx] =3D cpu_to_le32((u32)(X)); \ - if (le32_to_cpu(tables[tbl_idx])) \ - tbl_idx++; \ - } while(0) - - struct fadt_descriptor_rev1 *fadt =3D build_fadt(pci); - ACPI_INIT_TABLE(fadt); - ACPI_INIT_TABLE(build_ssdt()); - ACPI_INIT_TABLE(build_madt()); - ACPI_INIT_TABLE(build_hpet()); - ACPI_INIT_TABLE(build_srat()); - if (pci->device =3D=3D PCI_DEVICE_ID_INTEL_ICH9_LPC) - ACPI_INIT_TABLE(build_mcfg_q35()); - - struct romfile_s *file =3D NULL; - for (;;) { - file =3D romfile_findprefix("acpi/", file); - if (!file) - break; - struct acpi_table_header *table =3D malloc_high(file->size); - if (!table) { - warn_noalloc(); - continue; - } - int ret =3D file->copy(file, table, file->size); - if (ret <=3D sizeof(*table)) - continue; - if (table->signature =3D=3D DSDT_SIGNATURE) { - if (fadt) { - fill_dsdt(fadt, table); - } - } else { - ACPI_INIT_TABLE(table); - } - if (tbl_idx =3D=3D MAX_ACPI_TABLES) { - warn_noalloc(); - break; - } - } - - if (CONFIG_ACPI_DSDT && fadt && !fadt->dsdt) { - /* default DSDT */ - struct acpi_table_header *dsdt =3D malloc_high(sizeof(AmlCode)); - if (!dsdt) { - warn_noalloc(); - return; - } - memcpy(dsdt, AmlCode, sizeof(AmlCode)); - fill_dsdt(fadt, dsdt); - /* Strip out compiler-generated header if any */ - memset(dsdt, 0, sizeof *dsdt); - build_header(dsdt, DSDT_SIGNATURE, sizeof(AmlCode), 1); - } - - // Build final rsdt table - struct rsdt_descriptor_rev1 *rsdt; - size_t rsdt_len =3D sizeof(*rsdt) + sizeof(u32) * tbl_idx; - rsdt =3D malloc_high(rsdt_len); - if (!rsdt) { - warn_noalloc(); - return; - } - memset(rsdt, 0, rsdt_len); - memcpy(rsdt->table_offset_entry, tables, sizeof(u32) * tbl_idx); - build_header((void*)rsdt, RSDT_SIGNATURE, rsdt_len, 1); - - // Build rsdp pointer table - struct rsdp_descriptor rsdp; - memset(&rsdp, 0, sizeof(rsdp)); - rsdp.signature =3D cpu_to_le64(RSDP_SIGNATURE); - memcpy(rsdp.oem_id, BUILD_APPNAME6, 6); - rsdp.rsdt_physical_address =3D cpu_to_le32((u32)rsdt); - rsdp.checksum -=3D checksum(&rsdp, 20); - copy_acpi_rsdp(&rsdp); + dprintf(1, "ACPI tables for qemu 1.6 and older are not supported any m= ore.\n"); } diff --git a/src/Kconfig b/src/Kconfig index 3a8ffa15fded..332b52d694b5 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -503,16 +503,6 @@ menu "BIOS Tables" default y help Support generation of ACPI tables. - config ACPI_DSDT - bool "Include default ACPI DSDT" - default y - depends on ACPI - help - Include default DSDT ACPI table in BIOS. - Required for QEMU 1.3 and older. - This option can be disabled for QEMU 1.4 and newer - to save some space in the ROM file. - If unsure, say Y. config FW_ROMFILE_LOAD bool "Load BIOS tables from ROM files" depends on QEMU_HARDWARE --=20 2.47.0 _______________________________________________ SeaBIOS mailing list -- seabios@seabios.org To unsubscribe send an email to seabios-leave@seabios.org From nobody Sun Dec 22 03:59:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of seabios.org designates 78.46.105.101 as permitted sender) client-ip=78.46.105.101; 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bh=/lxq2BtqIH1JXjJRa+lcNs1LFBOIFOvkYPj4EfDUWQs=; b=hmk1NOTIAUq7ZTqVCuUlMor+PmWnw222RL1XtDPuo4aS+XBhiRStE10CI6T28N3wLJn2Uz mowWkbekwtdKiETLwZ2IXhW7+2nPot7/Z50iNL4wAEN10h4MHXhb7s5fDOPdHG+QfVapkn zQcTNfh1FmM+jIi9fFXNFs3C6SydUHU= X-MC-Unique: QxFDrLarNceIHuex3G3_dg-1 X-Mimecast-MFC-AGG-ID: QxFDrLarNceIHuex3G3_dg From: Gerd Hoffmann To: seabios@seabios.org Date: Thu, 21 Nov 2024 17:52:43 +0100 Message-ID: <20241121165243.331061-3-kraxel@redhat.com> In-Reply-To: <20241121165243.331061-1-kraxel@redhat.com> References: <20241121165243.331061-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.15 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: Qqx2GTdbHlyOj4_7z5YwmNQBBO8tQlKWMAztQGjj4Ec_1732207969 X-Mimecast-Originator: redhat.com Message-ID-Hash: XPEGW3ET5HVTUXUBUWMSPJ72YKB5DM6S X-Message-ID-Hash: XPEGW3ET5HVTUXUBUWMSPJ72YKB5DM6S X-MailFrom: kraxel@redhat.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-seabios.seabios.org-0; header-match-seabios.seabios.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: Gerd Hoffmann X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [SeaBIOS] [PATCH 2/2] drop acpi tables and hex includes List-Id: SeaBIOS mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable Authentication-Results: coreboot.org; auth=pass smtp.auth=mailman@coreboot.org smtp.mailfrom=seabios-bounces@seabios.org X-Spamd-Bar: --- X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1732208022704116600 Content-Type: text/plain; charset="utf-8"; x-default="true" They are not used any more. Signed-off-by: Gerd Hoffmann Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- src/fw/acpi-dsdt-cpu-hotplug.dsl | 78 ----- src/fw/acpi-dsdt-dbug.dsl | 26 -- src/fw/acpi-dsdt-hpet.dsl | 36 -- src/fw/acpi-dsdt-isa.dsl | 102 ------ src/fw/acpi-dsdt-pci-crs.dsl | 90 ----- src/fw/acpi-dsdt.dsl | 342 ------------------- src/fw/acpi-dsdt.hex | 554 ------------------------------- src/fw/q35-acpi-dsdt.dsl | 450 ------------------------- src/fw/ssdt-misc.dsl | 104 ------ src/fw/ssdt-misc.hex | 88 ----- src/fw/ssdt-pcihp.dsl | 36 -- src/fw/ssdt-pcihp.hex | 38 --- src/fw/ssdt-proc.dsl | 48 --- src/fw/ssdt-proc.hex | 35 -- 14 files changed, 2027 deletions(-) delete mode 100644 src/fw/acpi-dsdt-cpu-hotplug.dsl delete mode 100644 src/fw/acpi-dsdt-dbug.dsl delete mode 100644 src/fw/acpi-dsdt-hpet.dsl delete mode 100644 src/fw/acpi-dsdt-isa.dsl delete mode 100644 src/fw/acpi-dsdt-pci-crs.dsl delete mode 100644 src/fw/acpi-dsdt.dsl delete mode 100644 src/fw/acpi-dsdt.hex delete mode 100644 src/fw/q35-acpi-dsdt.dsl delete mode 100644 src/fw/ssdt-misc.dsl delete mode 100644 src/fw/ssdt-misc.hex delete mode 100644 src/fw/ssdt-pcihp.dsl delete mode 100644 src/fw/ssdt-pcihp.hex delete mode 100644 src/fw/ssdt-proc.dsl delete mode 100644 src/fw/ssdt-proc.hex diff --git a/src/fw/acpi-dsdt-cpu-hotplug.dsl b/src/fw/acpi-dsdt-cpu-hotplu= g.dsl deleted file mode 100644 index 0f3e83b14d9e..000000000000 --- a/src/fw/acpi-dsdt-cpu-hotplug.dsl +++ /dev/null @@ -1,78 +0,0 @@ -/**************************************************************** - * CPU hotplug - ****************************************************************/ - -Scope(\_SB) { - /* Objects filled in by run-time generated SSDT */ - External(NTFY, MethodObj) - External(CPON, PkgObj) - - /* Methods called by run-time generated SSDT Processor objects */ - Method(CPMA, 1, NotSerialized) { - // _MAT method - create an madt apic buffer - // Arg0 =3D Processor ID =3D Local APIC ID - // Local0 =3D CPON flag for this cpu - Store(DerefOf(Index(CPON, Arg0)), Local0) - // Local1 =3D Buffer (in madt apic form) to return - Store(Buffer(8) {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}, Local1) - // Update the processor id, lapic id, and enable/disable status - Store(Arg0, Index(Local1, 2)) - Store(Arg0, Index(Local1, 3)) - Store(Local0, Index(Local1, 4)) - Return (Local1) - } - Method(CPST, 1, NotSerialized) { - // _STA method - return ON status of cpu - // Arg0 =3D Processor ID =3D Local APIC ID - // Local0 =3D CPON flag for this cpu - Store(DerefOf(Index(CPON, Arg0)), Local0) - If (Local0) { - Return (0xF) - } Else { - Return (0x0) - } - } - Method(CPEJ, 2, NotSerialized) { - // _EJ0 method - eject callback - Sleep(200) - } - - /* CPU hotplug notify method */ - OperationRegion(PRST, SystemIO, 0xaf00, 32) - Field(PRST, ByteAcc, NoLock, Preserve) { - PRS, 256 - } - Method(PRSC, 0) { - // Local5 =3D active cpu bitmap - Store(PRS, Local5) - // Local2 =3D last read byte from bitmap - Store(Zero, Local2) - // Local0 =3D Processor ID / APIC ID iterator - Store(Zero, Local0) - While (LLess(Local0, SizeOf(CPON))) { - // Local1 =3D CPON flag for this cpu - Store(DerefOf(Index(CPON, Local0)), Local1) - If (And(Local0, 0x07)) { - // Shift down previously read bitmap byte - ShiftRight(Local2, 1, Local2) - } Else { - // Read next byte from cpu bitmap - Store(DerefOf(Index(Local5, ShiftRight(Local0, 3))), Local= 2) - } - // Local3 =3D active state for this cpu - Store(And(Local2, 1), Local3) - - If (LNotEqual(Local1, Local3)) { - // State change - update CPON with new state - Store(Local3, Index(CPON, Local0)) - // Do CPU notify - If (LEqual(Local3, 1)) { - NTFY(Local0, 1) - } Else { - NTFY(Local0, 3) - } - } - Increment(Local0) - } - } -} diff --git a/src/fw/acpi-dsdt-dbug.dsl b/src/fw/acpi-dsdt-dbug.dsl deleted file mode 100644 index 276321f61787..000000000000 --- a/src/fw/acpi-dsdt-dbug.dsl +++ /dev/null @@ -1,26 +0,0 @@ -/**************************************************************** - * Debugging - ****************************************************************/ - -Scope(\) { - /* Debug Output */ - OperationRegion(DBG, SystemIO, 0x0402, 0x01) - Field(DBG, ByteAcc, NoLock, Preserve) { - DBGB, 8, - } - - /* Debug method - use this method to send output to the QEMU - * BIOS debug port. This method handles strings, integers, - * and buffers. For example: DBUG("abc") DBUG(0x123) */ - Method(DBUG, 1) { - ToHexString(Arg0, Local0) - ToBuffer(Local0, Local0) - Subtract(SizeOf(Local0), 1, Local1) - Store(Zero, Local2) - While (LLess(Local2, Local1)) { - Store(DerefOf(Index(Local0, Local2)), DBGB) - Increment(Local2) - } - Store(0x0A, DBGB) - } -} diff --git a/src/fw/acpi-dsdt-hpet.dsl b/src/fw/acpi-dsdt-hpet.dsl deleted file mode 100644 index f33e52795f8d..000000000000 --- a/src/fw/acpi-dsdt-hpet.dsl +++ /dev/null @@ -1,36 +0,0 @@ -/**************************************************************** - * HPET - ****************************************************************/ - -Scope(\_SB) { - Device(HPET) { - Name(_HID, EISAID("PNP0103")) - Name(_UID, 0) - OperationRegion(HPTM, SystemMemory, 0xFED00000, 0x400) - Field(HPTM, DWordAcc, Lock, Preserve) { - VEND, 32, - PRD, 32, - } - Method(_STA, 0, NotSerialized) { - Store(VEND, Local0) - Store(PRD, Local1) - ShiftRight(Local0, 16, Local0) - If (LOr(LEqual(Local0, 0), LEqual(Local0, 0xffff))) { - Return (0x0) - } - If (LOr(LEqual(Local1, 0), LGreater(Local1, 100000000))) { - Return (0x0) - } - Return (0x0F) - } - Name(_CRS, ResourceTemplate() { -#if 0 /* This makes WinXP BSOD for not yet figured reasons. */ - IRQNoFlags() {2, 8} -#endif - Memory32Fixed(ReadOnly, - 0xFED00000, // Address Base - 0x00000400, // Address Length - ) - }) - } -} diff --git a/src/fw/acpi-dsdt-isa.dsl b/src/fw/acpi-dsdt-isa.dsl deleted file mode 100644 index 23761dbbac88..000000000000 --- a/src/fw/acpi-dsdt-isa.dsl +++ /dev/null @@ -1,102 +0,0 @@ -/* Common legacy ISA style devices. */ -Scope(\_SB.PCI0.ISA) { - - Device(RTC) { - Name(_HID, EisaId("PNP0B00")) - Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x0070, 0x0070, 0x10, 0x02) - IRQNoFlags() { 8 } - IO(Decode16, 0x0072, 0x0072, 0x02, 0x06) - }) - } - - Device(KBD) { - Name(_HID, EisaId("PNP0303")) - Method(_STA, 0, NotSerialized) { - Return (0x0f) - } - Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x0060, 0x0060, 0x01, 0x01) - IO(Decode16, 0x0064, 0x0064, 0x01, 0x01) - IRQNoFlags() { 1 } - }) - } - - Device(MOU) { - Name(_HID, EisaId("PNP0F13")) - Method(_STA, 0, NotSerialized) { - Return (0x0f) - } - Name(_CRS, ResourceTemplate() { - IRQNoFlags() { 12 } - }) - } - - Device(FDC0) { - Name(_HID, EisaId("PNP0700")) - Method(_STA, 0, NotSerialized) { - Store(FDEN, Local0) - If (LEqual(Local0, 0)) { - Return (0x00) - } Else { - Return (0x0F) - } - } - Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x03F2, 0x03F2, 0x00, 0x04) - IO(Decode16, 0x03F7, 0x03F7, 0x00, 0x01) - IRQNoFlags() { 6 } - DMA(Compatibility, NotBusMaster, Transfer8) { 2 } - }) - } - - Device(LPT) { - Name(_HID, EisaId("PNP0400")) - Method(_STA, 0, NotSerialized) { - Store(LPEN, Local0) - If (LEqual(Local0, 0)) { - Return (0x00) - } Else { - Return (0x0F) - } - } - Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x0378, 0x0378, 0x08, 0x08) - IRQNoFlags() { 7 } - }) - } - - Device(COM1) { - Name(_HID, EisaId("PNP0501")) - Name(_UID, 0x01) - Method(_STA, 0, NotSerialized) { - Store(CAEN, Local0) - If (LEqual(Local0, 0)) { - Return (0x00) - } Else { - Return (0x0F) - } - } - Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x03F8, 0x03F8, 0x00, 0x08) - IRQNoFlags() { 4 } - }) - } - - Device(COM2) { - Name(_HID, EisaId("PNP0501")) - Name(_UID, 0x02) - Method(_STA, 0, NotSerialized) { - Store(CBEN, Local0) - If (LEqual(Local0, 0)) { - Return (0x00) - } Else { - Return (0x0F) - } - } - Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x02F8, 0x02F8, 0x00, 0x08) - IRQNoFlags() { 3 } - }) - } -} diff --git a/src/fw/acpi-dsdt-pci-crs.dsl b/src/fw/acpi-dsdt-pci-crs.dsl deleted file mode 100644 index d4218914f822..000000000000 --- a/src/fw/acpi-dsdt-pci-crs.dsl +++ /dev/null @@ -1,90 +0,0 @@ -/* PCI CRS (current resources) definition. */ -Scope(\_SB.PCI0) { - - Name(CRES, ResourceTemplate() { - WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode, - 0x0000, // Address Space Granularity - 0x0000, // Address Range Minimum - 0x00FF, // Address Range Maximum - 0x0000, // Address Translation Offset - 0x0100, // Address Length - ,, ) - IO(Decode16, - 0x0CF8, // Address Range Minimum - 0x0CF8, // Address Range Maximum - 0x01, // Address Alignment - 0x08, // Address Length - ) - WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRang= e, - 0x0000, // Address Space Granularity - 0x0000, // Address Range Minimum - 0x0CF7, // Address Range Maximum - 0x0000, // Address Translation Offset - 0x0CF8, // Address Length - ,, , TypeStatic) - WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRang= e, - 0x0000, // Address Space Granularity - 0x0D00, // Address Range Minimum - 0xFFFF, // Address Range Maximum - 0x0000, // Address Translation Offset - 0xF300, // Address Length - ,, , TypeStatic) - DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cache= able, ReadWrite, - 0x00000000, // Address Space Granularity - 0x000A0000, // Address Range Minimum - 0x000BFFFF, // Address Range Maximum - 0x00000000, // Address Translation Offset - 0x00020000, // Address Length - ,, , AddressRangeMemory, TypeStatic) - DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCa= cheable, ReadWrite, - 0x00000000, // Address Space Granularity - 0xE0000000, // Address Range Minimum - 0xFEBFFFFF, // Address Range Maximum - 0x00000000, // Address Translation Offset - 0x1EC00000, // Address Length - ,, PW32, AddressRangeMemory, TypeStatic) - }) - - Name(CR64, ResourceTemplate() { - QWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cache= able, ReadWrite, - 0x00000000, // Address Space Granularity - 0x8000000000, // Address Range Minimum - 0xFFFFFFFFFF, // Address Range Maximum - 0x00000000, // Address Translation Offset - 0x8000000000, // Address Length - ,, PW64, AddressRangeMemory, TypeStatic) - }) - - Method(_CRS, 0) { - /* Fields provided by dynamically created ssdt */ - External(P0S, IntObj) - External(P0E, IntObj) - External(P1V, IntObj) - External(P1S, BuffObj) - External(P1E, BuffObj) - External(P1L, BuffObj) - - /* fixup 32bit pci io window */ - CreateDWordField(CRES, \_SB.PCI0.PW32._MIN, PS32) - CreateDWordField(CRES, \_SB.PCI0.PW32._MAX, PE32) - CreateDWordField(CRES, \_SB.PCI0.PW32._LEN, PL32) - Store(P0S, PS32) - Store(P0E, PE32) - Store(Add(Subtract(P0E, P0S), 1), PL32) - - If (LEqual(P1V, Zero)) { - Return (CRES) - } - - /* fixup 64bit pci io window */ - CreateQWordField(CR64, \_SB.PCI0.PW64._MIN, PS64) - CreateQWordField(CR64, \_SB.PCI0.PW64._MAX, PE64) - CreateQWordField(CR64, \_SB.PCI0.PW64._LEN, PL64) - Store(P1S, PS64) - Store(P1E, PE64) - Store(P1L, PL64) - /* add window and return result */ - ConcatenateResTemplate(CRES, CR64, Local0) - Return (Local0) - } -} diff --git a/src/fw/acpi-dsdt.dsl b/src/fw/acpi-dsdt.dsl deleted file mode 100644 index 3556dcaf123b..000000000000 --- a/src/fw/acpi-dsdt.dsl +++ /dev/null @@ -1,342 +0,0 @@ -/* - * Bochs/QEMU ACPI DSDT ASL definition - * - * Copyright (c) 2006 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License version 2 as published by the Free Software Foundation. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 U= SA - */ - -ACPI_EXTRACT_ALL_CODE AmlCode - -DefinitionBlock ( - "acpi-dsdt.aml", // Output Filename - "DSDT", // Signature - 0x01, // DSDT Compliance Revision - "BXPC", // OEMID - "BXDSDT", // TABLE ID - 0x1 // OEM Revision - ) -{ - -#include "acpi-dsdt-dbug.dsl" - - -/**************************************************************** - * PCI Bus definition - ****************************************************************/ - - Scope(\_SB) { - Device(PCI0) { - Name(_HID, EisaId("PNP0A03")) - Name(_ADR, 0x00) - Name(_UID, 1) - } - } - -#include "acpi-dsdt-pci-crs.dsl" -#include "acpi-dsdt-hpet.dsl" - - -/**************************************************************** - * VGA - ****************************************************************/ - - Scope(\_SB.PCI0) { - Device(VGA) { - Name(_ADR, 0x00020000) - OperationRegion(PCIC, PCI_Config, Zero, 0x4) - Field(PCIC, DWordAcc, NoLock, Preserve) { - VEND, 32 - } - Method(_S1D, 0, NotSerialized) { - Return (0x00) - } - Method(_S2D, 0, NotSerialized) { - Return (0x00) - } - Method(_S3D, 0, NotSerialized) { - If (LEqual(VEND, 0x1001b36)) { - Return (0x03) // QXL - } Else { - Return (0x00) - } - } - } - } - - -/**************************************************************** - * PIIX4 PM - ****************************************************************/ - - Scope(\_SB.PCI0) { - Device(PX13) { - Name(_ADR, 0x00010003) - OperationRegion(P13C, PCI_Config, 0x00, 0xff) - } - } - - -/**************************************************************** - * PIIX3 ISA bridge - ****************************************************************/ - - Scope(\_SB.PCI0) { - Device(ISA) { - Name(_ADR, 0x00010000) - - /* PIIX PCI to ISA irq remapping */ - OperationRegion(P40C, PCI_Config, 0x60, 0x04) - - /* enable bits */ - Field(\_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) { - Offset(0x5f), - , 7, - LPEN, 1, // LPT - Offset(0x67), - , 3, - CAEN, 1, // COM1 - , 3, - CBEN, 1, // COM2 - } - Name(FDEN, 1) - } - } - -#include "acpi-dsdt-isa.dsl" - - -/**************************************************************** - * PCI hotplug - ****************************************************************/ - - Scope(\_SB.PCI0) { - OperationRegion(PCST, SystemIO, 0xae00, 0x08) - Field(PCST, DWordAcc, NoLock, WriteAsZeros) { - PCIU, 32, - PCID, 32, - } - - OperationRegion(SEJ, SystemIO, 0xae08, 0x04) - Field(SEJ, DWordAcc, NoLock, WriteAsZeros) { - B0EJ, 32, - } - - /* Methods called by bulk generated PCI devices below */ - - /* Methods called by hotplug devices */ - Method(PCEJ, 1, NotSerialized) { - // _EJ0 method - eject callback - Store(ShiftLeft(1, Arg0), B0EJ) - } - - /* Hotplug notification method supplied by SSDT */ - External(\_SB.PCI0.PCNT, MethodObj) - - /* PCI hotplug notify method */ - Method(PCNF, 0) { - // Local0 =3D iterator - Store(Zero, Local0) - While (LLess(Local0, 31)) { - Increment(Local0) - If (And(PCIU, ShiftLeft(1, Local0))) { - PCNT(Local0, 1) - } - If (And(PCID, ShiftLeft(1, Local0))) { - PCNT(Local0, 3) - } - } - } - } - - -/**************************************************************** - * PCI IRQs - ****************************************************************/ - - Scope(\_SB) { - Scope(PCI0) { - Name(_PRT, Package() { - /* PCI IRQ routing table, example from ACPI 2.0a specifica= tion, - section 6.2.8.1 */ - /* Note: we provide the same info as the PCI routing - table of the Bochs BIOS */ - -#define prt_slot(nr, lnk0, lnk1, lnk2, lnk3) \ - Package() { nr##ffff, 0, lnk0, 0 }, \ - Package() { nr##ffff, 1, lnk1, 0 }, \ - Package() { nr##ffff, 2, lnk2, 0 }, \ - Package() { nr##ffff, 3, lnk3, 0 } - -#define prt_slot0(nr) prt_slot(nr, LNKD, LNKA, LNKB, LNKC) -#define prt_slot1(nr) prt_slot(nr, LNKA, LNKB, LNKC, LNKD) -#define prt_slot2(nr) prt_slot(nr, LNKB, LNKC, LNKD, LNKA) -#define prt_slot3(nr) prt_slot(nr, LNKC, LNKD, LNKA, LNKB) - - prt_slot0(0x0000), - /* Device 1 is power mgmt device, and can only use irq 9 */ - prt_slot(0x0001, LNKS, LNKB, LNKC, LNKD), - prt_slot2(0x0002), - prt_slot3(0x0003), - prt_slot0(0x0004), - prt_slot1(0x0005), - prt_slot2(0x0006), - prt_slot3(0x0007), - prt_slot0(0x0008), - prt_slot1(0x0009), - prt_slot2(0x000a), - prt_slot3(0x000b), - prt_slot0(0x000c), - prt_slot1(0x000d), - prt_slot2(0x000e), - prt_slot3(0x000f), - prt_slot0(0x0010), - prt_slot1(0x0011), - prt_slot2(0x0012), - prt_slot3(0x0013), - prt_slot0(0x0014), - prt_slot1(0x0015), - prt_slot2(0x0016), - prt_slot3(0x0017), - prt_slot0(0x0018), - prt_slot1(0x0019), - prt_slot2(0x001a), - prt_slot3(0x001b), - prt_slot0(0x001c), - prt_slot1(0x001d), - prt_slot2(0x001e), - prt_slot3(0x001f), - }) - } - - Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) { - PRQ0, 8, - PRQ1, 8, - PRQ2, 8, - PRQ3, 8 - } - - Method(IQST, 1, NotSerialized) { - // _STA method - get status - If (And(0x80, Arg0)) { - Return (0x09) - } - Return (0x0B) - } - Method(IQCR, 1, Serialized) { - // _CRS method - get current settings - Name(PRR0, ResourceTemplate() { - Interrupt(, Level, ActiveHigh, Shared) { 0 } - }) - CreateDWordField(PRR0, 0x05, PRRI) - If (LLess(Arg0, 0x80)) { - Store(Arg0, PRRI) - } - Return (PRR0) - } - -#define define_link(link, uid, reg) \ - Device(link) { \ - Name(_HID, EISAID("PNP0C0F")) \ - Name(_UID, uid) \ - Name(_PRS, ResourceTemplate() { \ - Interrupt(, Level, ActiveHigh, Shared) { \ - 5, 10, 11 \ - } \ - }) \ - Method(_STA, 0, NotSerialized) { \ - Return (IQST(reg)) \ - } \ - Method(_DIS, 0, NotSerialized) { \ - Or(reg, 0x80, reg) \ - } \ - Method(_CRS, 0, NotSerialized) { \ - Return (IQCR(reg)) \ - } \ - Method(_SRS, 1, NotSerialized) { \ - CreateDWordField(Arg0, 0x05, PRRI) \ - Store(PRRI, reg) \ - } \ - } - - define_link(LNKA, 0, PRQ0) - define_link(LNKB, 1, PRQ1) - define_link(LNKC, 2, PRQ2) - define_link(LNKD, 3, PRQ3) - - Device(LNKS) { - Name(_HID, EISAID("PNP0C0F")) - Name(_UID, 4) - Name(_PRS, ResourceTemplate() { - Interrupt(, Level, ActiveHigh, Shared) { 9 } - }) - - // The SCI cannot be disabled and is always attached to GSI 9, - // so these are no-ops. We only need this link to override the - // polarity to active high and match the content of the MADT. - Method(_STA, 0, NotSerialized) { Return (0x0b) } - Method(_DIS, 0, NotSerialized) { } - Method(_CRS, 0, NotSerialized) { Return (_PRS) } - Method(_SRS, 1, NotSerialized) { } - } - } - -#include "acpi-dsdt-cpu-hotplug.dsl" - - -/**************************************************************** - * General purpose events - ****************************************************************/ - - Scope(\_GPE) { - Name(_HID, "ACPI0006") - - Method(_L00) { - } - Method(_E01) { - // PCI hotplug event - \_SB.PCI0.PCNF() - } - Method(_E02) { - // CPU hotplug event - \_SB.PRSC() - } - Method(_L03) { - } - Method(_L04) { - } - Method(_L05) { - } - Method(_L06) { - } - Method(_L07) { - } - Method(_L08) { - } - Method(_L09) { - } - Method(_L0A) { - } - Method(_L0B) { - } - Method(_L0C) { - } - Method(_L0D) { - } - Method(_L0E) { - } - Method(_L0F) { - } - } -} diff --git a/src/fw/acpi-dsdt.hex b/src/fw/acpi-dsdt.hex deleted file mode 100644 index 6a113cdd362f..000000000000 --- a/src/fw/acpi-dsdt.hex +++ /dev/null @@ -1,554 +0,0 @@ -/* DO NOT EDIT! This is an autogenerated file. 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* - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 U= SA - */ -/* - * Copyright (c) 2010 Isaku Yamahata - * yamahata at valinux co jp - * Based on acpi-dsdt.dsl, but heavily modified for q35 chipset. - */ - -DefinitionBlock ( - "q35-acpi-dsdt.aml",// Output Filename - "DSDT", // Signature - 0x01, // DSDT Compliance Revision - "BXPC", // OEMID - "BXDSDT", // TABLE ID - 0x2 // OEM Revision - ) -{ - -#include "acpi-dsdt-dbug.dsl" - - Scope(\_SB) { - OperationRegion(PCST, SystemIO, 0xae00, 0x0c) - OperationRegion(PCSB, SystemIO, 0xae0c, 0x01) - Field(PCSB, AnyAcc, NoLock, WriteAsZeros) { - PCIB, 8, - } - } - - -/**************************************************************** - * PCI Bus definition - ****************************************************************/ - - Scope(\_SB) { - Device(PCI0) { - Name(_HID, EisaId("PNP0A08")) - Name(_CID, EisaId("PNP0A03")) - Name(_ADR, 0x00) - Name(_UID, 1) - - // _OSC: based on sample of ACPI3.0b spec - Name(SUPP, 0) // PCI _OSC Support Field value - Name(CTRL, 0) // PCI _OSC Control Field value - Method(_OSC, 4) { - // Create DWORD-addressable fields from the Capabilities B= uffer - CreateDWordField(Arg3, 0, CDW1) - - // Check for proper UUID - If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD= 766"))) { - // Create DWORD-addressable fields from the Capabiliti= es Buffer - CreateDWordField(Arg3, 4, CDW2) - CreateDWordField(Arg3, 8, CDW3) - - // Save Capabilities DWORD2 & 3 - Store(CDW2, SUPP) - Store(CDW3, CTRL) - - // Always allow native PME, AER (no dependencies) - // Never allow SHPC (no SHPC controller in this system) - And(CTRL, 0x1D, CTRL) - -#if 0 // For now, nothing to do - If (Not(And(CDW1, 1))) { // Query flag clear? - // Disable GPEs for features granted native contro= l. - If (And(CTRL, 0x01)) { // Hot plug control granted? - Store(0, HPCE) // clear the hot plug SCI enabl= e bit - Store(1, HPCS) // clear the hot plug SCI statu= s bit - } - If (And(CTRL, 0x04)) { // PME control granted? - Store(0, PMCE) // clear the PME SCI enable bit - Store(1, PMCS) // clear the PME SCI status bit - } - If (And(CTRL, 0x10)) { // OS restoring PCI Express= cap structure? - // Set status to not restore PCI Express cap s= tructure - // upon resume from S3 - Store(1, S3CR) - } - } -#endif - If (LNotEqual(Arg1, One)) { - // Unknown revision - Or(CDW1, 0x08, CDW1) - } - If (LNotEqual(CDW3, CTRL)) { - // Capabilities bits were masked - Or(CDW1, 0x10, CDW1) - } - // Update DWORD3 in the buffer - Store(CTRL, CDW3) - } Else { - Or(CDW1, 4, CDW1) // Unrecognized UUID - } - Return (Arg3) - } - } - } - -#include "acpi-dsdt-pci-crs.dsl" -#include "acpi-dsdt-hpet.dsl" - - -/**************************************************************** - * VGA - ****************************************************************/ - - Scope(\_SB.PCI0) { - Device(VGA) { - Name(_ADR, 0x00010000) - Method(_S1D, 0, NotSerialized) { - Return (0x00) - } - Method(_S2D, 0, NotSerialized) { - Return (0x00) - } - Method(_S3D, 0, NotSerialized) { - Return (0x00) - } - } - } - - -/**************************************************************** - * LPC ISA bridge - ****************************************************************/ - - Scope(\_SB.PCI0) { - /* PCI D31:f0 LPC ISA bridge */ - Device(ISA) { - /* PCI D31:f0 */ - Name(_ADR, 0x001f0000) - - /* ICH9 PCI to ISA irq remapping */ - OperationRegion(PIRQ, PCI_Config, 0x60, 0x0C) - - OperationRegion(LPCD, PCI_Config, 0x80, 0x2) - Field(LPCD, AnyAcc, NoLock, Preserve) { - COMA, 3, - , 1, - COMB, 3, - - Offset(0x01), - LPTD, 2, - , 2, - FDCD, 2 - } - OperationRegion(LPCE, PCI_Config, 0x82, 0x2) - Field(LPCE, AnyAcc, NoLock, Preserve) { - CAEN, 1, - CBEN, 1, - LPEN, 1, - FDEN, 1 - } - } - } - -#include "acpi-dsdt-isa.dsl" - - -/**************************************************************** - * PCI IRQs - ****************************************************************/ - - /* Zero =3D> PIC mode, One =3D> APIC Mode */ - Name(\PICF, Zero) - Method(\_PIC, 1, NotSerialized) { - Store(Arg0, \PICF) - } - - Scope(\_SB) { - Scope(PCI0) { -#define prt_slot_lnk(nr, lnk0, lnk1, lnk2, lnk3) \ - Package() { nr##ffff, 0, lnk0, 0 }, \ - Package() { nr##ffff, 1, lnk1, 0 }, \ - Package() { nr##ffff, 2, lnk2, 0 }, \ - Package() { nr##ffff, 3, lnk3, 0 } - -#define prt_slot_lnkA(nr) prt_slot_lnk(nr, LNKA, LNKB, LNKC, LNKD) -#define prt_slot_lnkB(nr) prt_slot_lnk(nr, LNKB, LNKC, LNKD, LNKA) -#define prt_slot_lnkC(nr) prt_slot_lnk(nr, LNKC, LNKD, LNKA, LNKB) -#define prt_slot_lnkD(nr) prt_slot_lnk(nr, LNKD, LNKA, LNKB, LNKC) - -#define prt_slot_lnkE(nr) prt_slot_lnk(nr, LNKE, LNKF, LNKG, LNKH) -#define prt_slot_lnkF(nr) prt_slot_lnk(nr, LNKF, LNKG, LNKH, LNKE) -#define prt_slot_lnkG(nr) prt_slot_lnk(nr, LNKG, LNKH, LNKE, LNKF) -#define prt_slot_lnkH(nr) prt_slot_lnk(nr, LNKH, LNKE, LNKF, LNKG) - - Name(PRTP, package() { - prt_slot_lnkE(0x0000), - prt_slot_lnkF(0x0001), - prt_slot_lnkG(0x0002), - prt_slot_lnkH(0x0003), - prt_slot_lnkE(0x0004), - prt_slot_lnkF(0x0005), - prt_slot_lnkG(0x0006), - prt_slot_lnkH(0x0007), - prt_slot_lnkE(0x0008), - prt_slot_lnkF(0x0009), - prt_slot_lnkG(0x000a), - prt_slot_lnkH(0x000b), - prt_slot_lnkE(0x000c), - prt_slot_lnkF(0x000d), - prt_slot_lnkG(0x000e), - prt_slot_lnkH(0x000f), - prt_slot_lnkE(0x0010), - prt_slot_lnkF(0x0011), - prt_slot_lnkG(0x0012), - prt_slot_lnkH(0x0013), - prt_slot_lnkE(0x0014), - prt_slot_lnkF(0x0015), - prt_slot_lnkG(0x0016), - prt_slot_lnkH(0x0017), - prt_slot_lnkE(0x0018), - - /* INTA -> PIRQA for slot 25 - 31 - see the default value of DIR */ - prt_slot_lnkA(0x0019), - prt_slot_lnkA(0x001a), - prt_slot_lnkA(0x001b), - prt_slot_lnkA(0x001c), - prt_slot_lnkA(0x001d), - - /* PCIe->PCI bridge. use PIRQ[E-H] */ - prt_slot_lnkE(0x001e), - - prt_slot_lnkA(0x001f) - }) - -#define prt_slot_gsi(nr, gsi0, gsi1, gsi2, gsi3) \ - Package() { nr##ffff, 0, gsi0, 0 }, \ - Package() { nr##ffff, 1, gsi1, 0 }, \ - Package() { nr##ffff, 2, gsi2, 0 }, \ - Package() { nr##ffff, 3, gsi3, 0 } - -#define prt_slot_gsiA(nr) prt_slot_gsi(nr, GSIA, GSIB, GSIC, GSID) -#define prt_slot_gsiB(nr) prt_slot_gsi(nr, GSIB, GSIC, GSID, GSIA) -#define prt_slot_gsiC(nr) prt_slot_gsi(nr, GSIC, GSID, GSIA, GSIB) -#define prt_slot_gsiD(nr) prt_slot_gsi(nr, GSID, GSIA, GSIB, GSIC) - -#define prt_slot_gsiE(nr) prt_slot_gsi(nr, GSIE, GSIF, GSIG, GSIH) -#define prt_slot_gsiF(nr) prt_slot_gsi(nr, GSIF, GSIG, GSIH, GSIE) -#define prt_slot_gsiG(nr) prt_slot_gsi(nr, GSIG, GSIH, GSIE, GSIF) -#define prt_slot_gsiH(nr) prt_slot_gsi(nr, GSIH, GSIE, GSIF, GSIG) - - Name(PRTA, package() { - prt_slot_gsiE(0x0000), - prt_slot_gsiF(0x0001), - prt_slot_gsiG(0x0002), - prt_slot_gsiH(0x0003), - prt_slot_gsiE(0x0004), - prt_slot_gsiF(0x0005), - prt_slot_gsiG(0x0006), - prt_slot_gsiH(0x0007), - prt_slot_gsiE(0x0008), - prt_slot_gsiF(0x0009), - prt_slot_gsiG(0x000a), - prt_slot_gsiH(0x000b), - prt_slot_gsiE(0x000c), - prt_slot_gsiF(0x000d), - prt_slot_gsiG(0x000e), - prt_slot_gsiH(0x000f), - prt_slot_gsiE(0x0010), - prt_slot_gsiF(0x0011), - prt_slot_gsiG(0x0012), - prt_slot_gsiH(0x0013), - prt_slot_gsiE(0x0014), - prt_slot_gsiF(0x0015), - prt_slot_gsiG(0x0016), - prt_slot_gsiH(0x0017), - prt_slot_gsiE(0x0018), - - /* INTA -> PIRQA for slot 25 - 31, but 30 - see the default value of DIR */ - prt_slot_gsiA(0x0019), - prt_slot_gsiA(0x001a), - prt_slot_gsiA(0x001b), - prt_slot_gsiA(0x001c), - prt_slot_gsiA(0x001d), - - /* PCIe->PCI bridge. use PIRQ[E-H] */ - prt_slot_gsiE(0x001e), - - prt_slot_gsiA(0x001f) - }) - - Method(_PRT, 0, NotSerialized) { - /* PCI IRQ routing table, example from ACPI 2.0a specifica= tion, - section 6.2.8.1 */ - /* Note: we provide the same info as the PCI routing - table of the Bochs BIOS */ - If (LEqual(\PICF, Zero)) { - Return (PRTP) - } Else { - Return (PRTA) - } - } - } - - Field(PCI0.ISA.PIRQ, ByteAcc, NoLock, Preserve) { - PRQA, 8, - PRQB, 8, - PRQC, 8, - PRQD, 8, - - Offset(0x08), - PRQE, 8, - PRQF, 8, - PRQG, 8, - PRQH, 8 - } - - Method(IQST, 1, NotSerialized) { - // _STA method - get status - If (And(0x80, Arg0)) { - Return (0x09) - } - Return (0x0B) - } - Method(IQCR, 1, Serialized) { - // _CRS method - get current settings - Name(PRR0, ResourceTemplate() { - Interrupt(, Level, ActiveHigh, Shared) { 0 } - }) - CreateDWordField(PRR0, 0x05, PRRI) - Store(And(Arg0, 0x0F), PRRI) - Return (PRR0) - } - -#define define_link(link, uid, reg) \ - Device(link) { \ - Name(_HID, EISAID("PNP0C0F")) \ - Name(_UID, uid) \ - Name(_PRS, ResourceTemplate() { \ - Interrupt(, Level, ActiveHigh, Shared) { \ - 5, 10, 11 \ - } \ - }) \ - Method(_STA, 0, NotSerialized) { \ - Return (IQST(reg)) \ - } \ - Method(_DIS, 0, NotSerialized) { \ - Or(reg, 0x80, reg) \ - } \ - Method(_CRS, 0, NotSerialized) { \ - Return (IQCR(reg)) \ - } \ - Method(_SRS, 1, NotSerialized) { \ - CreateDWordField(Arg0, 0x05, PRRI) \ - Store(PRRI, reg) \ - } \ - } - - define_link(LNKA, 0, PRQA) - define_link(LNKB, 1, PRQB) - define_link(LNKC, 2, PRQC) - define_link(LNKD, 3, PRQD) - define_link(LNKE, 4, PRQE) - define_link(LNKF, 5, PRQF) - define_link(LNKG, 6, PRQG) - define_link(LNKH, 7, PRQH) - -#define define_gsi_link(link, uid, gsi) \ - Device(link) { \ - Name(_HID, EISAID("PNP0C0F")) \ - Name(_UID, uid) \ - Name(_PRS, ResourceTemplate() { \ - Interrupt(, Level, ActiveHigh, Shared) { \ - gsi \ - } \ - }) \ - Name(_CRS, ResourceTemplate() { \ - Interrupt(, Level, ActiveHigh, Shared) { \ - gsi \ - } \ - }) \ - Method(_SRS, 1, NotSerialized) { \ - } \ - } - - define_gsi_link(GSIA, 0, 0x10) - define_gsi_link(GSIB, 0, 0x11) - define_gsi_link(GSIC, 0, 0x12) - define_gsi_link(GSID, 0, 0x13) - define_gsi_link(GSIE, 0, 0x14) - define_gsi_link(GSIF, 0, 0x15) - define_gsi_link(GSIG, 0, 0x16) - define_gsi_link(GSIH, 0, 0x17) - } - -#include "acpi-dsdt-cpu-hotplug.dsl" - - -/**************************************************************** - * General purpose events - ****************************************************************/ - - Scope(\_GPE) { - Name(_HID, "ACPI0006") - - Method(_L00) { - } - Method(_L01) { - // CPU hotplug event - \_SB.PRSC() - } - Method(_L02) { - } - Method(_L03) { - } - Method(_L04) { - } - Method(_L05) { - } - Method(_L06) { - } - Method(_L07) { - } - Method(_L08) { - } - Method(_L09) { - } - Method(_L0A) { - } - Method(_L0B) { - } - Method(_L0C) { - } - Method(_L0D) { - } - Method(_L0E) { - } - Method(_L0F) { - } - } -} diff --git a/src/fw/ssdt-misc.dsl b/src/fw/ssdt-misc.dsl deleted file mode 100644 index d1d2c9e344e4..000000000000 --- a/src/fw/ssdt-misc.dsl +++ /dev/null @@ -1,104 +0,0 @@ -ACPI_EXTRACT_ALL_CODE ssdp_misc_aml - -DefinitionBlock ("ssdt-misc.aml", "SSDT", 0x01, "BXPC", "BXSSDTSU", 0x1) -{ - -/**************************************************************** - * PCI memory ranges - ****************************************************************/ - - Scope(\) { - ACPI_EXTRACT_NAME_DWORD_CONST acpi_pci32_start - Name(P0S, 0x12345678) - ACPI_EXTRACT_NAME_DWORD_CONST acpi_pci32_end - Name(P0E, 0x12345678) - ACPI_EXTRACT_NAME_BYTE_CONST acpi_pci64_valid - Name(P1V, 0x12) - ACPI_EXTRACT_NAME_BUFFER8 acpi_pci64_start - Name(P1S, Buffer() { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00= }) - ACPI_EXTRACT_NAME_BUFFER8 acpi_pci64_end - Name(P1E, Buffer() { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00= }) - ACPI_EXTRACT_NAME_BUFFER8 acpi_pci64_length - Name(P1L, Buffer() { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00= }) - } - - -/**************************************************************** - * Suspend - ****************************************************************/ - - Scope(\) { - /* - * S3 (suspend-to-ram), S4 (suspend-to-disk) and S5 (power-off) type c= odes: - * must match piix4 emulation. - */ - - ACPI_EXTRACT_NAME_STRING acpi_s3_name - Name(_S3, Package(0x04) { - One, /* PM1a_CNT.SLP_TYP */ - One, /* PM1b_CNT.SLP_TYP */ - Zero, /* reserved */ - Zero /* reserved */ - }) - ACPI_EXTRACT_NAME_STRING acpi_s4_name - ACPI_EXTRACT_PKG_START acpi_s4_pkg - Name(_S4, Package(0x04) { - 0x2, /* PM1a_CNT.SLP_TYP */ - 0x2, /* PM1b_CNT.SLP_TYP */ - Zero, /* reserved */ - Zero /* reserved */ - }) - Name(_S5, Package(0x04) { - Zero, /* PM1a_CNT.SLP_TYP */ - Zero, /* PM1b_CNT.SLP_TYP */ - Zero, /* reserved */ - Zero /* reserved */ - }) - } - - External(\_SB.PCI0, DeviceObj) - External(\_SB.PCI0.ISA, DeviceObj) - - Scope(\_SB.PCI0.ISA) { - Device(PEVT) { - Name(_HID, "QEMU0001") - /* PEST will be patched to be Zero if no such device */ - ACPI_EXTRACT_NAME_WORD_CONST ssdt_isa_pest - Name(PEST, 0xFFFF) - OperationRegion(PEOR, SystemIO, PEST, 0x01) - Field(PEOR, ByteAcc, NoLock, Preserve) { - PEPT, 8, - } - - Method(_STA, 0, NotSerialized) { - Store(PEST, Local0) - If (LEqual(Local0, Zero)) { - Return (0x00) - } Else { - Return (0x0F) - } - } - - Method(RDPT, 0, NotSerialized) { - Store(PEPT, Local0) - Return (Local0) - } - - Method(WRPT, 1, NotSerialized) { - Store(Arg0, PEPT) - } - - Name(_CRS, ResourceTemplate() { - IO(Decode16, 0x00, 0x00, 0x01, 0x01, IO) - }) - - CreateWordField(_CRS, IO._MIN, IOMN) - CreateWordField(_CRS, IO._MAX, IOMX) - - Method(_INI, 0, NotSerialized) { - Store(PEST, IOMN) - Store(PEST, IOMX) - } - } - } -} diff --git a/src/fw/ssdt-misc.hex b/src/fw/ssdt-misc.hex deleted file mode 100644 index 6eb1c6dfe1eb..000000000000 --- a/src/fw/ssdt-misc.hex +++ /dev/null @@ -1,88 +0,0 @@ -/* DO NOT EDIT! This is an autogenerated file. See scripts/acpi_extract.= py. */ -static unsigned char acpi_pci64_length[] =3D { - 0x6f -}; - -static unsigned char acpi_s4_pkg[] =3D { - 0x8f -}; - -static unsigned char acpi_s3_name[] =3D { - 0x7c -}; - -static unsigned char acpi_pci32_start[] =3D { - 0x2f -}; - -static unsigned char acpi_pci64_valid[] =3D { - 0x43 -}; - -static unsigned char ssdp_misc_aml[] =3D { - 0x53, 0x53, 0x44, 0x54, 0x62, 0x01, 0x00, 0x00, - 0x01, 0x7f, 0x42, 0x58, 0x50, 0x43, 0x00, 0x00, - 0x42, 0x58, 0x53, 0x53, 0x44, 0x54, 0x53, 0x55, - 0x01, 0x00, 0x00, 0x00, 0x49, 0x4e, 0x54, 0x4c, - 0x18, 0x08, 0x15, 0x20, 0x10, 0x42, 0x05, 0x5c, - 0x00, 0x08, 0x50, 0x30, 0x53, 0x5f, 0x0c, 0x78, - 0x56, 0x34, 0x12, 0x08, 0x50, 0x30, 0x45, 0x5f, - 0x0c, 0x78, 0x56, 0x34, 0x12, 0x08, 0x50, 0x31, - 0x56, 0x5f, 0x0a, 0x12, 0x08, 0x50, 0x31, 0x53, - 0x5f, 0x11, 0x0b, 0x0a, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x50, 0x31, - 0x45, 0x5f, 0x11, 0x0b, 0x0a, 0x08, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x50, - 0x31, 0x4c, 0x5f, 0x11, 0x0b, 0x0a, 0x08, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, - 0x29, 0x5c, 0x00, 0x08, 0x5f, 0x53, 0x33, 0x5f, - 0x12, 0x06, 0x04, 0x01, 0x01, 0x00, 0x00, 0x08, - 0x5f, 0x53, 0x34, 0x5f, 0x12, 0x08, 0x04, 0x0a, - 0x02, 0x0a, 0x02, 0x00, 0x00, 0x08, 0x5f, 0x53, - 0x35, 0x5f, 0x12, 0x06, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x10, 0x40, 0x0c, 0x5c, 0x2f, 0x03, 0x5f, - 0x53, 0x42, 0x5f, 0x50, 0x43, 0x49, 0x30, 0x49, - 0x53, 0x41, 0x5f, 0x5b, 0x82, 0x4d, 0x0a, 0x50, - 0x45, 0x56, 0x54, 0x08, 0x5f, 0x48, 0x49, 0x44, - 0x0d, 0x51, 0x45, 0x4d, 0x55, 0x30, 0x30, 0x30, - 0x31, 0x00, 0x08, 0x50, 0x45, 0x53, 0x54, 0x0b, - 0xff, 0xff, 0x5b, 0x80, 0x50, 0x45, 0x4f, 0x52, - 0x01, 0x50, 0x45, 0x53, 0x54, 0x01, 0x5b, 0x81, - 0x0b, 0x50, 0x45, 0x4f, 0x52, 0x01, 0x50, 0x45, - 0x50, 0x54, 0x08, 0x14, 0x18, 0x5f, 0x53, 0x54, - 0x41, 0x00, 0x70, 0x50, 0x45, 0x53, 0x54, 0x60, - 0xa0, 0x06, 0x93, 0x60, 0x00, 0xa4, 0x00, 0xa1, - 0x04, 0xa4, 0x0a, 0x0f, 0x14, 0x0e, 0x52, 0x44, - 0x50, 0x54, 0x00, 0x70, 0x50, 0x45, 0x50, 0x54, - 0x60, 0xa4, 0x60, 0x14, 0x0c, 0x57, 0x52, 0x50, - 0x54, 0x01, 0x70, 0x68, 0x50, 0x45, 0x50, 0x54, - 0x08, 0x5f, 0x43, 0x52, 0x53, 0x11, 0x0d, 0x0a, - 0x0a, 0x47, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, - 0x01, 0x79, 0x00, 0x8b, 0x5f, 0x43, 0x52, 0x53, - 0x0a, 0x02, 0x49, 0x4f, 0x4d, 0x4e, 0x8b, 0x5f, - 0x43, 0x52, 0x53, 0x0a, 0x04, 0x49, 0x4f, 0x4d, - 0x58, 0x14, 0x18, 0x5f, 0x49, 0x4e, 0x49, 0x00, - 0x70, 0x50, 0x45, 0x53, 0x54, 0x49, 0x4f, 0x4d, - 0x4e, 0x70, 0x50, 0x45, 0x53, 0x54, 0x49, 0x4f, - 0x4d, 0x58 -}; - -static unsigned char ssdt_isa_pest[] =3D { - 0xd0 -}; - -static unsigned char acpi_s4_name[] =3D { - 0x88 -}; - -static unsigned char acpi_pci64_start[] =3D { - 0x4d -}; - -static unsigned char acpi_pci64_end[] =3D { - 0x5e -}; - -static unsigned char acpi_pci32_end[] =3D { - 0x39 -}; diff --git a/src/fw/ssdt-pcihp.dsl b/src/fw/ssdt-pcihp.dsl deleted file mode 100644 index 518a5ebfb980..000000000000 --- a/src/fw/ssdt-pcihp.dsl +++ /dev/null @@ -1,36 +0,0 @@ -ACPI_EXTRACT_ALL_CODE ssdp_pcihp_aml - -DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC", "BXSSDTPC", 0x1) -{ - -/**************************************************************** - * PCI hotplug - ****************************************************************/ - - /* Objects supplied by DSDT */ - External(\_SB.PCI0, DeviceObj) - External(\_SB.PCI0.PCEJ, MethodObj) - - Scope(\_SB.PCI0) { - - /* Bulk generated PCI hotplug devices */ - ACPI_EXTRACT_DEVICE_START ssdt_pcihp_start - ACPI_EXTRACT_DEVICE_END ssdt_pcihp_end - ACPI_EXTRACT_DEVICE_STRING ssdt_pcihp_name - - // Method _EJ0 can be patched by BIOS to EJ0_ - // at runtime, if the slot is detected to not support hotplug. - // Extract the offset of the address dword and the - // _EJ0 name to allow this patching. - Device(SAA) { - ACPI_EXTRACT_NAME_BYTE_CONST ssdt_pcihp_id - Name(_SUN, 0xAA) - ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcihp_adr - Name(_ADR, 0xAA0000) - ACPI_EXTRACT_METHOD_STRING ssdt_pcihp_ej0 - Method(_EJ0, 1) { - PCEJ(_SUN) - } - } - } -} diff --git a/src/fw/ssdt-pcihp.hex b/src/fw/ssdt-pcihp.hex deleted file mode 100644 index 79b67f7a40d9..000000000000 --- a/src/fw/ssdt-pcihp.hex +++ /dev/null @@ -1,38 +0,0 @@ -/* DO NOT EDIT! This is an autogenerated file. See scripts/acpi_extract.= py. */ -static unsigned char ssdt_pcihp_name[] =3D { - 0x33 -}; - -static unsigned char ssdt_pcihp_adr[] =3D { - 0x44 -}; - -static unsigned char ssdt_pcihp_end[] =3D { - 0x57 -}; - -static unsigned char ssdp_pcihp_aml[] =3D { - 0x53, 0x53, 0x44, 0x54, 0x57, 0x00, 0x00, 0x00, - 0x01, 0x27, 0x42, 0x58, 0x50, 0x43, 0x00, 0x00, - 0x42, 0x58, 0x53, 0x53, 0x44, 0x54, 0x50, 0x43, - 0x01, 0x00, 0x00, 0x00, 0x49, 0x4e, 0x54, 0x4c, - 0x18, 0x08, 0x15, 0x20, 0x10, 0x32, 0x5c, 0x2e, - 0x5f, 0x53, 0x42, 0x5f, 0x50, 0x43, 0x49, 0x30, - 0x5b, 0x82, 0x25, 0x53, 0x41, 0x41, 0x5f, 0x08, - 0x5f, 0x53, 0x55, 0x4e, 0x0a, 0xaa, 0x08, 0x5f, - 0x41, 0x44, 0x52, 0x0c, 0x00, 0x00, 0xaa, 0x00, - 0x14, 0x0e, 0x5f, 0x45, 0x4a, 0x30, 0x01, 0x50, - 0x43, 0x45, 0x4a, 0x5f, 0x53, 0x55, 0x4e -}; - -static unsigned char ssdt_pcihp_start[] =3D { - 0x30 -}; - -static unsigned char ssdt_pcihp_id[] =3D { - 0x3d -}; - -static unsigned char ssdt_pcihp_ej0[] =3D { - 0x4a -}; diff --git a/src/fw/ssdt-proc.dsl b/src/fw/ssdt-proc.dsl deleted file mode 100644 index 407d61ead19a..000000000000 --- a/src/fw/ssdt-proc.dsl +++ /dev/null @@ -1,48 +0,0 @@ -/* This file is the basis for the ssdt table generated in src/acpi.c. - * It defines the contents of the per-cpu Processor() object. At - * runtime, a dynamically generated SSDT will contain one copy of this - * AML snippet for every possible cpu in the system. The objects will - * be placed in the \_SB_ namespace. - * - * In addition to the aml code generated from this file, the - * src/acpi.c file creates a NTFY method with an entry for each cpu: - * Method(NTFY, 2) { - * If (LEqual(Arg0, 0x00)) { Notify(CP00, Arg1) } - * If (LEqual(Arg0, 0x01)) { Notify(CP01, Arg1) } - * ... - * } - * and a CPON array with the list of active and inactive cpus: - * Name(CPON, Package() { One, One, ..., Zero, Zero, ... }) - */ - -ACPI_EXTRACT_ALL_CODE ssdp_proc_aml - -DefinitionBlock ("ssdt-proc.aml", "SSDT", 0x01, "BXPC", "BXSSDT", 0x1) -{ - ACPI_EXTRACT_PROCESSOR_START ssdt_proc_start - ACPI_EXTRACT_PROCESSOR_END ssdt_proc_end - ACPI_EXTRACT_PROCESSOR_STRING ssdt_proc_name - Processor(CPAA, 0xAA, 0x0000b010, 0x06) { - ACPI_EXTRACT_NAME_BYTE_CONST ssdt_proc_id - Name(ID, 0xAA) -/* - * The src/acpi.c code requires the above ACP_EXTRACT tags so that it can = update - * CPAA and 0xAA with the appropriate CPU id (see - * SD_OFFSET_CPUHEX/CPUID1/CPUID2). Don't change the above without - * also updating the C code. - */ - Name(_HID, "ACPI0007") - External(CPMA, MethodObj) - External(CPST, MethodObj) - External(CPEJ, MethodObj) - Method(_MAT, 0) { - Return (CPMA(ID)) - } - Method(_STA, 0) { - Return (CPST(ID)) - } - Method(_EJ0, 1, NotSerialized) { - CPEJ(ID, Arg0) - } - } -} diff --git a/src/fw/ssdt-proc.hex b/src/fw/ssdt-proc.hex deleted file mode 100644 index b6a57784f6b5..000000000000 --- a/src/fw/ssdt-proc.hex +++ /dev/null @@ -1,35 +0,0 @@ -/* DO NOT EDIT! This is an autogenerated file. See scripts/acpi_extract.= py. */ -static unsigned char ssdt_proc_name[] =3D { - 0x28 -}; - -static unsigned char ssdp_proc_aml[] =3D { - 0x53, 0x53, 0x44, 0x54, 0x78, 0x00, 0x00, 0x00, - 0x01, 0xbb, 0x42, 0x58, 0x50, 0x43, 0x00, 0x00, - 0x42, 0x58, 0x53, 0x53, 0x44, 0x54, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x49, 0x4e, 0x54, 0x4c, - 0x18, 0x08, 0x15, 0x20, 0x5b, 0x83, 0x42, 0x05, - 0x43, 0x50, 0x41, 0x41, 0xaa, 0x10, 0xb0, 0x00, - 0x00, 0x06, 0x08, 0x49, 0x44, 0x5f, 0x5f, 0x0a, - 0xaa, 0x08, 0x5f, 0x48, 0x49, 0x44, 0x0d, 0x41, - 0x43, 0x50, 0x49, 0x30, 0x30, 0x30, 0x37, 0x00, - 0x14, 0x0f, 0x5f, 0x4d, 0x41, 0x54, 0x00, 0xa4, - 0x43, 0x50, 0x4d, 0x41, 0x49, 0x44, 0x5f, 0x5f, - 0x14, 0x0f, 0x5f, 0x53, 0x54, 0x41, 0x00, 0xa4, - 0x43, 0x50, 0x53, 0x54, 0x49, 0x44, 0x5f, 0x5f, - 0x14, 0x0f, 0x5f, 0x45, 0x4a, 0x30, 0x01, 0x43, - 0x50, 0x45, 0x4a, 0x49, 0x44, 0x5f, 0x5f, 0x68, - =20 -}; - -static unsigned char ssdt_proc_id[] =3D { - 0x38 -}; - -static unsigned char ssdt_proc_end[] =3D { - 0x78 -}; - -static unsigned char ssdt_proc_start[] =3D { - 0x24 -}; --=20 2.47.0 _______________________________________________ SeaBIOS mailing list -- seabios@seabios.org To unsubscribe send an email to seabios-leave@seabios.org