From nobody Fri Mar 29 07:09:44 2024 Delivered-To: importer@patchew.org Received-SPF: none (zohomail.com: 78.46.105.101 is neither permitted nor denied by domain of seabios.org) client-ip=78.46.105.101; envelope-from=seabios-bounces@seabios.org; helo=coreboot.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zohomail.com: 78.46.105.101 is neither permitted nor denied by domain of seabios.org) smtp.mailfrom=seabios-bounces@seabios.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1584975963; cv=none; d=zohomail.com; s=zohoarc; b=HcRZ0m9xMh6fOoIlzSx1UL773DkXujp31BlvPbMboKUpGae+xcyV5pvxQAHJc9feoqbADQWwB8ecxJ5ZEr1vFQP4h2rM11p7QP3SLUXA9SGH4YZoqT2C1w/2VkPjGBfrEegX5thJjxmsdoRpL42ZJtgJlxMJWpB8udTyl1NBAns= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1584975963; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Subject:To; bh=ELDenyz3JUC85Fq2/EhAHz1RCN6Z/2LHwFLM6ogcQAU=; b=U0VnMsZkoKuqIuiZ2BzDjufaFytO4O/Trq0fl8cCDq4OaORLVa1S9spSLRQeR581ZEFkXwopuyu6cxo8iFHNE7BzBJJbCkMR2s7cq2esP9E9UgmSHFvk6E4iLrMhcT12JBcD+4XzqjU29HCd4RbCb4KcWfiY5vdwDDch8adH+MU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=none (zohomail.com: 78.46.105.101 is neither permitted nor denied by domain of seabios.org) smtp.mailfrom=seabios-bounces@seabios.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from coreboot.org (coreboot.org [78.46.105.101]) by mx.zohomail.com with SMTPS id 15849759639962.1267539895120535; Mon, 23 Mar 2020 08:06:03 -0700 (PDT) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTPA id 41074B0015F; Mon, 23 Mar 2020 15:06:00 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTP id BC2A8B0014F for ; Mon, 23 Mar 2020 15:05:41 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-187-S2tPJRMyOSG_j9I-pgY02Q-1; Mon, 23 Mar 2020 10:59:27 -0400 Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B5BCE149EA for ; Mon, 23 Mar 2020 14:59:20 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by smtp.corp.redhat.com (Postfix) with ESMTP id 333AF89E76; Mon, 23 Mar 2020 14:59:15 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) id 59DEF9AF5; Mon, 23 Mar 2020 15:59:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1584975940; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QsIkV7WI4NQaPBlNAI9V+C7opnvPFWiwaK+i6PoBc/w=; b=K8Wd8CA6DuF4tt54dL9hGFgnxySZZcT03JiEx/b5nPQgJpYql+dd/x7qFn3RXKBNAwnjP2 qwThfbFA+uJXKcPQaaSddvjs11u6HrL03sXN0QQySdXE5IP6sGd7NmflnGJY0hFjAkIxy1 RPPO7fBKt+Iquc/KDLzI8fmNgHNXoAk= X-MC-Unique: S2tPJRMyOSG_j9I-pgY02Q-1 From: Gerd Hoffmann To: seabios@seabios.org Date: Mon, 23 Mar 2020 15:59:11 +0100 Message-Id: <20200323145911.22319-3-kraxel@redhat.com> In-Reply-To: <20200323145911.22319-1-kraxel@redhat.com> References: <20200323145911.22319-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Message-ID-Hash: NJTPMU2RAPV4WMFC7ZLWYAJ53QOZ6JH5 X-Message-ID-Hash: NJTPMU2RAPV4WMFC7ZLWYAJ53QOZ6JH5 X-MailFrom: kraxel@redhat.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-seabios.seabios.org-0; header-match-seabios.seabios.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; suspicious-header CC: Stefan Hajnoczi , Gerd Hoffmann X-Mailman-Version: 3.3.1 Precedence: list Subject: [SeaBIOS] [PATCH v2 2/2] pci: add mmconfig support List-Id: SeaBIOS mailing list Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Authentication-Results: coreboot.org; auth=pass smtp.auth=mailman@coreboot.org smtp.mailfrom=seabios-bounces@seabios.org X-Spamd-Bar: / X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Add support for pci config space access via mmconfig bar. Enable for qemu q35 chipset. Main advantage is that we need only one instead of two io operations per config space access, which translates to one instead of two vmexits for virtualization. Signed-off-by: Gerd Hoffmann --- src/hw/pci.h | 1 + src/fw/pciinit.c | 1 + src/hw/pci.c | 64 +++++++++++++++++++++++++++++++++++++++--------- 3 files changed, 54 insertions(+), 12 deletions(-) diff --git a/src/hw/pci.h b/src/hw/pci.h index 2e30e28918a0..01c51f705a00 100644 --- a/src/hw/pci.h +++ b/src/hw/pci.h @@ -39,6 +39,7 @@ u32 pci_config_readl(u16 bdf, u32 addr); u16 pci_config_readw(u16 bdf, u32 addr); u8 pci_config_readb(u16 bdf, u32 addr); void pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on); +void pci_enable_mmconfig(u64 addr, const char *name); u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap); int pci_next(int bdf, int bus); int pci_probe_host(void); diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index d5e87f00f164..d25931bb0573 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -480,6 +480,7 @@ static void mch_mmconfig_setup(u16 bdf) pci_config_writel(bdf, Q35_HOST_BRIDGE_PCIEXBAR, 0); pci_config_writel(bdf, Q35_HOST_BRIDGE_PCIEXBAR + 4, upper); pci_config_writel(bdf, Q35_HOST_BRIDGE_PCIEXBAR, lower); + pci_enable_mmconfig(Q35_HOST_BRIDGE_PCIEXBAR_ADDR, "q35"); } =20 static void mch_mem_addr_setup(struct pci_device *dev, void *arg) diff --git a/src/hw/pci.c b/src/hw/pci.c index 7aca1e6bfa97..d9dbf313965c 100644 --- a/src/hw/pci.c +++ b/src/hw/pci.c @@ -14,6 +14,13 @@ #define PORT_PCI_CMD 0x0cf8 #define PORT_PCI_DATA 0x0cfc =20 +static u32 mmconfig; + +static void *mmconfig_addr(u16 bdf, u32 addr) +{ + return (void*)(mmconfig + ((u32)bdf << 12) + addr); +} + static u32 ioconfig_cmd(u16 bdf, u32 addr) { return 0x80000000 | (bdf << 8) | (addr & 0xfc); @@ -21,38 +28,62 @@ static u32 ioconfig_cmd(u16 bdf, u32 addr) =20 void pci_config_writel(u16 bdf, u32 addr, u32 val) { - outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); - outl(val, PORT_PCI_DATA); + if (MODESEGMENT && mmconfig) { + writel(mmconfig_addr(bdf, addr), val); + } else { + outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); + outl(val, PORT_PCI_DATA); + } } =20 void pci_config_writew(u16 bdf, u32 addr, u16 val) { - outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); - outw(val, PORT_PCI_DATA + (addr & 2)); + if (MODESEGMENT && mmconfig) { + writew(mmconfig_addr(bdf, addr), val); + } else { + outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); + outw(val, PORT_PCI_DATA + (addr & 2)); + } } =20 void pci_config_writeb(u16 bdf, u32 addr, u8 val) { - outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); - outb(val, PORT_PCI_DATA + (addr & 3)); + if (MODESEGMENT && mmconfig) { + writeb(mmconfig_addr(bdf, addr), val); + } else { + outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); + outb(val, PORT_PCI_DATA + (addr & 3)); + } } =20 u32 pci_config_readl(u16 bdf, u32 addr) { - outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); - return inl(PORT_PCI_DATA); + if (MODESEGMENT && mmconfig) { + return readl(mmconfig_addr(bdf, addr)); + } else { + outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); + return inl(PORT_PCI_DATA); + } } =20 u16 pci_config_readw(u16 bdf, u32 addr) { - outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); - return inw(PORT_PCI_DATA + (addr & 2)); + if (MODESEGMENT && mmconfig) { + return readw(mmconfig_addr(bdf, addr)); + } else { + outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); + return inw(PORT_PCI_DATA + (addr & 2)); + } } =20 u8 pci_config_readb(u16 bdf, u32 addr) { - outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); - return inb(PORT_PCI_DATA + (addr & 3)); + if (MODESEGMENT && mmconfig) { + return readb(mmconfig_addr(bdf, addr)); + } else { + outl(ioconfig_cmd(bdf, addr), PORT_PCI_CMD); + return inb(PORT_PCI_DATA + (addr & 3)); + } } =20 void @@ -63,6 +94,15 @@ pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on) pci_config_writew(bdf, addr, val); } =20 +void +pci_enable_mmconfig(u64 addr, const char *name) +{ + if (addr >=3D 0x100000000ll) + return; + dprintf(1, "PCIe: using %s mmconfig at 0x%llx\n", name, addr); + mmconfig =3D addr; +} + u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap) { int i; --=20 2.18.2 _______________________________________________ SeaBIOS mailing list -- seabios@seabios.org To unsubscribe send an email to seabios-leave@seabios.org