From nobody Wed Apr 24 16:27:37 2024 Delivered-To: importer@patchew.org Received-SPF: none (zohomail.com: 78.46.105.101 is neither permitted nor denied by domain of seabios.org) client-ip=78.46.105.101; envelope-from=seabios-bounces@seabios.org; helo=coreboot.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zohomail.com: 78.46.105.101 is neither permitted nor denied by domain of seabios.org) smtp.mailfrom=seabios-bounces@seabios.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1584609756; cv=none; d=zohomail.com; s=zohoarc; b=QMnreNFZVgHr266JMbPJCtI+YWZlfPXdOCv7iQ5L1yYgdIh9a+jcV6Iv69pfSW7oNKP2acaPT/rBrSkj8178HP/k5jG5JPwercoT6JIR9OZNtw1KymJqCL8ydqIDcIIveNOC1nV2WvZnrOHMEOVzWleXX2eJqDk0/xUPoibmveo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1584609756; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Subject:To; bh=TSH8BijPjtPc746/bZwVe2ARhkkcuTH06aIaAd9elrY=; b=fKz+swQl8ba/NNrAdiWqT9uAT0+7HkqnnIguhnfLp8uUY0D5IlRBWv07OE1dsVAweeq6teGtdWcSPqF1BRZKYayKRmoUIT2JMjFcvypdhQ1qmeSgrmoG/RDikebloVBeq0NFV7YdB8esg/rq3WWjpP+7kfhF+I0QnEn4BvDaBy8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=none (zohomail.com: 78.46.105.101 is neither permitted nor denied by domain of seabios.org) smtp.mailfrom=seabios-bounces@seabios.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from coreboot.org (coreboot.org [78.46.105.101]) by mx.zohomail.com with SMTPS id 1584609756017953.0505634433084; Thu, 19 Mar 2020 02:22:36 -0700 (PDT) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTPA id 1F77BB01B1D; Thu, 19 Mar 2020 09:22:32 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by coreboot.org (Postfix) with ESMTP id 5F43FB01AEC for ; Thu, 19 Mar 2020 09:22:05 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-69-TOsG1Ob_M7yjaQLtXqhhow-1; Thu, 19 Mar 2020 05:22:02 -0400 Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 90592107ACC7 for ; Thu, 19 Mar 2020 09:22:01 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) by smtp.corp.redhat.com (Postfix) with ESMTP id A152660BEC; Thu, 19 Mar 2020 09:21:56 +0000 (UTC) Received: from authenticated-user (PRIMARY_HOSTNAME [PUBLIC_IP]) id 88DF73BD; Thu, 19 Mar 2020 10:21:55 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1584609724; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=xJUmk+ecF+1jWKxMKx5Ek3nw7Xi0eno16PC6SBgJUbg=; b=M0ugQoK9Bb8x3pJ93x+CHWqVu94nSbxb+i8kZeue1exlYoMm//6wJtrW5R9Dn2TYQsvqHE QZHgSlcyMIXbtFqrOu2Hmgk31fDMW4/xO6OUDL17LkGl+1bcdIQ/GOZMtCfimmduj8/ELm CEu/4VUgG/4BV+VDMG6m5DZhNnpx/ec= X-MC-Unique: TOsG1Ob_M7yjaQLtXqhhow-1 From: Gerd Hoffmann To: seabios@seabios.org Date: Thu, 19 Mar 2020 10:21:55 +0100 Message-Id: <20200319092155.20910-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Message-ID-Hash: AZU4HHJUYC5YYYQDFNO4LWD66IMEL6OV X-Message-ID-Hash: AZU4HHJUYC5YYYQDFNO4LWD66IMEL6OV X-MailFrom: kraxel@redhat.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-seabios.seabios.org-0; header-match-seabios.seabios.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; suspicious-header CC: Stefan Hajnoczi , Gerd Hoffmann X-Mailman-Version: 3.3.1 Precedence: list Subject: [SeaBIOS] [PATCH] pci: add mmconfig support List-Id: SeaBIOS mailing list Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Bar: ++++ X-Spam-Level: **** Authentication-Results: coreboot.org; auth=pass smtp.auth=mailman@coreboot.org smtp.mailfrom=seabios-bounces@seabios.org X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Add support for pci config space access via mmconfig bar. Enable for qemu q35 chipset. Main advantage is that we need only one instead of two io operations per config space access, which translates to one instead of two vmexits for virtualization. Signed-off-by: Gerd Hoffmann Reviewed-by: Stefan Hajnoczi --- src/hw/pci.h | 1 + src/fw/pciinit.c | 1 + src/hw/pci.c | 54 ++++++++++++++++++++++++++++++++++++++++++------ 3 files changed, 50 insertions(+), 6 deletions(-) diff --git a/src/hw/pci.h b/src/hw/pci.h index 2e30e28918a0..01c51f705a00 100644 --- a/src/hw/pci.h +++ b/src/hw/pci.h @@ -39,6 +39,7 @@ u32 pci_config_readl(u16 bdf, u32 addr); u16 pci_config_readw(u16 bdf, u32 addr); u8 pci_config_readb(u16 bdf, u32 addr); void pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on); +void pci_enable_mmconfig(u64 addr, const char *name); u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap); int pci_next(int bdf, int bus); int pci_probe_host(void); diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index d5e87f00f164..d25931bb0573 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -480,6 +480,7 @@ static void mch_mmconfig_setup(u16 bdf) pci_config_writel(bdf, Q35_HOST_BRIDGE_PCIEXBAR, 0); pci_config_writel(bdf, Q35_HOST_BRIDGE_PCIEXBAR + 4, upper); pci_config_writel(bdf, Q35_HOST_BRIDGE_PCIEXBAR, lower); + pci_enable_mmconfig(Q35_HOST_BRIDGE_PCIEXBAR_ADDR, "q35"); } =20 static void mch_mem_addr_setup(struct pci_device *dev, void *arg) diff --git a/src/hw/pci.c b/src/hw/pci.c index 9855badbc7da..3b8f43cbe5dc 100644 --- a/src/hw/pci.c +++ b/src/hw/pci.c @@ -14,38 +14,71 @@ #define PORT_PCI_CMD 0x0cf8 #define PORT_PCI_DATA 0x0cfc =20 +static u32 mmconfig; + +static void *pci_mmconfig_addr(u16 bdf, u32 addr) +{ + if (!mmconfig) + return NULL; + return (void*)(mmconfig + ((u32)bdf << 12) + addr); +} + void pci_config_writel(u16 bdf, u32 addr, u32 val) { - outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD); - outl(val, PORT_PCI_DATA); + void *mmcfg =3D pci_mmconfig_addr(bdf, addr); + if (mmcfg) { + writel(mmcfg, val); + } else { + outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD); + outl(val, PORT_PCI_DATA); + } } =20 void pci_config_writew(u16 bdf, u32 addr, u16 val) { - outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD); - outw(val, PORT_PCI_DATA + (addr & 2)); + void *mmcfg =3D pci_mmconfig_addr(bdf, addr); + if (mmcfg) { + writew(mmcfg, val); + } else { + outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD); + outw(val, PORT_PCI_DATA + (addr & 2)); + } } =20 void pci_config_writeb(u16 bdf, u32 addr, u8 val) { - outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD); - outb(val, PORT_PCI_DATA + (addr & 3)); + void *mmcfg =3D pci_mmconfig_addr(bdf, addr); + if (mmcfg) { + writeb(mmcfg, val); + } else { + outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD); + outb(val, PORT_PCI_DATA + (addr & 3)); + } } =20 u32 pci_config_readl(u16 bdf, u32 addr) { + void *mmcfg =3D pci_mmconfig_addr(bdf, addr); + if (mmcfg) + return readl(mmcfg); outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD); return inl(PORT_PCI_DATA); } =20 u16 pci_config_readw(u16 bdf, u32 addr) { + void *mmcfg =3D pci_mmconfig_addr(bdf, addr); + if (mmcfg) + return readw(mmcfg); outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD); return inw(PORT_PCI_DATA + (addr & 2)); } =20 u8 pci_config_readb(u16 bdf, u32 addr) { + void *mmcfg =3D pci_mmconfig_addr(bdf, addr); + if (mmcfg) + return readb(mmcfg); outl(0x80000000 | (bdf << 8) | (addr & 0xfc), PORT_PCI_CMD); return inb(PORT_PCI_DATA + (addr & 3)); } @@ -58,6 +91,15 @@ pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on) pci_config_writew(bdf, addr, val); } =20 +void +pci_enable_mmconfig(u64 addr, const char *name) +{ + if (addr >=3D 0x100000000ll) + return; + dprintf(1, "PCIe: using %s mmconfig at 0x%llx\n", name, addr); + mmconfig =3D addr; +} + u8 pci_find_capability(u16 bdf, u8 cap_id, u8 cap) { int i; --=20 2.18.2 _______________________________________________ SeaBIOS mailing list -- seabios@seabios.org To unsubscribe send an email to seabios-leave@seabios.org