From nobody Fri Apr 19 23:05:38 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) client-ip=80.81.252.135; envelope-from=seabios-bounces@seabios.org; helo=mail.coreboot.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 80.81.252.135 is neither permitted nor denied by domain of seabios.org) smtp.mailfrom=seabios-bounces@seabios.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from mail.coreboot.org (mail.coreboot.org [80.81.252.135]) by mx.zohomail.com with SMTPS id 1543756265051420.7743025807671; Sun, 2 Dec 2018 05:11:05 -0800 (PST) Received: from [127.0.0.1] (helo=ra.coreboot.org) by mail.coreboot.org with esmtp (Exim 4.88) (envelope-from ) id 1gTRVF-0007al-GD; Sun, 02 Dec 2018 14:09:41 +0100 Received: from mx1.redhat.com ([209.132.183.28]) by mail.coreboot.org with esmtps (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384:256) (Exim 4.88) (envelope-from ) id 1gTRV5-0007aa-4X for seabios@seabios.org; Sun, 02 Dec 2018 14:09:40 +0100 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1B53B30832C9; Sun, 2 Dec 2018 13:10:18 +0000 (UTC) Received: from stelenovo.redhat.com (ovpn-116-77.ams2.redhat.com [10.36.116.77]) by smtp.corp.redhat.com (Postfix) with ESMTP id 27DED600C7; Sun, 2 Dec 2018 13:10:13 +0000 (UTC) From: Stefano Garzarella To: seabios@seabios.org Date: Sun, 2 Dec 2018 14:10:13 +0100 Message-Id: <20181202131013.199758-1-sgarzare@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Sun, 02 Dec 2018 13:10:18 +0000 (UTC) X-Spam-Score: -5.7 (-----) Subject: [SeaBIOS] [PATCH] qemu: avoid debug prints if debugcon is not enabled X-BeenThere: seabios@seabios.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SeaBIOS mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kraxel@redhat.com Content-Transfer-Encoding: quoted-printable Errors-To: seabios-bounces@seabios.org Sender: "SeaBIOS" X-Duff: Orig. Duff, Duff Lite, Duff Dry, Duff Dark, Raspberry Duff, Lady Duff, Red Duff, Tartar Control Duff Content-Type: text/plain; charset="utf-8" In order to speed up the boot phase, we can check the QEMU debugcon device, and disable the writes if it is not recognized. This patch allow us to save around 10 msec (time measured between SeaBIOS entry point and "linuxboot" entry point) when CONFIG_DEBUG_LEVEL=3D1 and debugcon is not enabled. Signed-off-by: Stefano Garzarella --- src/fw/paravirt.h | 3 +++ src/hw/serialio.c | 16 ++++++++++++++-- src/hw/serialio.h | 1 + src/post.c | 3 +++ 4 files changed, 21 insertions(+), 2 deletions(-) diff --git a/src/fw/paravirt.h b/src/fw/paravirt.h index a14d83e..f7e1d4c 100644 --- a/src/fw/paravirt.h +++ b/src/fw/paravirt.h @@ -49,6 +49,9 @@ static inline int runningOnKVM(void) { // QEMU_CFG_DMA ID bit #define QEMU_CFG_VERSION_DMA 2 =20 +// QEMU debugcon read value +#define QEMU_DEBUGCON_READBACK 0xe9 + int qemu_cfg_enabled(void); int qemu_cfg_dma_enabled(void); void qemu_preinit(void); diff --git a/src/hw/serialio.c b/src/hw/serialio.c index 319a85c..d9acd3c 100644 --- a/src/hw/serialio.c +++ b/src/hw/serialio.c @@ -103,11 +103,23 @@ serial_debug_flush(void) =20 u16 DebugOutputPort VARFSEG =3D 0x402; =20 +void +qemu_debug_postram_preinit(void) +{ + /* Check if the QEMU debug output port is active */ + if (CONFIG_DEBUG_IO && + inb(GET_GLOBAL(DebugOutputPort)) !=3D QEMU_DEBUGCON_READBACK) + DebugOutputPort =3D 0; +} + // Write a character to the special debugging port. void qemu_debug_putc(char c) { - if (CONFIG_DEBUG_IO && runningOnQEMU()) + u16 port; + + if (CONFIG_DEBUG_IO && runningOnQEMU() && + (port =3D GET_GLOBAL(DebugOutputPort))) // Send character to debug port. - outb(c, GET_GLOBAL(DebugOutputPort)); + outb(c, port); } diff --git a/src/hw/serialio.h b/src/hw/serialio.h index 88296fe..31fbea3 100644 --- a/src/hw/serialio.h +++ b/src/hw/serialio.h @@ -24,6 +24,7 @@ void serial_debug_preinit(void); void serial_debug_putc(char c); void serial_debug_flush(void); extern u16 DebugOutputPort; +void qemu_debug_postram_preinit(void); void qemu_debug_putc(char c); =20 #endif // serialio.h diff --git a/src/post.c b/src/post.c index f93106a..650a314 100644 --- a/src/post.c +++ b/src/post.c @@ -332,6 +332,9 @@ handle_post(void) // Allow writes to modify bios area (0xf0000) make_bios_writable(); =20 + // Setup QEMU debug output port + qemu_debug_postram_preinit(); + // Now that memory is read/writable - start post process. dopost(); } --=20 2.19.2 _______________________________________________ SeaBIOS mailing list SeaBIOS@seabios.org https://mail.coreboot.org/mailman/listinfo/seabios