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charset="utf-8" Add the CPUID bit indicates that a WRMSR to MSR_FS_BASE, MSR_GS_BASE, or MSR_KERNEL_GS_BASE is non-serializing. CPUID_Fn80000021_EAX Bit Feature description 1 FsGsKernelGsBaseNonSerializing. WRMSR to FS_BASE, GS_BASE and KernelGSbase are non-serializing. Link: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/= programmer-references/57238.zip Signed-off-by: Babu Moger --- target/i386/cpu.c | 2 +- target/i386/cpu.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 4a4e9b81d8..107ecd2bde 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1235,7 +1235,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] =3D { [FEAT_8000_0021_EAX] =3D { .type =3D CPUID_FEATURE_WORD, .feat_names =3D { - "no-nested-data-bp", NULL, "lfence-always-serializing", NULL, + "no-nested-data-bp", "fs-gs-base-ns", "lfence-always-serializi= ng", NULL, NULL, NULL, "null-sel-clr-base", NULL, "auto-ibrs", NULL, NULL, NULL, NULL, NULL, NULL, NULL, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index b65eedb617..12dafc9b32 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1032,6 +1032,8 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *c= pu, FeatureWord w); =20 /* Processor ignores nested data breakpoints */ #define CPUID_8000_0021_EAX_NO_NESTED_DATA_BP (1U << 0) +/* WRMSR to FS_BASE, GS_BASE, or KERNEL_GS_BASE is non-serializing */ +#define CPUID_8000_0021_EAX_FS_GS_BASE_NS (1U << 1) /* LFENCE is always serializing */ #define CPUID_8000_0021_EAX_LFENCE_ALWAYS_SERIALIZING (1U << 2) /* Null Selector Clears Base */ --=20 2.34.1