From nobody Wed Nov 5 19:42:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1496390444208469.31679333498164; Fri, 2 Jun 2017 01:00:44 -0700 (PDT) Received: from localhost ([::1]:48360 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dGhVi-00040f-Pr for importer@patchew.org; Fri, 02 Jun 2017 04:00:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50570) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dGhRZ-00008l-Uo for qemu-devel@nongnu.org; Fri, 02 Jun 2017 03:56:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dGhRY-0001Ne-BS for qemu-devel@nongnu.org; Fri, 02 Jun 2017 03:56:26 -0400 Received: from [59.151.112.132] (port=40007 helo=heian.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dGhRW-0001MR-Ss for qemu-devel@nongnu.org; Fri, 02 Jun 2017 03:56:24 -0400 Received: from unknown (HELO cn.fujitsu.com) ([10.167.33.5]) by heian.cn.fujitsu.com with ESMTP; 02 Jun 2017 15:56:10 +0800 Received: from G08CNEXCHPEKD02.g08.fujitsu.local (unknown [10.167.33.83]) by cn.fujitsu.com (Postfix) with ESMTP id 2C13547C6523; Fri, 2 Jun 2017 15:56:10 +0800 (CST) Received: from maozy.g08.fujitsu.local (10.167.225.76) by G08CNEXCHPEKD02.g08.fujitsu.local (10.167.33.89) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 2 Jun 2017 15:56:07 +0800 X-IronPort-AV: E=Sophos;i="5.22,518,1449504000"; d="scan'208";a="19581299" From: Mao Zhongyi To: Date: Fri, 2 Jun 2017 15:54:40 +0800 Message-ID: X-Mailer: git-send-email 2.9.3 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.167.225.76] X-yoursite-MailScanner-ID: 2C13547C6523.AF16D X-yoursite-MailScanner: Found to be clean X-yoursite-MailScanner-From: maozy.fnst@cn.fujitsu.com X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 59.151.112.132 Subject: [Qemu-devel] [PATCH v2 4/6] net/eepro100: Fixed code style X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jasowang@redhat.com, armbru@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" It reports a code style problem(ERROR: "foo * bar" should be "foo *bar") when running checkpatch.pl. So fix it to conform to the coding standards. Cc: jasowang@redhat.com Cc: armbru@redhat.com Signed-off-by: Mao Zhongyi --- hw/net/eepro100.c | 62 +++++++++++++++++++++++++++------------------------= ---- 1 file changed, 31 insertions(+), 31 deletions(-) diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c index da36816..62e989c 100644 --- a/hw/net/eepro100.c +++ b/hw/net/eepro100.c @@ -405,7 +405,7 @@ enum scb_stat_ack { stat_ack_tx =3D (stat_ack_cu_idle | stat_ack_cu_cmd_done), }; =20 -static void disable_interrupt(EEPRO100State * s) +static void disable_interrupt(EEPRO100State *s) { if (s->int_stat) { TRACE(INT, logout("interrupt disabled\n")); @@ -414,7 +414,7 @@ static void disable_interrupt(EEPRO100State * s) } } =20 -static void enable_interrupt(EEPRO100State * s) +static void enable_interrupt(EEPRO100State *s) { if (!s->int_stat) { TRACE(INT, logout("interrupt enabled\n")); @@ -423,7 +423,7 @@ static void enable_interrupt(EEPRO100State * s) } } =20 -static void eepro100_acknowledge(EEPRO100State * s) +static void eepro100_acknowledge(EEPRO100State *s) { s->scb_stat &=3D ~s->mem[SCBAck]; s->mem[SCBAck] =3D s->scb_stat; @@ -432,7 +432,7 @@ static void eepro100_acknowledge(EEPRO100State * s) } } =20 -static void eepro100_interrupt(EEPRO100State * s, uint8_t status) +static void eepro100_interrupt(EEPRO100State *s, uint8_t status) { uint8_t mask =3D ~s->mem[SCBIntmask]; s->mem[SCBAck] |=3D status; @@ -449,52 +449,52 @@ static void eepro100_interrupt(EEPRO100State * s, uin= t8_t status) } } =20 -static void eepro100_cx_interrupt(EEPRO100State * s) +static void eepro100_cx_interrupt(EEPRO100State *s) { /* CU completed action command. */ /* Transmit not ok (82557 only, not in emulation). */ eepro100_interrupt(s, 0x80); } =20 -static void eepro100_cna_interrupt(EEPRO100State * s) +static void eepro100_cna_interrupt(EEPRO100State *s) { /* CU left the active state. */ eepro100_interrupt(s, 0x20); } =20 -static void eepro100_fr_interrupt(EEPRO100State * s) +static void eepro100_fr_interrupt(EEPRO100State *s) { /* RU received a complete frame. */ eepro100_interrupt(s, 0x40); } =20 -static void eepro100_rnr_interrupt(EEPRO100State * s) +static void eepro100_rnr_interrupt(EEPRO100State *s) { /* RU is not ready. */ eepro100_interrupt(s, 0x10); } =20 -static void eepro100_mdi_interrupt(EEPRO100State * s) +static void eepro100_mdi_interrupt(EEPRO100State *s) { /* MDI completed read or write cycle. */ eepro100_interrupt(s, 0x08); } =20 -static void eepro100_swi_interrupt(EEPRO100State * s) +static void eepro100_swi_interrupt(EEPRO100State *s) { /* Software has requested an interrupt. */ eepro100_interrupt(s, 0x04); } =20 #if 0 -static void eepro100_fcp_interrupt(EEPRO100State * s) +static void eepro100_fcp_interrupt(EEPRO100State *s) { /* Flow control pause interrupt (82558 and later). */ eepro100_interrupt(s, 0x01); } #endif =20 -static void e100_pci_reset(EEPRO100State * s) +static void e100_pci_reset(EEPRO100State *s) { E100PCIDeviceInfo *info =3D eepro100_get_class(s); uint32_t device =3D s->device; @@ -598,7 +598,7 @@ static void e100_pci_reset(EEPRO100State * s) #endif /* EEPROM_SIZE > 0 */ } =20 -static void nic_selective_reset(EEPRO100State * s) +static void nic_selective_reset(EEPRO100State *s) { size_t i; uint16_t *eeprom_contents =3D eeprom93xx_data(s->eeprom); @@ -669,7 +669,7 @@ static char *regname(uint32_t addr) *************************************************************************= ***/ =20 #if 0 -static uint16_t eepro100_read_command(EEPRO100State * s) +static uint16_t eepro100_read_command(EEPRO100State *s) { uint16_t val =3D 0xffff; TRACE(OTHER, logout("val=3D0x%04x\n", val)); @@ -694,27 +694,27 @@ enum commands { CmdTxFlex =3D 0x0008, /* Use "Flexible mode" for CmdTx command= . */ }; =20 -static cu_state_t get_cu_state(EEPRO100State * s) +static cu_state_t get_cu_state(EEPRO100State *s) { return ((s->mem[SCBStatus] & BITS(7, 6)) >> 6); } =20 -static void set_cu_state(EEPRO100State * s, cu_state_t state) +static void set_cu_state(EEPRO100State *s, cu_state_t state) { s->mem[SCBStatus] =3D (s->mem[SCBStatus] & ~BITS(7, 6)) + (state << 6); } =20 -static ru_state_t get_ru_state(EEPRO100State * s) +static ru_state_t get_ru_state(EEPRO100State *s) { return ((s->mem[SCBStatus] & BITS(5, 2)) >> 2); } =20 -static void set_ru_state(EEPRO100State * s, ru_state_t state) +static void set_ru_state(EEPRO100State *s, ru_state_t state) { s->mem[SCBStatus] =3D (s->mem[SCBStatus] & ~BITS(5, 2)) + (state << 2); } =20 -static void dump_statistics(EEPRO100State * s) +static void dump_statistics(EEPRO100State *s) { /* Dump statistical data. Most data is never changed by the emulation * and always 0, so we first just copy the whole block and then those @@ -962,7 +962,7 @@ static void action_command(EEPRO100State *s) /* List is empty. Now CU is idle or suspended. */ } =20 -static void eepro100_cu_command(EEPRO100State * s, uint8_t val) +static void eepro100_cu_command(EEPRO100State *s, uint8_t val) { cu_state_t cu_state; switch (val) { @@ -1036,7 +1036,7 @@ static void eepro100_cu_command(EEPRO100State * s, ui= nt8_t val) } } =20 -static void eepro100_ru_command(EEPRO100State * s, uint8_t val) +static void eepro100_ru_command(EEPRO100State *s, uint8_t val) { switch (val) { case RU_NOP: @@ -1084,7 +1084,7 @@ static void eepro100_ru_command(EEPRO100State * s, ui= nt8_t val) } } =20 -static void eepro100_write_command(EEPRO100State * s, uint8_t val) +static void eepro100_write_command(EEPRO100State *s, uint8_t val) { eepro100_ru_command(s, val & 0x0f); eepro100_cu_command(s, val & 0xf0); @@ -1106,7 +1106,7 @@ static void eepro100_write_command(EEPRO100State * s,= uint8_t val) #define EEPROM_DI 0x04 #define EEPROM_DO 0x08 =20 -static uint16_t eepro100_read_eeprom(EEPRO100State * s) +static uint16_t eepro100_read_eeprom(EEPRO100State *s) { uint16_t val =3D e100_read_reg2(s, SCBeeprom); if (eeprom93xx_read(s->eeprom)) { @@ -1170,7 +1170,7 @@ static const char *reg2name(uint8_t reg) } #endif /* DEBUG_EEPRO100 */ =20 -static uint32_t eepro100_read_mdi(EEPRO100State * s) +static uint32_t eepro100_read_mdi(EEPRO100State *s) { uint32_t val =3D e100_read_reg4(s, SCBCtrlMDI); =20 @@ -1302,7 +1302,7 @@ typedef struct { uint32_t st_result; /* Self Test Results */ } eepro100_selftest_t; =20 -static uint32_t eepro100_read_port(EEPRO100State * s) +static uint32_t eepro100_read_port(EEPRO100State *s) { return 0; } @@ -1340,7 +1340,7 @@ static void eepro100_write_port(EEPRO100State *s) * *************************************************************************= ***/ =20 -static uint8_t eepro100_read1(EEPRO100State * s, uint32_t addr) +static uint8_t eepro100_read1(EEPRO100State *s, uint32_t addr) { uint8_t val =3D 0; if (addr <=3D sizeof(s->mem) - sizeof(val)) { @@ -1393,7 +1393,7 @@ static uint8_t eepro100_read1(EEPRO100State * s, uint= 32_t addr) return val; } =20 -static uint16_t eepro100_read2(EEPRO100State * s, uint32_t addr) +static uint16_t eepro100_read2(EEPRO100State *s, uint32_t addr) { uint16_t val =3D 0; if (addr <=3D sizeof(s->mem) - sizeof(val)) { @@ -1421,7 +1421,7 @@ static uint16_t eepro100_read2(EEPRO100State * s, uin= t32_t addr) return val; } =20 -static uint32_t eepro100_read4(EEPRO100State * s, uint32_t addr) +static uint32_t eepro100_read4(EEPRO100State *s, uint32_t addr) { uint32_t val =3D 0; if (addr <=3D sizeof(s->mem) - sizeof(val)) { @@ -1453,7 +1453,7 @@ static uint32_t eepro100_read4(EEPRO100State * s, uin= t32_t addr) return val; } =20 -static void eepro100_write1(EEPRO100State * s, uint32_t addr, uint8_t val) +static void eepro100_write1(EEPRO100State *s, uint32_t addr, uint8_t val) { /* SCBStatus is readonly. */ if (addr > SCBStatus && addr <=3D sizeof(s->mem) - sizeof(val)) { @@ -1519,7 +1519,7 @@ static void eepro100_write1(EEPRO100State * s, uint32= _t addr, uint8_t val) } } =20 -static void eepro100_write2(EEPRO100State * s, uint32_t addr, uint16_t val) +static void eepro100_write2(EEPRO100State *s, uint32_t addr, uint16_t val) { /* SCBStatus is readonly. */ if (addr > SCBStatus && addr <=3D sizeof(s->mem) - sizeof(val)) { @@ -1565,7 +1565,7 @@ static void eepro100_write2(EEPRO100State * s, uint32= _t addr, uint16_t val) } } =20 -static void eepro100_write4(EEPRO100State * s, uint32_t addr, uint32_t val) +static void eepro100_write4(EEPRO100State *s, uint32_t addr, uint32_t val) { if (addr <=3D sizeof(s->mem) - sizeof(val)) { e100_write_reg4(s, addr, val); --=20 2.9.3