From nobody Wed Nov 12 08:38:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail header.i=@wdc.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=wdc.com ARC-Seal: i=1; a=rsa-sha256; t=1568932312; cv=none; d=zoho.com; s=zohoarc; b=YRE9XVKeF2jTL2+gYffw6oQZzAYIsMDasZLD/nunUFdj2r5G4LmjOA4MYRavB9R9ewDLesPwROhmMoaeD2REYpKiU8W1cky0b/vZwTbDr8iu8ac4gtzTQGD8aG4kZm6OIgrRn7dxizQiGRFq10hn2mLKpo04jX8nqgK1ozlBsdA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1568932312; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=mQEuFnjU4zuL1pdWOCMpHwhKzdsVF91xWs/mNBLQ6lE=; b=Cgy95obxUtX7ZFC/4MPhfUmYqO1h/zOZ4O8hG3DSNbOhFtHEHI8m4laRrHUkImBIpvPIyPqCr1cqfqm87gHihXDAh9Tu5WSNmZ/tSkle9J02Fl16dCH6nt7HbTNko4SrEuNxrgD/UeblrZuucPi/sjsRHf39ZdU+sMGkTqZQ3O4= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail header.i=@wdc.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1568932312439128.67176868811293; Thu, 19 Sep 2019 15:31:52 -0700 (PDT) Received: from localhost ([::1]:49342 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iB4xo-0003tZ-N0 for importer@patchew.org; Thu, 19 Sep 2019 18:31:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33817) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iB4vE-0001Ff-TA for qemu-devel@nongnu.org; Thu, 19 Sep 2019 18:29:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iB4vD-0004z4-IW for qemu-devel@nongnu.org; Thu, 19 Sep 2019 18:29:08 -0400 Received: from esa2.hgst.iphmx.com ([68.232.143.124]:53808) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iB4vD-0004yW-AT; Thu, 19 Sep 2019 18:29:07 -0400 Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 20 Sep 2019 06:29:20 +0800 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Sep 2019 15:25:38 -0700 Received: from risc6-mainframe.sdcorp.global.sandisk.com (HELO risc6-mainframe.int.fusionio.com) ([10.196.157.58]) by uls-op-cesaip02.wdc.com with ESMTP; 19 Sep 2019 15:29:07 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1568932162; x=1600468162; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7MGs1WM/6RxP9Z4usOtR7QOoV1fbDZIHF4Cqz/uLULA=; b=E8WHwWZ3Qn6mj9yXfe6iawJ4LBN+wxC6TQQo0kCF2Vnzr9+ED3zjcXDr +uO+Yt7mBELqg2Kp/W+eXxXqz3glwz23MIMtkGk46Ek3fyHvIP3VFSEJH GVRe03Kbn32UCZ+bLya9je2BT2iB1OeT7euzJws1V63nQEAjL39kg8RHa GQE2nzucB6/unZjD/aRzY5eI9opSp+IubBHRW0vQPkI9f6T2RZreldENM eI5fOQ4sjlQVHzghlpHeLUcgMToeqFe4w8BG9VEApojuVnf319V55xY4e SGHtdDIL7GOrcDcJ1RvHTASWsDw0tnXbZEr1Ds4L0TpKFckYp3KI+KBVT A==; IronPort-SDR: 1eRLMk0xS2Uf/6WUBMw7lXcuvU//zQuQNcMV5GgmfN34MkvnlDFllrcNa4A6HaH+1fMW9g0UT9 pM+ONw/GzJmjU6oz+8O9LvhWdmPXQVx3aOXIlYBCB/UkyAluFrAIBLKlx3De+FaL27KOAyYxhF zHMyxasOV1BDVZDezFycbt3m3yF8iDrUWGqXQI8kQxSQrMUu8/kJi1D1A5lnos/RMm4WvpbTEi HDPv8S6tCsoT8rK4ZpnBYSbEvodDAuaWlyiLc0b1Fq8jJrNqEl81g3ZDLM3SGgUzW78GKfn+Kw vro= X-IronPort-AV: E=Sophos;i="5.64,526,1559491200"; d="scan'208";a="219490589" IronPort-SDR: Km2WdYtDJoApy/rb6PwrlQB5vfET/AjBF2liPMPPhBQ7VEgcaggjJ4Cq4tY9Ci1yBd+UmlKKw7 WctBgy8LMIJd7gdnt71waTuJ7xSGqLdG0V3l/VxdqE5CX+zMWX9NVieT7UL6nYIY/BGMbrXiKU m37e8ye+k5TUeq8dlGQnzdvSAnJA97GUXCeKfHDi3B9HMHk4eXh43STesYbmDgKqpfS6s5sGPu 8pYRQyzkimhvqJldqZvLXMHeOFKO+T2dFxbt86yamjWc8AC72Gnl4agP/Aj56uHK3JVI+h1dTK 2z6VskXZsA6nBjhB8qfroQqz IronPort-SDR: OOgCCSHJ+1uRU+uYr5Ix222BOIRGNkDwPPObyN66ek/XgutSGT5Vcfq2F85d0EL7pbg1D1iNxG bQ7hSd44j+Puwra0oCr0CT0MWEm3TawrC/rsHK/MfR/gB4AKQxPi0hkODDnKPGtBur46ZNxndA zeNdbEp2hAts7bC38UVnO1p+JkbS1RPMgLPRg9KLQKBBAkce7OHeXQ6F/a2KSlyyuMJRArupNt /p/lTwQ9c6zgoDYHJOwfMdOTDNmLfSYXVyVF2Ssn1hwww5+HuPtDWaC89Dw9mETZxG2a8pz8Cj lkg= WDCIronportException: Internal From: Alistair Francis To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH v1 2/6] riscv/sifive_u: Add QSPI memory region Date: Thu, 19 Sep 2019 15:24:58 -0700 Message-Id: X-Mailer: git-send-email 2.23.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: FreeBSD 9.x X-Received-From: 68.232.143.124 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, palmer@sifive.com, alistair.francis@wdc.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" There doesn't seem to be details on what QSPI the HiFive Unleashed uses. To allow boot firmware developers to use QEMU to target the Unleashed let's add a chunk of memory to represent the QSPI. This can be targeted using QEMU's -device loader command line option. Signed-off-by: Alistair Francis --- hw/riscv/sifive_u.c | 8 ++++++++ include/hw/riscv/sifive_u.h | 1 + 2 files changed, 9 insertions(+) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index de6e197882..9c5d791320 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -71,6 +71,7 @@ static const struct MemmapEntry { [SIFIVE_U_UART0] =3D { 0x10010000, 0x1000 }, [SIFIVE_U_UART1] =3D { 0x10011000, 0x1000 }, [SIFIVE_U_OTP] =3D { 0x10070000, 0x1000 }, + [SIFIVE_U_FLASH0] =3D { 0x20000000, 0x2000000 }, [SIFIVE_U_DRAM] =3D { 0x80000000, 0x0 }, [SIFIVE_U_GEM] =3D { 0x10090000, 0x2000 }, [SIFIVE_U_GEM_MGMT] =3D { 0x100a0000, 0x1000 }, @@ -313,6 +314,7 @@ static void riscv_sifive_u_init(MachineState *machine) SiFiveUState *s =3D g_new0(SiFiveUState, 1); MemoryRegion *system_memory =3D get_system_memory(); MemoryRegion *main_mem =3D g_new(MemoryRegion, 1); + MemoryRegion *flash0 =3D g_new(MemoryRegion, 1); int i; =20 /* Initialize SoC */ @@ -328,6 +330,12 @@ static void riscv_sifive_u_init(MachineState *machine) memory_region_add_subregion(system_memory, memmap[SIFIVE_U_DRAM].base, main_mem); =20 + /* register QSPI0 Flash */ + memory_region_init_ram(flash0, NULL, "riscv.sifive.u.flash0", + memmap[SIFIVE_U_FLASH0].size, &error_fatal); + memory_region_add_subregion(system_memory, memmap[SIFIVE_U_FLASH0].bas= e, + flash0); + /* create device tree */ create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline); =20 diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index 50e3620c02..2a08e2a5db 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -64,6 +64,7 @@ enum { SIFIVE_U_UART0, SIFIVE_U_UART1, SIFIVE_U_OTP, + SIFIVE_U_FLASH0, SIFIVE_U_DRAM, SIFIVE_U_GEM, SIFIVE_U_GEM_MGMT --=20 2.23.0