From nobody Fri Nov 14 17:01:13 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1762005789453223.03725028445479; Sat, 1 Nov 2025 07:03:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vFCBC-0008G0-9p; Sat, 01 Nov 2025 10:02:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vFCB9-0008Fk-Ey for qemu-devel@nongnu.org; Sat, 01 Nov 2025 10:02:03 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vFCB6-0001xf-F3 for qemu-devel@nongnu.org; Sat, 01 Nov 2025 10:02:03 -0400 Received: from localhost (localhost [127.0.0.1]) by zero.eik.bme.hu (Postfix) with ESMTP id 0FCA0597300; Sat, 01 Nov 2025 15:01:56 +0100 (CET) Received: from zero.eik.bme.hu ([127.0.0.1]) by localhost (zero.eik.bme.hu [127.0.0.1]) (amavis, port 10028) with ESMTP id rp4d95b0A6LV; Sat, 1 Nov 2025 15:01:54 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 156A95972E9; Sat, 01 Nov 2025 15:01:54 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by zero.eik.bme.hu (Postfix) with ESMTP id 139BB5972E3; Sat, 01 Nov 2025 15:01:54 +0100 (CET) X-Virus-Scanned: amavis at eik.bme.hu Date: Sat, 1 Nov 2025 15:01:54 +0100 (CET) From: BALATON Zoltan To: Chad Jablonski cc: Gerd Hoffmann , marcandre.lureau@redhat.com, qemu-devel@nongnu.org Subject: [PATCH] ati-vga: Separate default control bit for source (fwd) Message-ID: MIME-Version: 1.0 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1762005796311158500 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8"; format="flowed" Hello, Maybe you can also review (with Reviewed-by tag) and rebase on this patch=20 I've sent before. I don't know about any problem this fixes but what we=20 have now is not entirely correct. Regards, BALATON Zoltan ---------- Forwarded message ---------- Date: Tue, 07 Oct 2025 21:54:35 +0200 (CEST) From: BALATON Zoltan To: qemu-devel@nongnu.org Cc: Gerd Hoffmann , marcandre.lureau@redhat.com Subject: [PATCH] ati-vga: Separate default control bit for source The DP_GUI_MASTER_CNTL register has separate bits for src and dest but we were only looking at the dest bit. Use the correct bit for source. Signed-off-by: BALATON Zoltan --- hw/display/ati_2d.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c index 309bb5ccb6..e69b15b570 100644 --- a/hw/display/ati_2d.c +++ b/hw/display/ati_2d.c @@ -43,7 +43,8 @@ static int ati_bpp_from_datatype(ATIVGAState *s) } } -#define DEFAULT_CNTL (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CN= TL) +#define DFLT_CNTL_SRC (s->regs.dp_gui_master_cntl & GMC_SRC_PITCH_OFFSET_C= NTL) +#define DFLT_CNTL_DST (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_C= NTL) void ati_2d_blt(ATIVGAState *s) { @@ -63,12 +64,12 @@ void ati_2d_blt(ATIVGAState *s) qemu_log_mask(LOG_GUEST_ERROR, "Invalid bpp\n"); return; } - int dst_stride =3D DEFAULT_CNTL ? s->regs.dst_pitch : s->regs.default_= pitch; + int dst_stride =3D DFLT_CNTL_DST ? s->regs.dst_pitch : s->regs.default= _pitch; if (!dst_stride) { qemu_log_mask(LOG_GUEST_ERROR, "Zero dest pitch\n"); return; } - uint8_t *dst_bits =3D s->vga.vram_ptr + (DEFAULT_CNTL ? + uint8_t *dst_bits =3D s->vga.vram_ptr + (DFLT_CNTL_DST ? s->regs.dst_offset : s->regs.default_offset); if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { @@ -97,13 +98,13 @@ void ati_2d_blt(ATIVGAState *s) s->regs.src_x : s->regs.src_x + 1 - s->regs.dst_wi= dth); unsigned src_y =3D (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ? s->regs.src_y : s->regs.src_y + 1 - s->regs.dst_he= ight); - int src_stride =3D DEFAULT_CNTL ? + int src_stride =3D DFLT_CNTL_SRC ? s->regs.src_pitch : s->regs.default_pitch; if (!src_stride) { qemu_log_mask(LOG_GUEST_ERROR, "Zero source pitch\n"); return; } - uint8_t *src_bits =3D s->vga.vram_ptr + (DEFAULT_CNTL ? + uint8_t *src_bits =3D s->vga.vram_ptr + (DFLT_CNTL_SRC ? s->regs.src_offset : s->regs.default_offset); if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { --=20 2.41.3