From nobody Mon Feb 9 19:54:42 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1688642133414230.5253337220181; Thu, 6 Jul 2023 04:15:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qHMw6-00009o-Ch; Thu, 06 Jul 2023 07:14:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qHMvs-0008Sv-Ib; Thu, 06 Jul 2023 07:13:59 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qHMvq-0006BM-4P; Thu, 06 Jul 2023 07:13:56 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 122F9748A5B; Thu, 6 Jul 2023 13:13:35 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id DAFF0748A59; Thu, 6 Jul 2023 13:13:34 +0200 (CEST) Message-Id: In-Reply-To: References: From: BALATON Zoltan Date: Mon, 3 Jul 2023 18:48:47 +0200 Subject: [PATCH v3 1/4] ppc440_pcix: Stop using system io region for PCI bus Date: Thu, 06 Jul 2023 13:07:53 +0200 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Daniel Henrique Barboza , philmd@linaro.org X-Spam-Probability: 13% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -7 X-Spam_score: -0.8 X-Spam_bar: / X-Spam_report: (-0.8 / 5.0 requ) BAYES_00=-1.9, INVALID_DATE=1.096, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1688642134678100003 Reduce the iomem region to 64K and use it for the PCI io space and map it directly from the board without an intermediate alias that is not really needed. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/ppc/ppc440_pcix.c | 9 ++++++--- hw/ppc/sam460ex.c | 6 +----- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c index 899558b055..54286cfef4 100644 --- a/hw/ppc/ppc440_pcix.c +++ b/hw/ppc/ppc440_pcix.c @@ -23,6 +23,7 @@ #include "qemu/error-report.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qemu/units.h" #include "hw/irq.h" #include "hw/ppc/ppc.h" #include "hw/ppc/ppc4xx.h" @@ -491,10 +492,11 @@ static void ppc440_pcix_realize(DeviceState *dev, Err= or **errp) s =3D PPC440_PCIX_HOST_BRIDGE(dev); =20 sysbus_init_irq(sbd, &s->irq); - memory_region_init(&s->busmem, OBJECT(dev), "pci bus memory", UINT64_M= AX); + memory_region_init(&s->busmem, OBJECT(dev), "pci-mem", UINT64_MAX); + memory_region_init(&s->iomem, OBJECT(dev), "pci-io", 64 * KiB); h->bus =3D pci_register_root_bus(dev, NULL, ppc440_pcix_set_irq, - ppc440_pcix_map_irq, &s->irq, &s->busmem, - get_system_io(), PCI_DEVFN(0, 0), 1, TYPE_PCI_BUS= ); + ppc440_pcix_map_irq, &s->irq, &s->busmem, &s->iom= em, + PCI_DEVFN(0, 0), 1, TYPE_PCI_BUS); =20 s->dev =3D pci_create_simple(h->bus, PCI_DEVFN(0, 0), "ppc4xx-host-bri= dge"); =20 @@ -514,6 +516,7 @@ static void ppc440_pcix_realize(DeviceState *dev, Error= **errp) memory_region_add_subregion(&s->container, PCIC0_CFGDATA, &h->data_mem= ); memory_region_add_subregion(&s->container, PPC440_REG_BASE, &s->regs); sysbus_init_mmio(sbd, &s->container); + sysbus_init_mmio(sbd, &s->iomem); } =20 static void ppc440_pcix_class_init(ObjectClass *klass, void *data) diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index d446cfc37b..7da38bd58e 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -269,7 +269,6 @@ static void main_cpu_reset(void *opaque) =20 static void sam460ex_init(MachineState *machine) { - MemoryRegion *isa =3D g_new(MemoryRegion, 1); MemoryRegion *l2cache_ram =3D g_new(MemoryRegion, 1); DeviceState *uic[4]; int i; @@ -441,12 +440,9 @@ static void sam460ex_init(MachineState *machine) /* All PCI irqs are connected to the same UIC pin (cf. UBoot source) */ dev =3D sysbus_create_simple("ppc440-pcix-host", 0xc0ec00000, qdev_get_gpio_in(uic[1], 0)); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, 0xc08000000); pci_bus =3D PCI_BUS(qdev_get_child_bus(dev, "pci.0")); =20 - memory_region_init_alias(isa, NULL, "isa_mmio", get_system_io(), - 0, 0x10000); - memory_region_add_subregion(get_system_memory(), 0xc08000000, isa); - /* PCI devices */ pci_create_simple(pci_bus, PCI_DEVFN(6, 0), "sm501"); /* SoC has a single SATA port but we don't emulate that yet --=20 2.30.9