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Tsirkin" To: qemu-devel@nongnu.org Cc: Peter Maydell , Bernhard Beschow , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PULL v3 37/62] hw/isa/piix4: Rename "isa" attribute to "isa_irqs_in" Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1697967098255100008 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Bernhard Beschow Rename the "isa" attribute to align it with PIIX3 for consolidation. Signed-off-by: Bernhard Beschow Message-Id: <20231007123843.127151-17-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/isa/piix4.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 3c3c7a094c..9c8b6c98ab 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -45,7 +45,7 @@ struct PIIX4State { PCIDevice dev; qemu_irq cpu_intr; - qemu_irq *isa; + qemu_irq *isa_irqs_in; =20 MC146818RtcState rtc; PCIIDEState ide; @@ -75,7 +75,7 @@ static void piix4_set_irq(void *opaque, int irq_num, int = level) pic_level |=3D pci_bus_get_irq_level(bus, i); } } - qemu_set_irq(s->isa[pic_irq], pic_level); + qemu_set_irq(s->isa_irqs_in[pic_irq], pic_level); } } =20 @@ -201,10 +201,10 @@ static void piix4_realize(PCIDevice *dev, Error **err= p) =20 /* initialize i8259 pic */ i8259_out_irq =3D qemu_allocate_irqs(piix4_request_i8259_irq, s, 1); - s->isa =3D i8259_init(isa_bus, *i8259_out_irq); + s->isa_irqs_in =3D i8259_init(isa_bus, *i8259_out_irq); =20 /* initialize ISA irqs */ - isa_bus_register_input_irqs(isa_bus, s->isa); + isa_bus_register_input_irqs(isa_bus, s->isa_irqs_in); =20 /* initialize pit */ i8254_pit_init(isa_bus, 0x40, 0, NULL); @@ -236,7 +236,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp) if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) { return; } - qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa[9]); + qdev_connect_gpio_out(DEVICE(&s->pm), 0, s->isa_irqs_in[9]); =20 pci_bus_irqs(pci_bus, piix4_set_irq, s, PIIX_NUM_PIRQS); } --=20 MST