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charset="utf-8" Signed-off-by: Alistair Francis Reviewed-by: Palmer Dabbelt --- target/riscv/csr.c | 116 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 116 insertions(+) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index b582d78529..aaca1a6a0f 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -273,6 +273,7 @@ static const target_ulong sstatus_v1_10_mask =3D SSTATU= S_SIE | SSTATUS_SPIE | SSTATUS_SUM | SSTATUS_MXR | SSTATUS_SD; static const target_ulong sip_writable_mask =3D SIP_SSIP | MIP_USIP | MIP_= UEIP; static const target_ulong hip_writable_mask =3D MIP_VSSIP | MIP_VSTIP | MI= P_VSEIP; +static const target_ulong vsip_writable_mask =3D MIP_VSSIP; =20 #if defined(TARGET_RISCV32) static const char valid_vm_1_09[16] =3D { @@ -879,6 +880,111 @@ static int write_hgatp(CPURISCVState *env, int csrno,= target_ulong val) return 0; } =20 +/* Virtual CSR Registers */ +static int read_vsstatus(CPURISCVState *env, int csrno, target_ulong *val) +{ + *val =3D env->vsstatus; + return 0; +} + +static int write_vsstatus(CPURISCVState *env, int csrno, target_ulong val) +{ + env->vsstatus =3D val; + return 0; +} + +static int rmw_vsip(CPURISCVState *env, int csrno, target_ulong *ret_value, + target_ulong new_value, target_ulong write_mask) +{ + int ret =3D rmw_mip(env, 0, ret_value, new_value, + write_mask & env->mideleg & vsip_writable_mask); + return ret; +} + +static int read_vsie(CPURISCVState *env, int csrno, target_ulong *val) +{ + *val =3D env->mie & env->mideleg & VS_MODE_INTERRUPTS; + return 0; +} + +static int write_vsie(CPURISCVState *env, int csrno, target_ulong val) +{ + target_ulong newval =3D (env->mie & ~env->mideleg) | (val & env->midel= eg & MIP_VSSIP); + return write_mie(env, CSR_MIE, newval); +} + +static int read_vstvec(CPURISCVState *env, int csrno, target_ulong *val) +{ + *val =3D env->vstvec; + return 0; +} + +static int write_vstvec(CPURISCVState *env, int csrno, target_ulong val) +{ + env->vstvec =3D val; + return 0; +} + +static int read_vsscratch(CPURISCVState *env, int csrno, target_ulong *val) +{ + *val =3D env->vsscratch; + return 0; +} + +static int write_vsscratch(CPURISCVState *env, int csrno, target_ulong val) +{ + env->vsscratch =3D val; + return 0; +} + +static int read_vsepc(CPURISCVState *env, int csrno, target_ulong *val) +{ + *val =3D env->vsepc; + return 0; +} + +static int write_vsepc(CPURISCVState *env, int csrno, target_ulong val) +{ + env->vsepc =3D val; + return 0; +} + +static int read_vscause(CPURISCVState *env, int csrno, target_ulong *val) +{ + *val =3D env->vscause; + return 0; +} + +static int write_vscause(CPURISCVState *env, int csrno, target_ulong val) +{ + env->vscause =3D val; + return 0; +} + +static int read_vstval(CPURISCVState *env, int csrno, target_ulong *val) +{ + *val =3D env->vstval; + return 0; +} + +static int write_vstval(CPURISCVState *env, int csrno, target_ulong val) +{ + env->vstval =3D val; + return 0; +} + +static int read_vsatp(CPURISCVState *env, int csrno, target_ulong *val) +{ + *val =3D env->vsatp; + return 0; +} + +static int write_vsatp(CPURISCVState *env, int csrno, target_ulong val) +{ + env->vsatp =3D val; + return 0; +} + /* Physical Memory Protection */ static int read_pmpcfg(CPURISCVState *env, int csrno, target_ulong *val) { @@ -1092,6 +1198,16 @@ static riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = =3D { [CSR_HTINST] =3D { hmode, read_htinst, write_htins= t }, [CSR_HGATP] =3D { hmode, read_hgatp, write_hgatp= }, =20 + [CSR_VSSTATUS] =3D { hmode, read_vsstatus, write_vssta= tus }, + [CSR_VSIP] =3D { hmode, NULL, NULL, rmw_vsip = }, + [CSR_VSIE] =3D { hmode, read_vsie, write_vsie = }, + [CSR_VSTVEC] =3D { hmode, read_vstvec, write_vstve= c }, + [CSR_VSSCRATCH] =3D { hmode, read_vsscratch, write_vsscr= atch }, + [CSR_VSEPC] =3D { hmode, read_vsepc, write_vsepc= }, + [CSR_VSCAUSE] =3D { hmode, read_vscause, write_vscau= se }, + [CSR_VSTVAL] =3D { hmode, read_vstval, write_vstva= l }, + [CSR_VSATP] =3D { hmode, read_vsatp, write_vsatp= }, + /* Physical Memory Protection */ [CSR_PMPCFG0 ... CSR_PMPADDR9] =3D { pmp, read_pmpcfg, write_pmpc= fg }, [CSR_PMPADDR0 ... CSR_PMPADDR15] =3D { pmp, read_pmpaddr, write_pmpa= ddr }, --=20 2.24.0