From nobody Tue Dec 16 08:18:49 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540136524621298.72686798732184; Sun, 21 Oct 2018 08:42:04 -0700 (PDT) Received: from localhost ([::1]:59297 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEFrf-00068B-IA for importer@patchew.org; Sun, 21 Oct 2018 11:42:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46417) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEFpd-0004ti-Vu for qemu-devel@nongnu.org; Sun, 21 Oct 2018 11:39:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gEFpb-0004W4-VA for qemu-devel@nongnu.org; Sun, 21 Oct 2018 11:39:57 -0400 Received: from pio-pvt-msa1.bahnhof.se ([79.136.2.40]:35171) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gEFpa-0004Tu-Ex for qemu-devel@nongnu.org; Sun, 21 Oct 2018 11:39:54 -0400 Received: from localhost (localhost [127.0.0.1]) by pio-pvt-msa1.bahnhof.se (Postfix) with ESMTP id 17C823F486; Sun, 21 Oct 2018 17:39:48 +0200 (CEST) Received: from pio-pvt-msa1.bahnhof.se ([127.0.0.1]) by localhost (pio-pvt-msa1.bahnhof.se [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CHlgH0SxRvJX; Sun, 21 Oct 2018 17:39:47 +0200 (CEST) Received: from localhost (h-41-252.A163.priv.bahnhof.se [46.59.41.252]) (Authenticated sender: mb547485) by pio-pvt-msa1.bahnhof.se (Postfix) with ESMTPA id D88C03F3A9; Sun, 21 Oct 2018 17:39:46 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at bahnhof.se Date: Sun, 21 Oct 2018 17:39:46 +0200 From: Fredrik Noring To: Aleksandar Markovic , "Maciej W. Rozycki" , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 79.136.2.40 Subject: [Qemu-devel] [PATCH v8 22/38] target/mips: Support R5900 three-operand MADD and MADD1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Richard Henderson , qemu-devel@nongnu.org, =?utf-8?Q?J=C3=BCrgen?= Urban , Petar Jovanovic , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Signed-off-by: Fredrik Noring --- disas/mips.c | 2 ++ target/mips/translate.c | 38 +++++++++++++++++++++++++++++++++----- 2 files changed, 35 insertions(+), 5 deletions(-) diff --git a/disas/mips.c b/disas/mips.c index 79bd119c51..242bf68b9c 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -2553,6 +2553,8 @@ const struct mips_opcode mips_builtin_opcodes[] =3D {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, = 0, G1 }, {"madd", "7,s,t", 0x70000000, 0xfc00e7ff, MOD_a|RD_s|RD_t, = 0, D33 }, {"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_= M, 0, G1 }, +{"madd1", "s,t", 0x70000020, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, = 0, EE }, +{"madd1", "d,s,t", 0x70000020, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_= M, 0, EE }, {"maddp", "s,t", 0x70000441, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0= , SMT }, {"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, = 0, L1 }, {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, = 0, I32|N55 }, diff --git a/target/mips/translate.c b/target/mips/translate.c index 1f3dc3d406..153b7e869a 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -4778,8 +4778,8 @@ static void gen_muldiv(DisasContext *ctx, uint32_t op= c, } =20 /* - * These MULT and MULTU instructions implemented in for example the - * Toshiba/Sony R5900 and the Toshiba TX19, TX39 and TX79 core + * These MULT[U] and MADD instructions implemented in for example + * the Toshiba/Sony R5900 and the Toshiba TX19, TX39 and TX79 core * architectures are special three-operand variants with the syntax * * MULT[U][1] rd, rs, rt @@ -4788,6 +4788,14 @@ static void gen_muldiv(DisasContext *ctx, uint32_t o= pc, * * (rd, LO, HI) <- rs * rt * + * and + * + * MADD[1] rd, rs, rt + * + * such that + * + * (rd, LO, HI) <- (LO, HI) + rs * rt + * * where the low-order 32-bits of the result is placed into both the * GPR rd and the special register LO. The high-order 32-bits of the * result is placed into the special register HI. @@ -4844,8 +4852,28 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t= opc, tcg_temp_free_i32(t3); } break; + case TX79_MMI_MADD1: + acc =3D 1; + /* Fall through */ + case TX79_MMI_MADD: + { + TCGv_i32 t2 =3D tcg_temp_new_i32(); + TCGv_i32 t3 =3D tcg_temp_new_i32(); + tcg_gen_trunc_tl_i32(t2, t0); + tcg_gen_trunc_tl_i32(t3, t1); + tcg_gen_muls2_i32(t2, t3, t2, t3); + tcg_gen_add2_i32(t2, t3, cpu_LO[acc], cpu_HI[acc], t2, t3); + if (rd) { + tcg_gen_ext_i32_tl(cpu_gpr[rd], t2); + } + tcg_gen_ext_i32_tl(cpu_LO[acc], t2); + tcg_gen_ext_i32_tl(cpu_HI[acc], t3); + tcg_temp_free_i32(t2); + tcg_temp_free_i32(t3); + } + break; default: - MIPS_INVAL("mul TXx9"); + MIPS_INVAL("mul/madd TXx9"); generate_exception_end(ctx, EXCP_RI); goto out; } @@ -24667,6 +24695,8 @@ static void decode_tx79_mmi(CPUMIPSState *env, Disa= sContext *ctx) break; case TX79_MMI_MULT1: case TX79_MMI_MULTU1: + case TX79_MMI_MADD: + case TX79_MMI_MADD1: gen_mul_txx9(ctx, opc, rd, rs, rt); break; case TX79_MMI_DIV1: @@ -24681,10 +24711,8 @@ static void decode_tx79_mmi(CPUMIPSState *env, Dis= asContext *ctx) case TX79_MMI_MFHI1: gen_HILO(ctx, opc, 1, rd); break; - case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ - case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */ case TX79_MMI_MADDU1: /* TODO: TX79_MMI_MADDU1 */ case TX79_MMI_PMFHL: /* TODO: TX79_MMI_PMFHL */ case TX79_MMI_PMTHL: /* TODO: TX79_MMI_PMTHL */ --=20 2.18.1