From nobody Wed Nov 19 00:16:28 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1613438060; cv=none; d=zohomail.com; s=zohoarc; b=ZCnj0Cq+VzO8YaCNwfFm+9FnfnxgEkdUgtq87IKmCGpEOHDN1VefwXiSsDh/HHyIiEPpFXmTW0xiOM2p/kid0+fH1aDcEVPhV5Y7kr8i36njV/CrX/04udvHuxEvmi5u+bRN5+szhOO3lTA5ZxoFwVDaX/oSjMCxGakE9uHweJw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1613438060; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=CZHnOQ6p/D3ErbhPtNfoR5zWXbvE0rW73rkaN9DEudQ=; b=b1/Ssp7DgYICS2N/ugXTbTkJu8VaALKwVyPLchyJoxUMCDHwyRyscgNbLCFjTzSefhuyBOYDQ+JIKn1WP0kyZIVjHeuE5CdZ1C5JlmmAvSS2bT3gUjoStAdg4MFfmgY9GTYtoppwfSZHaeuS0RbgdQlu5LHGJyjMbQ6dbNDnLqQ= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1613438060220636.2099152934968; Mon, 15 Feb 2021 17:14:20 -0800 (PST) Received: from localhost ([::1]:37260 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lBowU-0001sH-Rw for importer@patchew.org; Mon, 15 Feb 2021 20:14:18 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34092) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lBopM-0001uz-8p for qemu-devel@nongnu.org; Mon, 15 Feb 2021 20:06:58 -0500 Received: from mga07.intel.com ([134.134.136.100]:13610) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lBopJ-0004gD-Vp for qemu-devel@nongnu.org; Mon, 15 Feb 2021 20:06:55 -0500 Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Feb 2021 17:06:43 -0800 Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Feb 2021 17:06:43 -0800 IronPort-SDR: bAhO1JtJRbDDd2NH5xYX82j0t9eUGj5WTO5m2yxPoCLyWJhH0m862e89U9IU25pBLmVigQL6sC zNzmZKY3Nu/w== X-IronPort-AV: E=McAfee;i="6000,8403,9896"; a="246849237" X-IronPort-AV: E=Sophos;i="5.81,182,1610438400"; d="scan'208";a="246849237" IronPort-SDR: JdMrqQlNN9AMHNEV+Xy3OMIuwO/Z7LEN8hzn0O+cXTxjrqceoFDg2t5vJ8kUkgsC/cT4Mhquh9 vurpong7Oj/w== X-IronPort-AV: E=Sophos;i="5.81,182,1610438400"; d="scan'208";a="591695484" From: isaku.yamahata@gmail.com To: qemu-devel@nongnu.org, imammedo@redhat.com, mst@redhat.com, marcel.apfelbaum@gmail.com Subject: [PATCH v4 04/10] acpi/core: always set SCI_EN when SMM isn't supported Date: Mon, 15 Feb 2021 17:04:09 -0800 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=134.134.136.100; envelope-from=isaku.yamahata@intel.com; helo=mga07.intel.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_ADSP_CUSTOM_MED=0.001, FORGED_GMAIL_RCVD=1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NML_ADSP_CUSTOM_MED=0.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Isaku Yamahata If SMM is not supported, ACPI fixed hardware doesn't support legacy-mode. ACPI-only platform. Where SCI_EN in PM1_CNT register is always set. The bit tells OS legacy mode(SCI_EN cleared) or ACPI mode(SCI_EN set). With the next patch (setting fadt.smi_cmd =3D 0 when smm isn't enabled), guest Linux tries to switch to ACPI mode, finds smi_cmd =3D 0, and then fails to initialize acpi subsystem. This patch proactively fixes it. This patch changes guest ABI. To keep compatibility, use "x-smm-compat-5" introduced by earlier patch. If the property is true, disable new behavior. ACPI spec 4.8.10.1 PM1 Event Grouping PM1 Eanble Registers > For ACPI-only platforms (where SCI_EN is always set) Signed-off-by: Isaku Yamahata Reviewed-by: Igor Mammedov --- hw/acpi/core.c | 11 ++++++++++- hw/acpi/ich9.c | 2 +- hw/acpi/piix4.c | 3 ++- hw/isa/vt82c686.c | 2 +- include/hw/acpi/acpi.h | 4 +++- 5 files changed, 17 insertions(+), 5 deletions(-) diff --git a/hw/acpi/core.c b/hw/acpi/core.c index 7170bff657..1e004d0078 100644 --- a/hw/acpi/core.c +++ b/hw/acpi/core.c @@ -579,6 +579,10 @@ void acpi_pm1_cnt_update(ACPIREGS *ar, bool sci_enable, bool sci_disable) { /* ACPI specs 3.0, 4.7.2.5 */ + if (ar->pm1.cnt.acpi_only) { + return; + } + if (sci_enable) { ar->pm1.cnt.cnt |=3D ACPI_BITMASK_SCI_ENABLE; } else if (sci_disable) { @@ -608,11 +612,13 @@ static const MemoryRegionOps acpi_pm_cnt_ops =3D { }; =20 void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, - bool disable_s3, bool disable_s4, uint8_t s4_val) + bool disable_s3, bool disable_s4, uint8_t s4_val, + bool acpi_only) { FWCfgState *fw_cfg; =20 ar->pm1.cnt.s4_val =3D s4_val; + ar->pm1.cnt.acpi_only =3D acpi_only; ar->wakeup.notify =3D acpi_notify_wakeup; qemu_register_wakeup_notifier(&ar->wakeup); =20 @@ -638,6 +644,9 @@ void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *pare= nt, void acpi_pm1_cnt_reset(ACPIREGS *ar) { ar->pm1.cnt.cnt =3D 0; + if (ar->pm1.cnt.acpi_only) { + ar->pm1.cnt.cnt |=3D ACPI_BITMASK_SCI_ENABLE; + } } =20 /* ACPI GPE */ diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index 5ff4e01c36..853447cf9d 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -282,7 +282,7 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io); acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io); acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable= _s4, - pm->s4_val); + pm->s4_val, !pm->smm_compat && !smm_enabled); =20 acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN); memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm, diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 30dd9b2309..1efc0ded9f 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -497,7 +497,8 @@ static void piix4_pm_realize(PCIDevice *dev, Error **er= rp) =20 acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); - acpi_pm1_cnt_init(&s->ar, &s->io, s->disable_s3, s->disable_s4, s->s4_= val); + acpi_pm1_cnt_init(&s->ar, &s->io, s->disable_s3, s->disable_s4, s->s4_= val, + !s->smm_compat && !s->smm_enabled); acpi_gpe_init(&s->ar, GPE_LEN); =20 s->powerdown_notifier.notify =3D piix4_pm_powerdown_req; diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index a6f5a0843d..071b64b497 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -240,7 +240,7 @@ static void vt82c686b_pm_realize(PCIDevice *dev, Error = **errp) =20 acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); - acpi_pm1_cnt_init(&s->ar, &s->io, false, false, 2); + acpi_pm1_cnt_init(&s->ar, &s->io, false, false, 2, false); } =20 static Property via_pm_properties[] =3D { diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h index 22b0b65bb2..9e8a76f2e2 100644 --- a/include/hw/acpi/acpi.h +++ b/include/hw/acpi/acpi.h @@ -128,6 +128,7 @@ struct ACPIPM1CNT { MemoryRegion io; uint16_t cnt; uint8_t s4_val; + bool acpi_only; }; =20 struct ACPIGPE { @@ -163,7 +164,8 @@ void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn= update_sci, =20 /* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */ void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, - bool disable_s3, bool disable_s4, uint8_t s4_val); + bool disable_s3, bool disable_s4, uint8_t s4_val, + bool acpi_only); void acpi_pm1_cnt_update(ACPIREGS *ar, bool sci_enable, bool sci_disable); void acpi_pm1_cnt_reset(ACPIREGS *ar); --=20 2.17.1