From nobody Thu May 2 04:56:36 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1501506689804403.8979044960056; Mon, 31 Jul 2017 06:11:29 -0700 (PDT) Received: from localhost ([::1]:59507 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dcATo-0004t1-HK for importer@patchew.org; Mon, 31 Jul 2017 09:11:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39346) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dcASQ-00044v-Ar for qemu-devel@nongnu.org; Mon, 31 Jul 2017 09:10:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dcASM-00035P-7C for qemu-devel@nongnu.org; Mon, 31 Jul 2017 09:10:02 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:57304) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dcASM-0002pJ-1O for qemu-devel@nongnu.org; Mon, 31 Jul 2017 09:09:58 -0400 Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Forcepoint Email with ESMTPS id BC7EEF0FD6A38; Mon, 31 Jul 2017 14:09:37 +0100 (IST) Received: from jhogan-linux.le.imgtec.org (192.168.154.110) by HHMAIL01.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server (TLS) id 14.3.294.0; Mon, 31 Jul 2017 14:09:41 +0100 From: James Hogan To: Date: Mon, 31 Jul 2017 14:09:12 +0100 Message-ID: X-Mailer: git-send-email 2.13.2 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [192.168.154.110] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 195.59.15.196 Subject: [Qemu-devel] [PATCH 1/2] mips: Improve segment defs for KVM T&E guests X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yongbok Kim , Paolo Bonzini , James Hogan , kvm@vger.kernel.org, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Improve the segment definitions used by get_physical_address() to yield target_ulong types, e.g. 0xffffffff80000000 instead of 0x80000000. This is in preparation for enabling emulation of MIPS KVM T&E segments in TCG MIPS targets, which unlike KVM could potentially have 64-bit target_ulong. In such a case the offset guest KSEG0 address ends up at e.g. 0x000000008xxxxxxx instead of 0xffffffff8xxxxxxx. This also allows the casts to int32_t that force sign extension to be removed, which removes any confusion due to relational comparison of unsigned (target_ulong) and signed (int32_t) types. Signed-off-by: James Hogan Cc: Yongbok Kim Cc: Aurelien Jarno Cc: Paolo Bonzini Cc: kvm@vger.kernel.org Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/helper.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/target/mips/helper.c b/target/mips/helper.c index a2b79e8725a6..05883b9f4251 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -216,14 +216,14 @@ static int get_physical_address (CPUMIPSState *env, h= waddr *physical, /* effective address (modified for KVM T&E kernel segments) */ target_ulong address =3D real_address; =20 -#define USEG_LIMIT 0x7FFFFFFFUL -#define KSEG0_BASE 0x80000000UL -#define KSEG1_BASE 0xA0000000UL -#define KSEG2_BASE 0xC0000000UL -#define KSEG3_BASE 0xE0000000UL +#define USEG_LIMIT ((target_ulong)(int32_t)0x7FFFFFFFUL) +#define KSEG0_BASE ((target_ulong)(int32_t)0x80000000UL) +#define KSEG1_BASE ((target_ulong)(int32_t)0xA0000000UL) +#define KSEG2_BASE ((target_ulong)(int32_t)0xC0000000UL) +#define KSEG3_BASE ((target_ulong)(int32_t)0xE0000000UL) =20 -#define KVM_KSEG0_BASE 0x40000000UL -#define KVM_KSEG2_BASE 0x60000000UL +#define KVM_KSEG0_BASE ((target_ulong)(int32_t)0x40000000UL) +#define KVM_KSEG2_BASE ((target_ulong)(int32_t)0x60000000UL) =20 if (kvm_enabled()) { /* KVM T&E adds guest kernel segments in useg */ @@ -307,17 +307,17 @@ static int get_physical_address (CPUMIPSState *env, h= waddr *physical, ret =3D TLBRET_BADADDR; } #endif - } else if (address < (int32_t)KSEG1_BASE) { + } else if (address < KSEG1_BASE) { /* kseg0 */ ret =3D get_segctl_physical_address(env, physical, prot, real_addr= ess, rw, access_type, mmu_idx, env->CP0_SegCtl1 >> 16, 0x1FFFFF= FF); - } else if (address < (int32_t)KSEG2_BASE) { + } else if (address < KSEG2_BASE) { /* kseg1 */ ret =3D get_segctl_physical_address(env, physical, prot, real_addr= ess, rw, access_type, mmu_idx, env->CP0_SegCtl1, 0x1FFFFFFF); - } else if (address < (int32_t)KSEG3_BASE) { + } else if (address < KSEG3_BASE) { /* sseg (kseg2) */ ret =3D get_segctl_physical_address(env, physical, prot, real_addr= ess, rw, access_type, mmu_idx, @@ -974,8 +974,7 @@ void mips_cpu_do_interrupt(CPUState *cs) } else if (cause =3D=3D 30 && !(env->CP0_Config3 & (1 << CP0C3_SC)= && env->CP0_Config5 & (1 << CP0C5_CV))) { /* Force KSeg1 for cache errors */ - env->active_tc.PC =3D (int32_t)KSEG1_BASE | - (env->CP0_EBase & 0x1FFFF000); + env->active_tc.PC =3D KSEG1_BASE | (env->CP0_EBase & 0x1FFFF00= 0); } else { env->active_tc.PC =3D env->CP0_EBase & ~0xfff; } --=20 git-series 0.8.10 From nobody Thu May 2 04:56:36 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 150150680979070.9593694548297; Mon, 31 Jul 2017 06:13:29 -0700 (PDT) Received: from localhost ([::1]:59513 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dcAVk-0006NM-A6 for importer@patchew.org; Mon, 31 Jul 2017 09:13:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39299) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dcASE-0003yy-4a for qemu-devel@nongnu.org; Mon, 31 Jul 2017 09:09:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dcASA-0002t4-4U for qemu-devel@nongnu.org; Mon, 31 Jul 2017 09:09:50 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:35762) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dcAS9-0002qe-Rl for qemu-devel@nongnu.org; Mon, 31 Jul 2017 09:09:46 -0400 Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Forcepoint Email with ESMTPS id 4CA84E5885F8F; Mon, 31 Jul 2017 14:09:38 +0100 (IST) Received: from jhogan-linux.le.imgtec.org (192.168.154.110) by HHMAIL01.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server (TLS) id 14.3.294.0; Mon, 31 Jul 2017 14:09:41 +0100 From: James Hogan To: Date: Mon, 31 Jul 2017 14:09:13 +0100 Message-ID: X-Mailer: git-send-email 2.13.2 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [192.168.154.110] X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 195.59.15.196 Subject: [Qemu-devel] [PATCH 2/2] mips: Add KVM T&E segment support for TCG X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yongbok Kim , Paolo Bonzini , James Hogan , kvm@vger.kernel.org, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MIPS KVM trap & emulate guest kernels have a different segment layout compared with traditional MIPS kernels, to allow both the user and kernel code to run from the user address segment without repeatedly trapping to KVM. QEMU currently supports this layout only for KVM, but its sometimes useful to be able to run these kernels in QEMU on a PC, so enable it for TCG too. This also paves the way for MIPS KVM VZ support (which uses the normal virtual memory layout) by abstracting whether user mode kernel segments are in use. Suggested-by: Paolo Bonzini Signed-off-by: James Hogan Cc: Yongbok Kim Cc: Aurelien Jarno Cc: Paolo Bonzini Cc: kvm@vger.kernel.org Reviewed-by: Richard Henderson --- hw/mips/addr.c | 12 ++++++++++++ hw/mips/mips_malta.c | 17 +++++++---------- include/hw/mips/cpudevs.h | 5 +++-- target/mips/helper.c | 4 ++-- target/mips/translate.c | 4 ++-- 5 files changed, 26 insertions(+), 16 deletions(-) diff --git a/hw/mips/addr.c b/hw/mips/addr.c index e4e86b4a7548..e552dfca843e 100644 --- a/hw/mips/addr.c +++ b/hw/mips/addr.c @@ -24,6 +24,8 @@ #include "hw/hw.h" #include "hw/mips/cpudevs.h" =20 +static int mips_um_ksegs; + uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr) { return addr & 0x1fffffffll; @@ -38,3 +40,13 @@ uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uin= t64_t addr) { return addr | 0x40000000ll; } + +int mips_um_ksegs_enabled(void) +{ + return mips_um_ksegs; +} + +void mips_um_ksegs_enable(void) +{ + mips_um_ksegs =3D 1; +} diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 3487d16f61eb..f3354362890a 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -816,23 +816,20 @@ static int64_t load_kernel (void) exit(1); } =20 - /* Sanity check where the kernel has been linked */ - if (kvm_enabled()) { - if (kernel_entry & 0x80000000ll) { + /* Check where the kernel has been linked */ + if (kernel_entry & 0x80000000ll) { + if (kvm_enabled()) { error_report("KVM guest kernels must be linked in useg. " "Did you forget to enable CONFIG_KVM_GUEST?"); exit(1); } =20 - xlate_to_kseg0 =3D cpu_mips_kvm_um_phys_to_kseg0; + xlate_to_kseg0 =3D cpu_mips_phys_to_kseg0; } else { - if (!(kernel_entry & 0x80000000ll)) { - error_report("KVM guest kernels aren't supported with TCG. " - "Did you unintentionally enable CONFIG_KVM_GUEST?= "); - exit(1); - } + /* if kernel entry is in useg it is probably a KVM T&E kernel */ + mips_um_ksegs_enable(); =20 - xlate_to_kseg0 =3D cpu_mips_phys_to_kseg0; + xlate_to_kseg0 =3D cpu_mips_kvm_um_phys_to_kseg0; } =20 /* load initrd */ diff --git a/include/hw/mips/cpudevs.h b/include/hw/mips/cpudevs.h index 698339b83ec7..0c114f486edb 100644 --- a/include/hw/mips/cpudevs.h +++ b/include/hw/mips/cpudevs.h @@ -5,11 +5,12 @@ =20 /* Definitions for MIPS CPU internal devices. */ =20 -/* mips_addr.c */ +/* addr.c */ uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr); uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr); uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr); - +int mips_um_ksegs_enabled(void); +void mips_um_ksegs_enable(void); =20 /* mips_int.c */ void cpu_mips_irq_init_cpu(MIPSCPU *cpu); diff --git a/target/mips/helper.c b/target/mips/helper.c index 05883b9f4251..ca39aca08a64 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -19,10 +19,10 @@ #include "qemu/osdep.h" =20 #include "cpu.h" -#include "sysemu/kvm.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" #include "exec/log.h" +#include "hw/mips/cpudevs.h" =20 enum { TLBRET_XI =3D -6, @@ -225,7 +225,7 @@ static int get_physical_address (CPUMIPSState *env, hwa= ddr *physical, #define KVM_KSEG0_BASE ((target_ulong)(int32_t)0x40000000UL) #define KVM_KSEG2_BASE ((target_ulong)(int32_t)0x60000000UL) =20 - if (kvm_enabled()) { + if (mips_um_ksegs_enabled()) { /* KVM T&E adds guest kernel segments in useg */ if (real_address >=3D KVM_KSEG0_BASE) { if (real_address < KVM_KSEG2_BASE) { diff --git a/target/mips/translate.c b/target/mips/translate.c index 51626aead32c..4635012d6436 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -27,10 +27,10 @@ #include "exec/exec-all.h" #include "tcg-op.h" #include "exec/cpu_ldst.h" +#include "hw/mips/cpudevs.h" =20 #include "exec/helper-proto.h" #include "exec/helper-gen.h" -#include "sysemu/kvm.h" #include "exec/semihost.h" =20 #include "target/mips/trace.h" @@ -20639,7 +20639,7 @@ void cpu_state_reset(CPUMIPSState *env) env->CP0_Wired =3D 0; env->CP0_GlobalNumber =3D (cs->cpu_index & 0xFF) << CP0GN_VPId; env->CP0_EBase =3D (cs->cpu_index & 0x3FF); - if (kvm_enabled()) { + if (mips_um_ksegs_enabled()) { env->CP0_EBase |=3D 0x40000000; } else { env->CP0_EBase |=3D (int32_t)0x80000000; --=20 git-series 0.8.10