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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225362180158500 Content-Type: text/plain; charset="utf-8" hexagon_get_tb_cpu_state() detects a misaligned PC and raises an exception, but it passed HEX_CAUSE_PC_NOT_ALIGNED (a cause code) as the event argument to hexagon_raise_exception_err(), whose second parameter is the event index (it ends up in cs->exception_index). This causes an infinite reboot loop when we reache a misaligned PC. Similarly, gen_exception_decode_fail() is called with a cause code (HEX_CAUSE_INVALID_PACKET) but unconditionally routes it through gen_exception(), which treats its argument as an event index and stores it directly in cs->exception_index. Signed-off-by: Matheus Tavares Bernardino Reviewed-by: Pierrick Bouvier --- target/hexagon/cpu.c | 3 ++- target/hexagon/translate.c | 4 ++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 42d93e5da47..eac355497d8 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -320,7 +320,8 @@ static TCGTBCPUState hexagon_get_tb_cpu_state(CPUState = *cs) hex_flags =3D FIELD_DP32(hex_flags, TB_FLAGS, IS_TIGHT_LOOP, 1); } if (pc & PCALIGN_MASK) { - hexagon_raise_exception_err(env, HEX_CAUSE_PC_NOT_ALIGNED, 0); + env->cause_code =3D HEX_CAUSE_PC_NOT_ALIGNED; + hexagon_raise_exception_err(env, HEX_EVENT_PRECISE, (uint32_t)pc); } =20 #ifndef CONFIG_USER_ONLY diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 77235916f4b..341842c6af1 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -238,7 +238,11 @@ static void gen_exception_decode_fail(DisasContext *ct= x, int nwords, int excp) =20 gen_exec_counters(ctx); tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], fail_pc); +#ifdef CONFIG_USER_ONLY gen_exception(excp, fail_pc); +#else + gen_precise_exception(excp, fail_pc); +#endif ctx->base.is_jmp =3D DISAS_NORETURN; ctx->base.pc_next =3D fail_pc; } --=20 2.37.2 From nobody Mon Jul 27 18:58:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784225280; cv=none; d=zohomail.com; s=zohoarc; b=Ct9gH4E6mSS5Qkf8fzrKKM21byvtSjjt52uUdxhMAqYk+xDEyDWVMeJG/M5OVpdyvW2MztF525+f8iDzrGN4jDgEmAs3guXf5W6DnQq2fW061gUcKBmBJvk6Z7aRyCW7/vAyKmpZAPcoZ4SA7vxAdRU/ZVFucuSfhcRTPCwZhwk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784225280; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=KMIpPvOXOydLxlpKluNdP1sFyAVO3m7HbJayX4OTafU=; b=WrbIYhyGW1tc9Nps4OUfyJcxnI6Q543bZx46Z6bjgSds3/VJv3kZPFNmI9/55cdIJw1VPaPj+bZ3c/ybN6TmRwv8Kh+cFZaUxEv8mY+V79CgK4KDCszo2r1oeId37rhDOGlzkh3jGcsHRMAPfdq3ODyeBZ5ot93ZDz/vwivqXL4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17842252808071014.3317133931465; Thu, 16 Jul 2026 11:08:00 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wkQUd-0000sx-T6; Thu, 16 Jul 2026 14:07:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUb-0000sC-UQ for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:29 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUZ-0001TP-HV for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:29 -0400 Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66GGSq0C3481671 for ; Thu, 16 Jul 2026 18:07:25 GMT Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4fetcf2usd-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 18:07:25 +0000 (GMT) Received: by mail-pj1-f71.google.com with SMTP id 98e67ed59e1d1-38de0739ab6so4871526a91.3 for ; Thu, 16 Jul 2026 11:07:25 -0700 (PDT) Received: from hu-mathbern-lv.qualcomm.com (Global_NAT1.qualcomm.com. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225282164158501 Content-Type: text/plain; charset="utf-8" As documented: * @get_phys_addr_debug: Callback for obtaining a physical address. * This must be able to handle a non-page-aligned address, and will * return the physical address corresponding to that address. When MMU is enabled, hexagon_cpu_get_phys_addr_debug() returns the physical address page-aligned, not corrected to reflect the exact byte the virtual addr maps to within the page. Let's fix that. The MMU-disabled case is already correct. This would break semihosting argument reads when it is added for Hexagon. Reviewed-by: Pierrick Bouvier Signed-off-by: Matheus Tavares Bernardino --- target/hexagon/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index eac355497d8..73a799da877 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -570,7 +570,9 @@ static hwaddr hexagon_cpu_get_phys_addr_debug(CPUState = *cs, vaddr addr) =20 if (get_physical_address(env, &phys_addr, &prot, &page_size, &excp, addr, 0, mmu_idx)) { + vaddr page_offset =3D addr & (TARGET_PAGE_SIZE - 1); find_qemu_subpage(&addr, &phys_addr, page_size); + phys_addr +=3D hexagon_cpu_mmu_enabled(env) ? page_offset : 0; return phys_addr; } =20 --=20 2.37.2 From nobody Mon Jul 27 18:58:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784225331; cv=none; d=zohomail.com; s=zohoarc; b=fpxWisdssn8AfFIALWqrK4pnXB1ponGSimsFYB0W/m8a36Xu0eU/Bkp2eZfI7HKOJTULu8ICEHKVdmUj6SsQxoVK4L+xv8+kbCAXaCo7+0ZRrIUWktIAvxc+T+QgUJ6JcT6+iqYUmul/AjeESdeVb4ZyF5/0/mI3W3/0g/HPKbg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784225331; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=KB0+ifjklJBaJetinnUHaAFa+mf3BVSV9s1av0ljs/c=; b=f4xVVBijK8M29yVf/iOw01z9fdlkifxTW5z8oa9F5lcakXJbXH/rCP2t5k/MMoolr5VZmHtsj/0VAoydd5y0y6IfwdFcwYMBgSzaC8wgFxLRZcdkI99HWs35V9b2RCiI5kQJ8uSwTIAfWaa0DglnPunrPslXUokp+LUGpguvsrQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1784225330932442.33069580867993; Thu, 16 Jul 2026 11:08:50 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wkQUe-0000t6-B0; Thu, 16 Jul 2026 14:07:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUc-0000sG-G0 for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:30 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUa-0001Tr-O2 for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:30 -0400 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66GGSluU3395615 for ; Thu, 16 Jul 2026 18:07:27 GMT Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4feym19f2r-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 18:07:27 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-3811ae55313so3350220a91.3 for ; Thu, 16 Jul 2026 11:07:27 -0700 (PDT) Received: from hu-mathbern-lv.qualcomm.com (Global_NAT1.qualcomm.com. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225332092158500 Content-Type: text/plain; charset="utf-8" Some packets end a translation block without a change-of-flow. These do not update the PC during commit, so gen_end_tb() leaves hex_gpr[HEX_REG_PC] pointing at the same packet and the block gets re-entered forever. Set PC explicitly to next_PC in that gen_end_tb() branch to fix execution of next blocks. Note that gen_start_packet() used to have a special case for tlblock/k0lock, setting ctx->next_PC to the packet's own address. This relies on the tlblock/k0lock helpers to properly advance the PC, which is never done (only env->next_PC is updated, but that never reaches hex_gpr[HEX_REG_PC]). Drop the special case so these packets advance to the following packet like any other non-COF TB terminator. Reviewed-by: Pierrick Bouvier Signed-off-by: Matheus Tavares Bernardino --- target/hexagon/translate.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index 341842c6af1..f8b87c279e5 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -210,6 +210,12 @@ static void gen_end_tb(DisasContext *ctx) gen_goto_tb(ctx, 0, ctx->base.tb->pc, true); gen_set_label(skip); gen_goto_tb(ctx, 1, ctx->next_PC, false); + } else if (!ctx->pkt.pkt_has_cof) { + /* + * Packet with no deferred COF that still ends the TB. PC is + * not updated during commit, so set it explicitly to next_PC. + */ + gen_goto_tb(ctx, 0, ctx->next_PC, true); } else { tcg_gen_lookup_and_goto_ptr(); } @@ -286,6 +292,7 @@ static bool check_for_attrib(Packet *pkt, int attrib) return false; } =20 +#ifndef CONFIG_USER_ONLY static bool check_for_opcode(Packet *pkt, uint16_t opcode) { for (int i =3D 0; i < pkt->num_insns; i++) { @@ -295,6 +302,7 @@ static bool check_for_opcode(Packet *pkt, uint16_t opco= de) } return false; } +#endif =20 static bool need_slot_cancelled(Packet *pkt) { @@ -566,10 +574,7 @@ static void analyze_packet(DisasContext *ctx) static void gen_start_packet(DisasContext *ctx) { Packet *pkt =3D &ctx->pkt; - target_ulong next_PC =3D (check_for_opcode(pkt, Y2_k0lock) || - check_for_opcode(pkt, Y2_tlblock)) ? - ctx->base.pc_next : - ctx->base.pc_next + pkt->encod_pkt_size_in_= bytes; + target_ulong next_PC =3D ctx->base.pc_next + pkt->encod_pkt_size_in_by= tes; int i; =20 /* Clear out the disassembly context */ --=20 2.37.2 From nobody Mon Jul 27 18:58:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784225280; cv=none; d=zohomail.com; s=zohoarc; b=kjNfOj0jQuMaSKNnN1cLlZ+15Jk89JjAfuREJCP2QkxexbEzokYqFCEPo/rAbi5G65gt7b4MWoNxqUVn9bKoARU1fsRDnKpDevrcAnOlu6LQu95hnFr2J7lcmprnd94GBF+FEm60251dYPoPB3wadM38JMOGYrsfdrpUCREvsO0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784225280; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=r1f4hb6Kd8hBTIEo4PyGmASCC8aKN4PC9ZUadxyxhNE=; b=AH39S9YE80Y+YxKDIv39a00eKV4lMsre71HLS3TVbY8PjHr1aOIjsP5S8uFDJ1bjLjTNIdYCK+pS01DfZrg1F+INDUDPIu/SX1ccKOs5Mx/JAqG74i3ZzxKE9UhB2EAM/Ell0n/OiRwwaHmLQElUnnM5uIT7ZHez0XQS7/R33jI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1784225280855895.0585093913649; Thu, 16 Jul 2026 11:08:00 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wkQUf-0000tr-So; Thu, 16 Jul 2026 14:07:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUe-0000t4-5s for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:32 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUc-0001UM-7B for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:31 -0400 Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66GHZQhl385147 for ; Thu, 16 Jul 2026 18:07:29 GMT Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ff3u6g3v6-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 18:07:28 +0000 (GMT) Received: by mail-pj1-f72.google.com with SMTP id 98e67ed59e1d1-380b630c505so8457267a91.1 for ; Thu, 16 Jul 2026 11:07:28 -0700 (PDT) Received: from hu-mathbern-lv.qualcomm.com (Global_NAT1.qualcomm.com. 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Signed-off-by: Matheus Tavares Bernardino Signed-off-by: Brian Cain Reviewed-by: Pierrick Bouvier --- target/hexagon/cpu_helper.h | 6 ++ target/hexagon/cpu_helper.c | 133 ++++++++++++++++++++++++++++++++++++ 2 files changed, 139 insertions(+) diff --git a/target/hexagon/cpu_helper.h b/target/hexagon/cpu_helper.h index d1767503156..ca2e13ab1d1 100644 --- a/target/hexagon/cpu_helper.h +++ b/target/hexagon/cpu_helper.h @@ -7,6 +7,12 @@ #ifndef HEXAGON_CPU_HELPER_H #define HEXAGON_CPU_HELPER_H =20 +void hexagon_read_memory(CPUHexagonState *env, target_ulong vaddr, int siz= e, + void *retptr, uintptr_t retaddr); +void hexagon_write_memory(CPUHexagonState *env, target_ulong vaddr, + int size, uint64_t data, uintptr_t retaddr); +void hexagon_peek_memory_range(CPUHexagonState *env, uint32_t start_addr, + uint32_t length, uintptr_t retaddr); uint32_t hexagon_get_pmu_counter(CPUHexagonState *cur_env, int index); void hexagon_modify_ssr(CPUHexagonState *env, uint32_t new, uint32_t old); int get_cpu_mode(CPUHexagonState *env); diff --git a/target/hexagon/cpu_helper.c b/target/hexagon/cpu_helper.c index 64c5746c6d9..e981e11a35d 100644 --- a/target/hexagon/cpu_helper.c +++ b/target/hexagon/cpu_helper.c @@ -25,6 +25,139 @@ #include "sys_macros.h" #include "arch.h" =20 +#ifndef CONFIG_USER_ONLY + +static bool hexagon_read_memory_small(CPUHexagonState *env, target_ulong a= ddr, + int byte_count, unsigned char *dstbu= f, + int mmu_idx, uintptr_t retaddr) + { + /* handle small sizes */ + switch (byte_count) { + case 1: + *dstbuf =3D cpu_ldub_mmuidx_ra(env, addr, mmu_idx, retaddr); + return true; + + case 2: + if (QEMU_IS_ALIGNED(addr, 2)) { + *(unsigned short *)dstbuf =3D + cpu_lduw_le_mmuidx_ra(env, addr, mmu_idx, retaddr); + return true; + } + break; + + case 4: + if (QEMU_IS_ALIGNED(addr, 4)) { + *(uint32_t *)dstbuf =3D + cpu_ldl_le_mmuidx_ra(env, addr, mmu_idx, retaddr); + return true; + } + break; + + case 8: + if (QEMU_IS_ALIGNED(addr, 8)) { + *(uint64_t *)dstbuf =3D + cpu_ldq_le_mmuidx_ra(env, addr, mmu_idx, retaddr); + return true; + } + break; + + default: + /* larger request, handle elsewhere */ + return false; + } + + /* not aligned, copy bytes */ + for (int i =3D 0; i < byte_count; ++i) { + *dstbuf++ =3D cpu_ldub_mmuidx_ra(env, addr++, mmu_idx, retaddr); + } + return true; +} + +void hexagon_read_memory(CPUHexagonState *env, target_ulong vaddr, int siz= e, + void *retptr, uintptr_t retaddr) +{ + BQL_LOCK_GUARD(); + CPUState *cs =3D env_cpu(env); + unsigned mmu_idx =3D cpu_mmu_index(cs, false); + if (!hexagon_read_memory_small(env, vaddr, size, retptr, mmu_idx, + retaddr)) { + cpu_abort(cs, "%s: ERROR: bad size =3D %d!\n", __func__, size); + } +} + +static bool hexagon_write_memory_small(CPUHexagonState *env, target_ulong = addr, + int byte_count, unsigned char *srcb= uf, + int mmu_idx, uintptr_t retaddr) +{ + /* handle small sizes */ + switch (byte_count) { + case 1: + cpu_stb_mmuidx_ra(env, addr, *srcbuf, mmu_idx, retaddr); + return true; + + case 2: + if (QEMU_IS_ALIGNED(addr, 2)) { + cpu_stw_le_mmuidx_ra(env, addr, *(uint16_t *)srcbuf, mmu_idx, = retaddr); + return true; + } + break; + + case 4: + if (QEMU_IS_ALIGNED(addr, 4)) { + cpu_stl_le_mmuidx_ra(env, addr, *(uint32_t *)srcbuf, mmu_idx, = retaddr); + return true; + } + break; + + case 8: + if (QEMU_IS_ALIGNED(addr, 8)) { + cpu_stq_le_mmuidx_ra(env, addr, *(uint64_t *)srcbuf, mmu_idx, = retaddr); + return true; + } + break; + + default: + /* larger request, handle elsewhere */ + return false; + } + + /* not aligned, copy bytes */ + for (int i =3D 0; i < byte_count; ++i) { + cpu_stb_mmuidx_ra(env, addr++, *srcbuf++, mmu_idx, retaddr); + } + + return true; +} + +void hexagon_write_memory(CPUHexagonState *env, target_ulong vaddr, + int size, uint64_t data, uintptr_t retaddr) +{ + CPUState *cs =3D env_cpu(env); + unsigned mmu_idx =3D cpu_mmu_index(cs, false); + if (!hexagon_write_memory_small(env, vaddr, size, (unsigned char *)&da= ta, + mmu_idx, retaddr)) { + cpu_abort(cs, "%s: ERROR: bad size =3D %d!\n", __func__, size); + } +} + +static inline uint32_t page_start(uint32_t addr) +{ + uint32_t page_align =3D ~(TARGET_PAGE_SIZE - 1); + return addr & page_align; +} + +void hexagon_peek_memory_range(CPUHexagonState *env, uint32_t start_addr, + uint32_t length, uintptr_t retaddr) +{ + unsigned int warm; + uint32_t first =3D page_start(start_addr); + uint32_t last =3D page_start(start_addr + length - 1); + for (uint32_t page =3D first; page <=3D last; page +=3D TARGET_PAGE_SI= ZE) { + hexagon_read_memory(env, page, 1, &warm, retaddr); + } +} + +#endif =20 uint32_t hexagon_get_pmu_counter(CPUHexagonState *cur_env, int index) { --=20 2.37.2 From nobody Mon Jul 27 18:58:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784225290; cv=none; d=zohomail.com; s=zohoarc; b=KDmeTzaIabmyE1cZbRqWfuKMkhOfk1F7BwjPA1AFx7NFJqAS1wZAQfdiOVdIWwL3EA+zlbVHTxLblN8AaroHwwL9O1BGSijDL7jESiwxj4fnxYLkrQHy3fRBTEg5TC5C60Erlbq2rwpDPGAkuvdNzSO5EoxCy6FdUN6+4bN9ILE= ARC-Message-Signature: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225292061158500 Content-Type: text/plain; charset="utf-8" And adjust op_helper to use those. They will also be used on upcoming semihosting commits. Reviewed-by: Pierrick Bouvier Signed-off-by: Matheus Tavares Bernardino --- target/hexagon/cpu_helper.h | 18 +++++++++++++++++ target/hexagon/cpu_helper.c | 40 +++++++++++++++++++++++++++++++++++++ target/hexagon/op_helper.c | 18 ++--------------- 3 files changed, 60 insertions(+), 16 deletions(-) diff --git a/target/hexagon/cpu_helper.h b/target/hexagon/cpu_helper.h index ca2e13ab1d1..757a49fc4d4 100644 --- a/target/hexagon/cpu_helper.h +++ b/target/hexagon/cpu_helper.h @@ -7,6 +7,24 @@ #ifndef HEXAGON_CPU_HELPER_H #define HEXAGON_CPU_HELPER_H =20 +static inline void arch_set_thread_reg(CPUHexagonState *env, uint32_t reg, + uint32_t val) +{ + g_assert(reg < TOTAL_PER_THREAD_REGS); + env->gpr[reg] =3D val; +} + +static inline uint32_t arch_get_thread_reg(CPUHexagonState *env, uint32_t = reg) +{ + g_assert(reg < TOTAL_PER_THREAD_REGS); + return env->gpr[reg]; +} + +void arch_set_system_reg(CPUHexagonState *env, uint32_t reg, uint32_t val); +void arch_set_system_reg_masked(CPUHexagonState *env, uint32_t reg, + uint32_t val); +uint32_t arch_get_system_reg(CPUHexagonState *env, uint32_t reg); + void hexagon_read_memory(CPUHexagonState *env, target_ulong vaddr, int siz= e, void *retptr, uintptr_t retaddr); void hexagon_write_memory(CPUHexagonState *env, target_ulong vaddr, diff --git a/target/hexagon/cpu_helper.c b/target/hexagon/cpu_helper.c index e981e11a35d..98ce599571e 100644 --- a/target/hexagon/cpu_helper.c +++ b/target/hexagon/cpu_helper.c @@ -27,6 +27,46 @@ =20 #ifndef CONFIG_USER_ONLY =20 +uint32_t arch_get_system_reg(CPUHexagonState *env, uint32_t reg) +{ + if (reg =3D=3D HEX_SREG_PCYCLELO) { + return hexagon_get_sys_pcycle_count_low(env); + } else if (reg =3D=3D HEX_SREG_PCYCLEHI) { + return hexagon_get_sys_pcycle_count_high(env); + } + + g_assert(reg < NUM_SREGS); + if (reg < HEX_SREG_GLB_START) { + return env->t_sreg[reg]; + } else { + HexagonCPU *cpu =3D env_archcpu(env); + return hexagon_globalreg_read(cpu->globalregs, reg, env->threadId); + } +} + +void arch_set_system_reg(CPUHexagonState *env, uint32_t reg, uint32_t val) +{ + g_assert(reg < NUM_SREGS); + if (reg < HEX_SREG_GLB_START) { + env->t_sreg[reg] =3D val; + } else { + HexagonCPU *cpu =3D env_archcpu(env); + hexagon_globalreg_write(cpu->globalregs, reg, val, env->threadId); + } +} + +void arch_set_system_reg_masked(CPUHexagonState *env, uint32_t reg, + uint32_t val) +{ + g_assert(reg < NUM_SREGS); + if (reg < HEX_SREG_GLB_START) { + env->t_sreg[reg] =3D val; + } else { + HexagonCPU *cpu =3D env_archcpu(env); + hexagon_globalreg_write_masked(cpu->globalregs, reg, val); + } +} + static bool hexagon_read_memory_small(CPUHexagonState *env, target_ulong a= ddr, int byte_count, unsigned char *dstbu= f, int mmu_idx, uintptr_t retaddr) diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 125952aee59..4859d8a484e 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -1839,28 +1839,14 @@ void HELPER(setimask)(CPUHexagonState *env, uint32_= t tid, uint32_t imask) void HELPER(sreg_write_masked)(CPUHexagonState *env, uint32_t reg, uint32_= t val) { BQL_LOCK_GUARD(); - if (reg < HEX_SREG_GLB_START) { - env->t_sreg[reg] =3D val; - } else { - HexagonCPU *cpu =3D env_archcpu(env); - if (cpu->globalregs) { - hexagon_globalreg_write_masked(cpu->globalregs, reg, val); - } - } + arch_set_system_reg_masked(env, reg, val); } =20 static inline QEMU_ALWAYS_INLINE uint32_t sreg_read(CPUHexagonState *env, uint32_t reg) { - HexagonCPU *cpu; - g_assert(bql_locked()); - if (reg < HEX_SREG_GLB_START) { - return env->t_sreg[reg]; - } - cpu =3D env_archcpu(env); - return cpu->globalregs ? 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Thu, 16 Jul 2026 11:07:30 -0700 (PDT) X-Received: by 2002:a17:90b:554e:b0:37f:fdc8:71b4 with SMTP id 98e67ed59e1d1-38e1add8d8emr11346185a91.2.1784225249759; Thu, 16 Jul 2026 11:07:29 -0700 (PDT) From: Matheus Tavares Bernardino To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, pierrick.bouvier@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, philmd@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PATCH v2 06/14] semihosting: add APIs for chardev-aware guest fd routing Date: Thu, 16 Jul 2026 11:06:50 -0700 Message-Id: <90074658cf531e6af28e4857e44dfb6495efeb47.1784225209.git.matheus.bernardino@oss.qualcomm.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=KPRqylFo c=1 sm=1 tr=0 ts=6a591de3 cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=4trHgkiC9q-UxXHgwkcA:9 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDE4NSBTYWx0ZWRfX+O916wtXKqAN H0PWCW5C0v0k4b39GYXGfAGFdtRxiGs4YdrKRC1aKmINsdzf5yj2d+ve6W9fnA7wPG4m0UPGYlG 2Yl1mXQFVIitbyZCbmkBzGfcIB2FgIyP7ckkNVr0F5c/B3SeHRRYYa+QH+48OedYKLXuLWXPj+B Ivv3tyOWfyx5mSI/RYa9mtvGOnuOcKkuyTfiBHukspf5PcvokurJ+4MhObnGdwdsDWIsHrKpLGJ yrR1DjXWa+Lyqhdr7z+vKg+IeP25shX5kt7D228PuekG0zEArywwX1IvvWtRfY9AI4MMG/tr1va TwpXnhZ+WY6MqnyH2Q48ePksl9hZ5EabxpbgtV55lBjxaJJUtZQbByg6BPaB1lkICbUf6daf7fT CKKRX5s4Fx3m2sZUA+ve0dKcZAybqe9twLlf/f4QVdltCNW+y+cK9Oq7G14zOk05Zy9hyNY7Dgc kRWOKC1+hHhpScemm4Q== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDE4NSBTYWx0ZWRfXyzOGzEIl45P6 hXkY9PQdS8Z3TL2C4FnBGiuThHoyOVrOcBh/tTUAMc+oacpDrvxQsPqmp63gn1Z//1TIMmMDyA/ BdvAzMj+fqfV99FkrWm5aZAlE6Mqcjg= X-Proofpoint-GUID: xG5kH-cWrbSLyGGTv8S7kQzjqX-hw734 X-Proofpoint-ORIG-GUID: xG5kH-cWrbSLyGGTv8S7kQzjqX-hw734 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_06,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 impostorscore=0 clxscore=1015 malwarescore=0 bulkscore=0 spamscore=0 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160185 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225334011158500 Content-Type: text/plain; charset="utf-8" From: Brian Cain Add qemu_semihosting_console_has_chardev() to query whether the semihosting console is backed by a chardev, and console_guestfd() to initialize a guest file descriptor as GuestFDConsole. These APIs enable callers to route semihosting I/O through a chardev rather than directly to host stdio. Signed-off-by: Brian Cain Reviewed-by: Pierrick Bouvier --- include/semihosting/console.h | 9 +++++++++ include/semihosting/guestfd.h | 9 +++++++++ semihosting/console.c | 5 +++++ semihosting/guestfd.c | 8 ++++++++ 4 files changed, 31 insertions(+) diff --git a/include/semihosting/console.h b/include/semihosting/console.h index 1c12e178ee3..d5f149e2088 100644 --- a/include/semihosting/console.h +++ b/include/semihosting/console.h @@ -54,4 +54,13 @@ void qemu_semihosting_console_block_until_ready(CPUState= *cs); */ bool qemu_semihosting_console_ready(void); =20 +/** + * qemu_semihosting_console_has_chardev: + * + * Return true if the semihosting console is backed by a chardev. + * When true, console I/O goes through the chardev rather than + * host stdio. + */ +bool qemu_semihosting_console_has_chardev(void); + #endif /* SEMIHOST_CONSOLE_H */ diff --git a/include/semihosting/guestfd.h b/include/semihosting/guestfd.h index a7ea1041ea0..76ca0fcf1a7 100644 --- a/include/semihosting/guestfd.h +++ b/include/semihosting/guestfd.h @@ -70,6 +70,15 @@ GuestFD *get_guestfd(int guestfd); */ void associate_guestfd(int guestfd, int hostfd); =20 +/** + * console_guestfd: + * @guestfd: GuestFD index + * + * Initialize the GuestFD for @guestfd to GuestFDConsole. + * I/O will be routed through the semihosting console chardev. + */ +void console_guestfd(int guestfd); + /** * staticfile_guestfd: * @guestfd: GuestFD index diff --git a/semihosting/console.c b/semihosting/console.c index 91e5d50d502..9d786833564 100644 --- a/semihosting/console.c +++ b/semihosting/console.c @@ -108,6 +108,11 @@ int qemu_semihosting_console_read(CPUState *cs, void *= buf, int len) return ret; } =20 +bool qemu_semihosting_console_has_chardev(void) +{ + return console.chr !=3D NULL; +} + int qemu_semihosting_console_write(void *buf, int len) { if (console.chr) { diff --git a/semihosting/guestfd.c b/semihosting/guestfd.c index e8f236c690c..8b5770bab0d 100644 --- a/semihosting/guestfd.c +++ b/semihosting/guestfd.c @@ -117,6 +117,14 @@ void associate_guestfd(int guestfd, int hostfd) gf->hostfd =3D hostfd; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225328155158500 Content-Type: text/plain; charset="utf-8" This is currently unused by existing semihosting targets, but it will be used by hexagon in the following commit. Signed-off-by: Brian Cain Reviewed-by: Daniel Henrique Barboza Signed-off-by: Matheus Tavares Bernardino --- include/semihosting/common-semi.h | 1 + semihosting/arm-compat-semi.c | 1 + target/arm/common-semi-target.c | 4 ++++ target/riscv/common-semi-target.c | 4 ++++ 4 files changed, 10 insertions(+) diff --git a/include/semihosting/common-semi.h b/include/semihosting/common= -semi.h index aa511a46f42..a11905ef4ef 100644 --- a/include/semihosting/common-semi.h +++ b/include/semihosting/common-semi.h @@ -37,6 +37,7 @@ void do_common_semihosting(CPUState *cs); uint64_t common_semi_arg(CPUState *cs, int argno); void common_semi_set_ret(CPUState *cs, uint64_t ret); +void common_semi_set_err(CPUState *cs, int err); bool is_64bit_semihosting(CPUArchState *env); bool common_semi_sys_exit_is_extended(CPUState *cs); uint64_t common_semi_stack_bottom(CPUState *cs); diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index 5e5f181b908..c54753f696f 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -237,6 +237,7 @@ static void common_semi_cb(CPUState *cs, uint64_t ret, = int err) ts->swi_errno =3D err; #else syscall_err =3D err; + common_semi_set_err(cs, err); #endif } common_semi_set_ret(cs, ret); diff --git a/target/arm/common-semi-target.c b/target/arm/common-semi-targe= t.c index 2b77ce9c17b..38d52deb3d6 100644 --- a/target/arm/common-semi-target.c +++ b/target/arm/common-semi-target.c @@ -34,6 +34,10 @@ void common_semi_set_ret(CPUState *cs, uint64_t ret) } } =20 +void common_semi_set_err(CPUState *cs, int err) +{ +} + bool common_semi_sys_exit_is_extended(CPUState *cs) { return is_a64(cpu_env(cs)); diff --git a/target/riscv/common-semi-target.c b/target/riscv/common-semi-t= arget.c index aeaeb88d536..38a00e160c3 100644 --- a/target/riscv/common-semi-target.c +++ b/target/riscv/common-semi-target.c @@ -26,6 +26,10 @@ void common_semi_set_ret(CPUState *cs, uint64_t ret) env->gpr[xA0] =3D ret; } =20 +void common_semi_set_err(CPUState *cs, int err) +{ +} + bool is_64bit_semihosting(CPUArchState *env) { return riscv_cpu_mxl(env) !=3D MXL_RV32; --=20 2.37.2 From nobody Mon Jul 27 18:58:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225328263158500 Content-Type: text/plain; charset="utf-8" Baremetal Hexagon programs use trap0 #0 to invoke semihosting calls for I/O and process control. Wire up the arm-compatible semihosting framework for softmmu by enabling CONFIG_ARM_COMPATIBLE_SEMIHOSTING and routing trap0 to the semihosting handler. Signed-off-by: Matheus Tavares Bernardino Signed-off-by: Brian Cain Reviewed-by: Pierrick Bouvier --- docs/system/target-hexagon.rst | 8 +- configs/targets/hexagon-softmmu.mak | 2 + hw/hexagon/hexagon_dsp.c | 2 + target/hexagon/common-semi-target.c | 51 +++++++++ target/hexagon/hexswi.c | 167 +++++++++++++++++++++++++++- hw/hexagon/Kconfig | 1 + qemu-options.hx | 8 +- target/hexagon/meson.build | 3 + 8 files changed, 232 insertions(+), 10 deletions(-) create mode 100644 target/hexagon/common-semi-target.c diff --git a/docs/system/target-hexagon.rst b/docs/system/target-hexagon.rst index 416b8f7be76..36115137626 100644 --- a/docs/system/target-hexagon.rst +++ b/docs/system/target-hexagon.rst @@ -91,9 +91,11 @@ Semihosting ----------- Hexagon supports a semihosting interface similar to other architectures'. The ``trap0`` instruction can activate these semihosting calls so that the -guest software can access the host console and filesystem. Semihosting -is not yet implemented in QEMU hexagon. - +guest software can access the host console and filesystem. Read the +`Hexagon Semihosting Specification +`__ +for details. Semihosting is enabled on qemu-system-hexagon machines by def= ault, +and it can be configured through ``-semihosting-config``. =20 Hexagon Features =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D diff --git a/configs/targets/hexagon-softmmu.mak b/configs/targets/hexagon-= softmmu.mak index a77c100f0c5..6cbdc64be56 100644 --- a/configs/targets/hexagon-softmmu.mak +++ b/configs/targets/hexagon-softmmu.mak @@ -6,3 +6,5 @@ TARGET_LONG_BITS=3D32 TARGET_NOT_USING_LEGACY_LDST_PHYS_API=3Dy TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=3Dy TARGET_NEED_FDT=3Dy +CONFIG_SEMIHOSTING=3Dy +CONFIG_ARM_COMPATIBLE_SEMIHOSTING=3Dy diff --git a/hw/hexagon/hexagon_dsp.c b/hw/hexagon/hexagon_dsp.c index aa493993229..315733cded3 100644 --- a/hw/hexagon/hexagon_dsp.c +++ b/hw/hexagon/hexagon_dsp.c @@ -27,6 +27,7 @@ #include "target/hexagon/internal.h" #include "system/physmem.h" #include "system/reset.h" +#include "semihosting/semihost.h" =20 #include "machine_cfg_v66g_1024.h.inc" =20 @@ -178,6 +179,7 @@ static void init_mc(MachineClass *mc) mc->no_serial =3D 1; mc->is_default =3D false; mc->max_cpus =3D 8; + qemu_semihosting_enable(); } =20 /* ----------------------------------------------------------------- */ diff --git a/target/hexagon/common-semi-target.c b/target/hexagon/common-se= mi-target.c new file mode 100644 index 00000000000..9a7720514bb --- /dev/null +++ b/target/hexagon/common-semi-target.c @@ -0,0 +1,51 @@ +/* + * Target-specific parts of semihosting/arm-compat-semi.c. + * + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "cpu_helper.h" +#include "semihosting/common-semi.h" + +uint64_t common_semi_arg(CPUState *cs, int argno) +{ + CPUHexagonState *env =3D cpu_env(cs); + return arch_get_thread_reg(env, HEX_REG_R00 + argno); +} + +void common_semi_set_ret(CPUState *cs, uint64_t ret) +{ + CPUHexagonState *env =3D cpu_env(cs); + arch_set_thread_reg(env, HEX_REG_R00, ret); +} + +void common_semi_set_err(CPUState *cs, int err) +{ + CPUHexagonState *env =3D cpu_env(cs); + arch_set_thread_reg(env, HEX_REG_R01, err); +} + +bool common_semi_sys_exit_is_extended(CPUState *cs) +{ + return false; +} + +bool is_64bit_semihosting(CPUArchState *env) +{ + return false; +} + +uint64_t common_semi_stack_bottom(CPUState *cs) +{ + CPUHexagonState *env =3D cpu_env(cs); + return arch_get_thread_reg(env, HEX_REG_SP); +} + +bool common_semi_has_synccache(CPUArchState *env) +{ + return false; +} diff --git a/target/hexagon/hexswi.c b/target/hexagon/hexswi.c index 43c373ea2ee..2aedd8368e2 100644 --- a/target/hexagon/hexswi.c +++ b/target/hexagon/hexswi.c @@ -24,9 +24,171 @@ #error "This file is only used in system emulation" #endif =20 +#include "semihosting/common-semi.h" +#include "semihosting/console.h" +#include "semihosting/syscalls.h" +#include "semihosting/guestfd.h" +#include "system/runstate.h" + +/* non-arm-compatible semihosting calls */ +#define HEXAGON_SPECIFIC_SWI_FLAGS \ + DEF_SWI_FLAG(OPEN, 0x01) \ + DEF_SWI_FLAG(ISTTY, 0x09) \ + DEF_SWI_FLAG(HEAPINFO, 0x16) \ + DEF_SWI_FLAG(EXCEPTION, 0x18) \ + DEF_SWI_FLAG(SEEK, 0x0A) \ + DEF_SWI_FLAG(READ_CYCLES, 0x40) \ + DEF_SWI_FLAG(PROF_ON, 0x41) \ + DEF_SWI_FLAG(PROF_OFF, 0x42) \ + DEF_SWI_FLAG(WRITECREG, 0x43) \ + DEF_SWI_FLAG(READ_TCYCLES, 0x44) \ + DEF_SWI_FLAG(LOG_EVENT, 0x45) \ + DEF_SWI_FLAG(REDRAW, 0x46) \ + DEF_SWI_FLAG(READ_ICOUNT, 0x47) \ + DEF_SWI_FLAG(PROF_STATSRESET, 0x48) \ + DEF_SWI_FLAG(DUMP_PMU_STATS, 0x4a) \ + DEF_SWI_FLAG(READ_PCYCLES, 0x52) \ + DEF_SWI_FLAG(COREDUMP, 0xCD) \ + DEF_SWI_FLAG(FTELL, 0x100) \ + DEF_SWI_FLAG(FSTAT, 0x101) \ + DEF_SWI_FLAG(STAT, 0x103) \ + DEF_SWI_FLAG(GETCWD, 0x104) \ + DEF_SWI_FLAG(ACCESS, 0x105) \ + DEF_SWI_FLAG(OPENDIR, 0x180) \ + DEF_SWI_FLAG(CLOSEDIR, 0x181) \ + DEF_SWI_FLAG(READDIR, 0x182) \ + DEF_SWI_FLAG(EXEC, 0x185) \ + DEF_SWI_FLAG(FTRUNC, 0x186) + +/* + * We use the arm-compatible semihosting routines for these ones, but we do + * need some hexagon-specific preprocessing. + */ +#define HEX_SYS_WRITE 0x05 +#define HEX_SYS_READ 0x06 +#define HEX_SYS_READC 0x07 + +#define DEF_SWI_FLAG(name, val) HEX_SYS_ ##name =3D val, +enum hex_swi_flag { + HEXAGON_SPECIFIC_SWI_FLAGS +}; +#undef DEF_SWI_FLAG + +#define DEF_SWI_FLAG(_, val) case val: +static inline bool is_hexagon_specific_swi_flag(enum hex_swi_flag what_swi) +{ + switch (what_swi) { + HEXAGON_SPECIFIC_SWI_FLAGS + return true; + } + return false; +} +#undef DEF_SWI_FLAG + +static void init_semihosting_guestfds(void) +{ + static gsize initialized; + + if (g_once_init_enter(&initialized)) { + if (qemu_semihosting_console_has_chardev()) { + alloc_guestfd(); + console_guestfd(0); + alloc_guestfd(); + console_guestfd(1); + alloc_guestfd(); + console_guestfd(2); + } else { + alloc_guestfd(); + associate_guestfd(0, 0); + alloc_guestfd(); + associate_guestfd(1, 1); + alloc_guestfd(); + associate_guestfd(2, 2); + } + g_once_init_leave(&initialized, 1); + } +} + +static void do_preload(CPUHexagonState *env, target_ulong swi_info, bool l= oad) +{ + uint32_t addr, count; + uintptr_t retaddr =3D 0; + + hexagon_read_memory(env, swi_info + 4, 4, &addr, retaddr); + hexagon_read_memory(env, swi_info + 8, 4, &count, retaddr); + hexagon_peek_memory_range(env, addr, count, retaddr); +} + +static void sim_handle_trap0(CPUHexagonState *env) +{ + target_ulong what_swi, swi_info; + CPUState *cs =3D env_cpu(env); + + g_assert(bql_locked()); + init_semihosting_guestfds(); + + what_swi =3D arch_get_thread_reg(env, HEX_REG_R00); + swi_info =3D arch_get_thread_reg(env, HEX_REG_R01); + + qemu_log_mask(CPU_LOG_INT, + "sim_handle_trap0: swi=3D0x%" PRIx32 + " info=3D0x%" PRIx32 " PC=3D0x%" PRIx32 + " thread=3D%" PRId32 "\n", + (uint32_t)what_swi, (uint32_t)swi_info, + (uint32_t)arch_get_thread_reg(env, HEX_REG_PC), + (uint32_t)env->threadId); + + if (!is_hexagon_specific_swi_flag(what_swi)) { + if (what_swi =3D=3D HEX_SYS_READ || what_swi =3D=3D HEX_SYS_READC = || + what_swi =3D=3D HEX_SYS_WRITE) { + /* + * Avoid page faults if the buffer is not in memory yet. + * NOTE: Counterintuitive, but a WRITE must be able to LOAD fr= om + * the input address. The contents of that buffer will be + * directed to the SWI interface. + */ + do_preload(env, swi_info, (what_swi =3D=3D HEX_SYS_WRITE)); + } + /* + * ARM-compat semihosting SWI numbers are all <=3D 0x31. + * If R0 holds a value outside that range (e.g. guest code + * executing trap0(#0) with an arbitrary R0), treat it as an + * unrecognized request rather than forwarding to + * do_common_semihosting() which would abort. + */ + if (what_swi > 0x31) { + qemu_log_mask(LOG_UNIMP, + "trap0(#0): unrecognized request in r0: " + "0x" TARGET_FMT_lx "\n", what_swi); + return; + } + do_common_semihosting(cs); + return; + } + + switch (what_swi) { + + case HEX_SYS_EXCEPTION: + { + uint32_t ret =3D arch_get_thread_reg(env, HEX_REG_R02); + arch_set_system_reg(env, HEX_SREG_MODECTL, 0); + gdb_exit(ret); + exit(ret); + } + break; + + /* TODO: implement other hexagon-specific semihosting calls */ + + default: + qemu_log_mask(LOG_GUEST_ERROR, + "unknown swi request: 0x%" PRIx32 "\n", + (uint32_t)what_swi); + common_semi_cb(cs, -1, ENOSYS); + } +} + static void set_addresses(CPUHexagonState *env, uint32_t pc_offset, uint32_t exception_index) - { HexagonCPU *cpu =3D env_archcpu(env); uint32_t evb =3D cpu->globalregs ? @@ -95,8 +257,7 @@ void hexagon_cpu_do_interrupt(CPUState *cs) switch (cs->exception_index) { case HEX_EVENT_TRAP0: if (env->cause_code =3D=3D 0) { - qemu_log_mask(LOG_UNIMP, - "trap0 is unhandled, no semihosting available\n"= ); + sim_handle_trap0(env); } =20 hexagon_ssr_set_cause(env, env->cause_code); diff --git a/hw/hexagon/Kconfig b/hw/hexagon/Kconfig index 52065ab3b22..3a8ff17812b 100644 --- a/hw/hexagon/Kconfig +++ b/hw/hexagon/Kconfig @@ -2,6 +2,7 @@ config HEX_DSP bool default y depends on HEXAGON + select ARM_COMPATIBLE_SEMIHOSTING =20 config HEX_VIRT bool diff --git a/qemu-options.hx b/qemu-options.hx index 34970fffc94..56f42b02c8a 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -5507,7 +5507,7 @@ ERST DEF("semihosting", 0, QEMU_OPTION_semihosting, "-semihosting semihosting mode\n", QEMU_ARCH_ARM | QEMU_ARCH_M68K | QEMU_ARCH_XTENSA | - QEMU_ARCH_MIPS | QEMU_ARCH_RISCV) + QEMU_ARCH_MIPS | QEMU_ARCH_RISCV | QEMU_ARCH_HEXAGON) SRST ``-semihosting`` Enable :ref:`Semihosting` mode (ARM, M68K, Xtensa, MIPS, RISC-V only). @@ -5523,11 +5523,11 @@ DEF("semihosting-config", HAS_ARG, QEMU_OPTION_semi= hosting_config, "-semihosting-config [enable=3Don|off][,target=3Dnative|gdb|auto][,cha= rdev=3Did][,userspace=3Don|off][,arg=3Dstr[,...]]\n" \ " semihosting configuration\n", QEMU_ARCH_ARM | QEMU_ARCH_M68K | QEMU_ARCH_XTENSA | -QEMU_ARCH_MIPS | QEMU_ARCH_RISCV) +QEMU_ARCH_MIPS | QEMU_ARCH_RISCV | QEMU_ARCH_HEXAGON) SRST ``-semihosting-config [enable=3Don|off][,target=3Dnative|gdb|auto][,charde= v=3Did][,userspace=3Don|off][,arg=3Dstr[,...]]`` - Enable and configure :ref:`Semihosting` (ARM, M68K, Xtensa, MIPS, RISC= -V - only). + Enable and configure :ref:`Semihosting` (ARM, M68K, Xtensa, MIPS, RISC= -V, + Hexagon only). =20 .. warning:: Note that this allows guest direct access to the host filesystem, so diff --git a/target/hexagon/meson.build b/target/hexagon/meson.build index 59cb09c1070..69f01bd2f70 100644 --- a/target/hexagon/meson.build +++ b/target/hexagon/meson.build @@ -262,6 +262,9 @@ hexagon_softmmu_ss.add(files( 'machine.c', )) =20 +hexagon_softmmu_ss.add(when: 'CONFIG_ARM_COMPATIBLE_SEMIHOSTING', + if_true: files('common-semi-target.c')) + # # Step 4.5 # We use flex/bison based idef-parser to generate TCG code for a lot --=20 2.37.2 From nobody Mon Jul 27 18:58:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 16 Jul 2026 11:07:39 -0700 (PDT) X-Received: by 2002:a17:90b:5610:b0:38d:e658:595a with SMTP id 98e67ed59e1d1-38e1ae5f629mr9878658a91.2.1784225258712; Thu, 16 Jul 2026 11:07:38 -0700 (PDT) From: Matheus Tavares Bernardino To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, pierrick.bouvier@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, philmd@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng, =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PATCH v2 09/14] semihosting: add ftruncate helper (to be used for hexagon) Date: Thu, 16 Jul 2026 11:06:53 -0700 Message-Id: <7399327e99bf4f7bccdcfcfdab954dd47c1a0053.1784225209.git.matheus.bernardino@oss.qualcomm.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: 75vzUnZAS2nz22aVpX1XI9LPOqlpRAc9 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDE4NSBTYWx0ZWRfX1FXKo7E29Mox Zud26xJknLuPt28PklI1++p8oihsAbbGUBHJdI2CDwfs3bSAcoBsTNKmlqnF0L/RnjRPQ40zGNY 9oW8NLrnbSeCA5y6eWq72UtBmtj7hzE= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDE4NSBTYWx0ZWRfX+peu2lVLcLYt TaiiflVGvrGNOoq+kJCBrpSS/67qvdUBySdGSoYGRu5B/n5NQyf8zlElk7uP8P0Dkd7rvkfo+8z U1uvcpoEYYgfuuJwJN8YQJSY0d2PQIdhUB31BhZQApdKhUGzhs2IN0/cM/7E7F3fNI0bdwytprn pO2f0GCjiIi+T1fFfhA9xfg9bREiPovA28X/WDrHU4azMWVS5q2TIwQGEaPacqifnNp5y8jlwRQ Js5uS8jv/G23xGrEr8TCiOSxHPyLXyA8gYiY6lKhmorMUDHlyYRj2hM5HouNBziGYZ/ZQhH6p87 pbcg6puuu07v3zpPl3oA2S9OZRlDfAhPCJzlLfyviJSOPrI2fgy4rqGEBqlOLTgfj5RxQGZkpw1 pssGNPyq03OWeJ1aBb9LVGjVKOlWqgk82TbkkHmCRSpB48jl1a0urFon/LXg9TtSaURB6y5RF4Y Z7WdBz115hIpRzoS2Ww== X-Authority-Analysis: v=2.4 cv=NcTWEWD4 c=1 sm=1 tr=0 ts=6a591dec cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=H7u-uynIU280lupyLLIA:9 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-GUID: 75vzUnZAS2nz22aVpX1XI9LPOqlpRAc9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_06,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 phishscore=0 bulkscore=0 spamscore=0 adultscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160185 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225366196158500 Content-Type: text/plain; charset="utf-8" The common semihosting syscall layer has no ftruncate helper, but the Hexagon semihosting ABI includes an FTRUNC operation. Add semihost_sys_ftruncate() so that Hexagon can delegate to it rather than calling ftruncate directly. Signed-off-by: Brian Cain Reviewed-by: Pierrick Bouvier Signed-off-by: Matheus Tavares Bernardino --- include/semihosting/syscalls.h | 2 ++ semihosting/syscalls.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/include/semihosting/syscalls.h b/include/semihosting/syscalls.h index 03aa45b7bb9..3919ab64c7c 100644 --- a/include/semihosting/syscalls.h +++ b/include/semihosting/syscalls.h @@ -75,4 +75,6 @@ void semihost_sys_gettimeofday(CPUState *cs, gdb_syscall_= complete_cb complete, void semihost_sys_poll_one(CPUState *cs, gdb_syscall_complete_cb complete, int fd, GIOCondition cond, int timeout); =20 +void semihost_sys_ftruncate(CPUState *cs, gdb_syscall_complete_cb complete, + int fd, off_t len); #endif /* SEMIHOSTING_SYSCALLS_H */ diff --git a/semihosting/syscalls.c b/semihosting/syscalls.c index 20f155f869a..0456db0befb 100644 --- a/semihosting/syscalls.c +++ b/semihosting/syscalls.c @@ -8,10 +8,12 @@ =20 #include "qemu/osdep.h" #include "qemu/log.h" +#include "qemu/error-report.h" #include "gdbstub/syscalls.h" #include "semihosting/guestfd.h" #include "semihosting/syscalls.h" #include "semihosting/console.h" +#include "semihosting/semihost.h" #ifdef CONFIG_USER_ONLY #include "qemu.h" #else @@ -541,6 +543,13 @@ static void host_poll_one(CPUState *cs, gdb_syscall_co= mplete_cb complete, } #endif =20 +static void host_ftruncate(CPUState *cs, gdb_syscall_complete_cb complete, + GuestFD *gf, off_t len) +{ + int err =3D ftruncate(gf->hostfd, len); + complete(cs, err, err < 0 ? errno : 0); +} + /* * Static file semihosting syscall implementations. */ @@ -982,3 +991,23 @@ void semihost_sys_poll_one(CPUState *cs, gdb_syscall_c= omplete_cb complete, } } #endif + +void semihost_sys_ftruncate(CPUState *cs, gdb_syscall_complete_cb complete, + int fd, off_t len) +{ + GuestFD *gf =3D get_guestfd(fd); + if (!gf) { + complete(cs, -1, EBADF); + return; + } + + switch (gf->type) { + case GuestFDHost: + host_ftruncate(cs, complete, gf, len); + break; + default: + error_report("ftruncate call not implemented " + "for this semihosting mode."); + g_assert_not_reached(); + } +} --=20 2.37.2 From nobody Mon Jul 27 18:58:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784225373; cv=none; d=zohomail.com; s=zohoarc; b=OlyESgC1b2p5KWCmY0myio3E2vCUkEfQfc9vT2CTBtX67S82KfKJdjcMVIs8LF3d1JhxCfdyOAdHYKbiO9i7z0Zsh0slYHcHwOnijE5eDzNcLf8uIwZGvEzCCrjAQdcNnnpXc54bdQEDgfJZS4Rgh3J9R7BvuCoPpQydSR2ring= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784225373; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=zpzkIk7+bellbxrc0HFZLhSl8PRNKhU6ilCHgSo3cX4=; b=FIyw4/N3XHCw/YpOhgqUjIVvdaJQRzgV2BgVjsPzn/7aTKGFQQIA+Q7snTOqAGTblhFtYpeVUjw8tOfgi6NUTi4KaBSSJdgSjmtNE2m92fOxm1I1jqRy6yo3MHX1WIlVztCJOiO03Rv0yOx+JM7YJntOQ7TVoXGEKI5DKEsI/A0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1784225373647143.93409013957626; Thu, 16 Jul 2026 11:09:33 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wkQUs-0000xh-B7; Thu, 16 Jul 2026 14:07:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUq-0000xP-RO for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:44 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUo-0001YJ-Ov for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:44 -0400 Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66GGSsoV3172066 for ; Thu, 16 Jul 2026 18:07:42 GMT Received: from mail-pg1-f198.google.com (mail-pg1-f198.google.com [209.85.215.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4fevkv2bgc-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 18:07:41 +0000 (GMT) Received: by mail-pg1-f198.google.com with SMTP id 41be03b00d2f7-c856470fe9fso3214637a12.2 for ; Thu, 16 Jul 2026 11:07:41 -0700 (PDT) Received: from hu-mathbern-lv.qualcomm.com (Global_NAT1.qualcomm.com. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225374340158500 Content-Type: text/plain; charset="utf-8" The Hexagon semihosting ABI extends the arm-compatible set with operations like OPEN, WRITECREG, WRITE0, ISTTY, STAT, FSTAT, FTELL, SEEK, FTRUNC, ACCESS, and GETCWD. Implement these trap0 handlers so that baremetal programs using the standard Hexagon simulator ABI can perform file I/O when running on qemu-system-hexagon. Signed-off-by: Brian Cain Signed-off-by: Matheus Tavares Bernardino --- include/semihosting/common-semi.h | 1 + semihosting/arm-compat-semi.c | 2 +- target/hexagon/hexswi.c | 298 +++++++++++++++++++++++++++++- 3 files changed, 299 insertions(+), 2 deletions(-) diff --git a/include/semihosting/common-semi.h b/include/semihosting/common= -semi.h index a11905ef4ef..1e7699d7bbd 100644 --- a/include/semihosting/common-semi.h +++ b/include/semihosting/common-semi.h @@ -34,6 +34,7 @@ #ifndef COMMON_SEMI_H #define COMMON_SEMI_H =20 +void common_semi_cb(CPUState *cs, uint64_t ret, int err); void do_common_semihosting(CPUState *cs); uint64_t common_semi_arg(CPUState *cs, int argno); void common_semi_set_ret(CPUState *cs, uint64_t ret); diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index c54753f696f..b930a028649 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -229,7 +229,7 @@ static inline uint32_t get_swi_errno(CPUState *cs) #endif } =20 -static void common_semi_cb(CPUState *cs, uint64_t ret, int err) +void common_semi_cb(CPUState *cs, uint64_t ret, int err) { if (err) { #ifdef CONFIG_USER_ONLY diff --git a/target/hexagon/hexswi.c b/target/hexagon/hexswi.c index 2aedd8368e2..6efc00fedf9 100644 --- a/target/hexagon/hexswi.c +++ b/target/hexagon/hexswi.c @@ -85,6 +85,41 @@ static inline bool is_hexagon_specific_swi_flag(enum hex= _swi_flag what_swi) } #undef DEF_SWI_FLAG =20 +static const unsigned int angel_to_host_filemode_table[] =3D { + O_RDONLY, + O_RDONLY | O_BINARY, + O_RDWR, + O_RDWR | O_BINARY, + O_WRONLY | O_CREAT | O_TRUNC, + O_WRONLY | O_CREAT | O_TRUNC | O_BINARY, + O_RDWR | O_CREAT | O_TRUNC, + O_RDWR | O_CREAT | O_TRUNC | O_BINARY, + O_WRONLY | O_APPEND | O_CREAT, + O_WRONLY | O_APPEND | O_CREAT | O_BINARY, + O_RDWR | O_APPEND | O_CREAT, + O_RDWR | O_APPEND | O_CREAT | O_BINARY, + O_RDWR | O_CREAT, + O_RDWR | O_CREAT | O_EXCL +}; + +/* + * This must match the caller's definition, it would be in the + * caller's angel.h or equivalent header. + */ +struct __SYS_STAT { + uint64_t dev; + uint64_t ino; + uint32_t mode; + uint32_t nlink; + uint64_t rdev; + uint32_t size; + uint32_t __pad1; + uint32_t atime; + uint32_t mtime; + uint32_t ctime; + uint32_t __pad2; +} sys_stat; + static void init_semihosting_guestfds(void) { static gsize initialized; @@ -119,10 +154,19 @@ static void do_preload(CPUHexagonState *env, target_u= long swi_info, bool load) hexagon_peek_memory_range(env, addr, count, retaddr); } =20 +static void common_semi_ftell_cb(CPUState *cs, uint64_t ret, int err) +{ + if (err) { + ret =3D -1; + } + common_semi_cb(cs, ret, err); +} + static void sim_handle_trap0(CPUHexagonState *env) { target_ulong what_swi, swi_info; CPUState *cs =3D env_cpu(env); + uintptr_t retaddr =3D 0; =20 g_assert(bql_locked()); init_semihosting_guestfds(); @@ -177,7 +221,259 @@ static void sim_handle_trap0(CPUHexagonState *env) } break; =20 - /* TODO: implement other hexagon-specific semihosting calls */ + case HEX_SYS_OPEN: + { + char filename[BUFSIZ]; + target_ulong physical_filename_addr; + unsigned int filemode; + int length; + int real_openmode; + int ret, err =3D 0; + int i =3D 0; + + hexagon_read_memory(env, swi_info, 4, &physical_filename_addr, ret= addr); + hexagon_read_memory(env, swi_info + 4, 4, &filemode, retaddr); + hexagon_read_memory(env, swi_info + 8, 4, &length, retaddr); + + if (length >=3D BUFSIZ) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: filename too large (%d)\n", + __func__, length); + common_semi_cb(cs, -1, ENAMETOOLONG); + break; + } + + do { + hexagon_read_memory(env, physical_filename_addr + i, 1, &filen= ame[i], + retaddr); + i++; + } while (filename[i - 1]); + + /* convert ARM ANGEL filemode into host filemode */ + if (filemode < ARRAY_SIZE(angel_to_host_filemode_table)) { + real_openmode =3D angel_to_host_filemode_table[filemode]; + } else { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid OPEN mode: %u\n", + __func__, filemode); + common_semi_cb(cs, -1, EINVAL); + break; + } + + if (strcmp(filename, ":tt") =3D=3D 0 && + qemu_semihosting_console_has_chardev()) { + ret =3D alloc_guestfd(); + console_guestfd(ret); + } else { + ret =3D open(filename, real_openmode | O_BINARY, 0644); + + if (ret =3D=3D -1) { + err =3D errno; + } else { + int guestfd =3D alloc_guestfd(); + associate_guestfd(guestfd, ret); + ret =3D guestfd; + } + } + common_semi_cb(cs, ret, err); + } + break; + + case HEX_SYS_WRITECREG: + { + char c =3D swi_info; + qemu_semihosting_console_write(&c, 1); + } + break; + + /* + * Hexagon's SYS_ISTTY is a bit different than arm's: we do not return= -1 + * on error, neither errno. So we override with our own implementation. + */ + case HEX_SYS_ISTTY: + { + int fd; + hexagon_read_memory(env, swi_info, 4, &fd, retaddr); + common_semi_cb(cs, isatty(fd), 0); + } + break; + + case HEX_SYS_SEEK: + { + int fd; + target_ulong off; + hexagon_read_memory(env, swi_info, 4, &fd, retaddr); + hexagon_read_memory(env, swi_info + 4, 4, &off, retaddr); + semihost_sys_lseek(env_cpu(env), common_semi_ftell_cb, fd, off, + GDB_SEEK_SET); + } + break; + + case HEX_SYS_STAT: + case HEX_SYS_FSTAT: + { + struct stat st_buf; + uint8_t *st_bufptr =3D (uint8_t *)&sys_stat; + int rc, err =3D 0; + char filename[BUFSIZ]; + target_ulong physical_filename_addr; + target_ulong statBufferAddr; + hexagon_read_memory(env, swi_info, 4, &physical_filename_addr, ret= addr); + + if (what_swi =3D=3D HEX_SYS_STAT) { + int i =3D 0; + do { + hexagon_read_memory(env, physical_filename_addr + i, 1, + &filename[i], retaddr); + i++; + } while ((i < BUFSIZ) && filename[i - 1]); + rc =3D stat(filename, &st_buf); + err =3D errno; + } else { + int fd =3D physical_filename_addr; + GuestFD *gf =3D get_guestfd(fd); + if (!gf || gf->type !=3D GuestFDHost) { + qemu_log_mask(LOG_UNIMP, + "fstat semihosting only implemented" + " for native mode\n"); + g_assert_not_reached(); + } + rc =3D fstat(gf->hostfd, &st_buf); + err =3D errno; + } + if (rc =3D=3D 0) { + sys_stat.dev =3D st_buf.st_dev; + sys_stat.ino =3D st_buf.st_ino; + sys_stat.mode =3D st_buf.st_mode; + sys_stat.nlink =3D (uint32_t) st_buf.st_nlink; + sys_stat.rdev =3D st_buf.st_rdev; + sys_stat.size =3D (uint32_t) st_buf.st_size; +#if defined(__linux__) + sys_stat.atime =3D (uint32_t) st_buf.st_atim.tv_sec; + sys_stat.mtime =3D (uint32_t) st_buf.st_mtim.tv_sec; + sys_stat.ctime =3D (uint32_t) st_buf.st_ctim.tv_sec; +#elif defined(_WIN32) + sys_stat.atime =3D st_buf.st_atime; + sys_stat.mtime =3D st_buf.st_mtime; + sys_stat.ctime =3D st_buf.st_ctime; +#endif + } + hexagon_read_memory(env, swi_info + 4, 4, &statBufferAddr, retaddr= ); + + for (int i =3D 0; i < sizeof(sys_stat); i++) { + hexagon_write_memory(env, statBufferAddr + i, 1, st_bufptr[i], + retaddr); + } + common_semi_cb(cs, rc, rc =3D=3D 0 ? 0 : err); + } + break; + + case HEX_SYS_FTRUNC: + { + int fd; + off_t size_limit; + hexagon_read_memory(env, swi_info, 4, &fd, retaddr); + hexagon_read_memory(env, swi_info + 4, 8, &size_limit, retaddr); + semihost_sys_ftruncate(cs, common_semi_cb, fd, size_limit); + } + break; + + case HEX_SYS_ACCESS: + { + char filename[BUFSIZ]; + uint32_t FileNameAddr; + uint32_t BufferMode; + int rc; + + int i =3D 0; + + hexagon_read_memory(env, swi_info, 4, &FileNameAddr, retaddr); + do { + hexagon_read_memory(env, FileNameAddr + i, 1, &filename[i], + retaddr); + i++; + } while ((i < BUFSIZ) && (filename[i - 1])); + filename[i] =3D 0; + + hexagon_read_memory(env, swi_info + 4, 4, &BufferMode, retaddr); + + rc =3D access(filename, BufferMode); + common_semi_cb(cs, rc, rc =3D=3D 0 ? 0 : errno); + } + break; + + case HEX_SYS_GETCWD: + { + char cwdPtr[PATH_MAX]; + uint32_t BufferAddr; + uint32_t BufferSize; + uint32_t rc =3D 0, err =3D 0; + + hexagon_read_memory(env, swi_info, 4, &BufferAddr, retaddr); + hexagon_read_memory(env, swi_info + 4, 4, &BufferSize, retaddr); + + if (!getcwd(cwdPtr, PATH_MAX)) { + err =3D errno; + } else { + size_t cwd_size =3D strlen(cwdPtr); + if (cwd_size > BufferSize) { + err =3D ERANGE; + } else { + for (int i =3D 0; i < cwd_size; i++) { + hexagon_write_memory(env, BufferAddr + i, 1, + (uint64_t)cwdPtr[i], retaddr); + } + rc =3D BufferAddr; + } + } + common_semi_cb(cs, rc, rc !=3D 0 ? 0 : err); + break; + } + + case HEX_SYS_EXEC: + { + qemu_log_mask(LOG_UNIMP, "SYS_EXEC is deprecated\n"); + common_semi_cb(cs, -1, ENOSYS); + } + break; + + case HEX_SYS_FTELL: + { + int fd; + hexagon_read_memory(env, swi_info, 4, &fd, retaddr); + semihost_sys_lseek(cs, common_semi_ftell_cb, fd, 0, GDB_SEEK_CUR); + } + break; + + case HEX_SYS_READ_CYCLES: + case HEX_SYS_READ_TCYCLES: + case HEX_SYS_READ_ICOUNT: + { + arch_set_thread_reg(env, HEX_REG_R00, 0); + arch_set_thread_reg(env, HEX_REG_R01, 0); + break; + } + + case HEX_SYS_READ_PCYCLES: + { + arch_set_thread_reg(env, HEX_REG_R00, + arch_get_system_reg(env, HEX_SREG_PCYCLELO)); + arch_set_thread_reg(env, HEX_REG_R01, + arch_get_system_reg(env, HEX_SREG_PCYCLEHI)); + break; + } + + case HEX_SYS_PROF_ON: + case HEX_SYS_PROF_OFF: + case HEX_SYS_PROF_STATSRESET: + case HEX_SYS_DUMP_PMU_STATS: + case HEX_SYS_HEAPINFO: + common_semi_cb(cs, -1, ENOSYS); + qemu_log_mask(LOG_UNIMP, + "SWI call %" PRIx32 + " is unimplemented in QEMU\n", + (uint32_t)what_swi); + break; =20 default: qemu_log_mask(LOG_GUEST_ERROR, --=20 2.37.2 From nobody Mon Jul 27 18:58:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784225379; cv=none; d=zohomail.com; s=zohoarc; b=SC7z/ECLPpagGleEdp7gkYLuCOfDcdDXmBDo0D+EocmAdUdV5fvjDzX1fMQ5QGH/V3yA/O441NzI8ZS3msVvSWDt/3Uz85606LU/mPSFCK2br4v5+knb+lEdKscjCx4PEEPx9O3qnCz/DfnjbNxQNxUJr7mED9jJEU3XEXlqeKI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784225379; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=4Mr7n6ERCtkKjQ2xuTE3MOYcIX25sDzieNBvejt9lcw=; b=EBR/JbfMbex/NuTxTKGa64Kk/sFY3epEM0k8vJwksajGGOgNHJ2be4wtSj+yWUQbwwshDkkHcpzgY+3n6tfhl08IGcXSFnscRDWgt04MuLwF2/ucSyBKQ866uMfPp0/Ffvg9qAGL/WqEW6nwjSVQ0dox07levg96m4ng49SLAIM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1784225379338435.8120410924221; Thu, 16 Jul 2026 11:09:39 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wkQUs-0000xn-IH; Thu, 16 Jul 2026 14:07:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUr-0000xY-Jj for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:45 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUp-0001Yd-R8 for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:45 -0400 Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66GGSsoW3172066 for ; Thu, 16 Jul 2026 18:07:43 GMT Received: from mail-pg1-f200.google.com (mail-pg1-f200.google.com [209.85.215.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4fevkv2bge-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 18:07:42 +0000 (GMT) Received: by mail-pg1-f200.google.com with SMTP id 41be03b00d2f7-c889d1eedcdso10674249a12.1 for ; Thu, 16 Jul 2026 11:07:42 -0700 (PDT) Received: from hu-mathbern-lv.qualcomm.com (Global_NAT1.qualcomm.com. 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Thu, 16 Jul 2026 11:07:41 -0700 (PDT) X-Received: by 2002:a05:6a20:20c3:b0:3c3:859b:c20c with SMTP id adf61e73a8af0-3c3859be277mr4965208637.15.1784225261171; Thu, 16 Jul 2026 11:07:41 -0700 (PDT) From: Matheus Tavares Bernardino To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, pierrick.bouvier@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, philmd@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng Subject: [PATCH v2 11/14] target/hexagon: add COREDUMP semihosting operation Date: Thu, 16 Jul 2026 11:06:55 -0700 Message-Id: <7fd1831acb4aef0f552d8ecf005576d2d5aa7c96.1784225209.git.matheus.bernardino@oss.qualcomm.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDE4NSBTYWx0ZWRfX+wvj4H+dgNP4 qfahaGsLUg/e1JiNeC8jV4R+Ll8gEN3fwEesEcmyCxEnfoPI6ONJvpXuU7IcX/sKkcHyOTxEa6B V10SvgVbI3Lh9pNBV8QLZIrLTbQtLt7+4lBcVVi8LFvbIE6Bckz/dRucSw9GE1DaVTnNCCnieER 7B6qNOr+dDTN4FpdAYb+YQZbQQlV/Uh3KVsdFC+DgNO7Pp/hsbEUceLvmiCex0HgUKpbLT2Fa5+ RUQ5Zt12yCCnXI+mj+QM2ES9saHD5te0g2bYmZLbk16ngf89tRr376c9CBgmQyuekSQ9Ylq8kyE taG+CbLj34oq5PwUp8RtTcJIRvxuZMD6gLvzZQmke+y0v50saVKVjGWokxNc4Cl7j3bma/hz2pv fwbRe7+yakgy8UH4Z7k4zuLAp8qMV3WcabJPS9nsobf5KIB/8Y4qf2dih4lXqzujTzKKFK5orpy 1qX/uXiufVY5JpI4fOQ== X-Authority-Analysis: v=2.4 cv=WrEb99fv c=1 sm=1 tr=0 ts=6a591dee cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=BE4lvaXKYeXNScGiURoA:9 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-GUID: xrfVawQ2ZPUPslcceIvfOre2Wu-seA78 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDE4NSBTYWx0ZWRfXzGdFrilyUJaL kFfe3b3ZS/GfNpyjq/TRy0Jg/7ZPiQ1miLEslDgaMdHNwThxZ6yj9Jy52SNVMjjMKckM1HsYmwX Niw8ZoZQNsUmbFBGgmf2fPZiO4IXsck= X-Proofpoint-ORIG-GUID: xrfVawQ2ZPUPslcceIvfOre2Wu-seA78 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_06,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 clxscore=1015 spamscore=0 priorityscore=1501 adultscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160185 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225380334158500 Content-Type: text/plain; charset="utf-8" Baremetal Hexagon programs invoke SYS_COREDUMP (0xCD) through semihosting to dump CPU state on a fatal exception. Implement the handler to decode the SSR cause field and print the full register file, matching hexagon-sim behavior. Signed-off-by: Matheus Tavares Bernardino Signed-off-by: Brian Cain Reviewed-by: Pierrick Bouvier --- target/hexagon/internal.h | 1 + target/hexagon/cpu.c | 2 +- target/hexagon/hexswi.c | 143 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 145 insertions(+), 1 deletion(-) diff --git a/target/hexagon/internal.h b/target/hexagon/internal.h index 00b37aea7af..05d1129916e 100644 --- a/target/hexagon/internal.h +++ b/target/hexagon/internal.h @@ -28,6 +28,7 @@ int hexagon_hvx_gdb_write_register(CPUState *env, uint8_t= *mem_buf, int n); void hexagon_debug_vreg(CPUHexagonState *env, int regnum); void hexagon_debug_qreg(CPUHexagonState *env, int regnum); void hexagon_debug(CPUHexagonState *env); +void hexagon_dump(CPUHexagonState *env, FILE *f, int flags); =20 extern const char * const hexagon_regnames[TOTAL_PER_THREAD_REGS]; #ifndef CONFIG_USER_ONLY diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 73a799da877..26baf28b607 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -232,7 +232,7 @@ void hexagon_debug_qreg(CPUHexagonState *env, int regnu= m) print_qreg(stdout, env, regnum, false); } =20 -static void hexagon_dump(CPUHexagonState *env, FILE *f, int flags) +void hexagon_dump(CPUHexagonState *env, FILE *f, int flags) { HexagonCPU *cpu =3D env_archcpu(env); =20 diff --git a/target/hexagon/hexswi.c b/target/hexagon/hexswi.c index 6efc00fedf9..564a11e557a 100644 --- a/target/hexagon/hexswi.c +++ b/target/hexagon/hexswi.c @@ -162,6 +162,145 @@ static void common_semi_ftell_cb(CPUState *cs, uint64= _t ret, int err) common_semi_cb(cs, ret, err); } =20 +static void coredump(CPUHexagonState *env) +{ + uint32_t ssr =3D arch_get_system_reg(env, HEX_SREG_SSR); + FILE *f =3D qemu_log_trylock(); + + if (!f) { + return; + } + + fprintf(f, "CRASH!\n"); + fprintf(f, "I think the exception was: "); + switch (GET_SSR_FIELD(SSR_CAUSE, ssr)) { + case 0x43: + fprintf(f, "0x43, NMI"); + break; + case 0x42: + fprintf(f, "0x42, Data abort"); + break; + case 0x44: + fprintf(f, "0x44, Multi TLB match"); + break; + case HEX_CAUSE_BIU_PRECISE: + fprintf(f, "0x%x, Bus Error (Precise BIU error)", + HEX_CAUSE_BIU_PRECISE); + break; + case HEX_CAUSE_DOUBLE_EXCEPT: + fprintf(f, "0x%x, Exception observed when EX =3D 1" + " (double exception)", + HEX_CAUSE_DOUBLE_EXCEPT); + break; + case HEX_CAUSE_FETCH_NO_XPAGE: + fprintf(f, "0x%x, Privilege violation: User/Guest mode execute" + " to page with no execute permissions", + HEX_CAUSE_FETCH_NO_XPAGE); + break; + case HEX_CAUSE_FETCH_NO_UPAGE: + fprintf(f, "0x%x, Privilege violation: " + "User mode execute to page with no user permissions", + HEX_CAUSE_FETCH_NO_UPAGE); + break; + case HEX_CAUSE_INVALID_PACKET: + fprintf(f, "0x%x, Invalid packet", + HEX_CAUSE_INVALID_PACKET); + break; + case HEX_CAUSE_PRIV_USER_NO_GINSN: + fprintf(f, "0x%x, Privilege violation:" + " guest mode insn in user mode", + HEX_CAUSE_PRIV_USER_NO_GINSN); + break; + case HEX_CAUSE_PRIV_USER_NO_SINSN: + fprintf(f, "0x%x, Privilege violation: " + "monitor mode insn in user/guest mode", + HEX_CAUSE_PRIV_USER_NO_SINSN); + break; + case HEX_CAUSE_REG_WRITE_CONFLICT: + fprintf(f, "0x%x, Multiple writes to same register", + HEX_CAUSE_REG_WRITE_CONFLICT); + break; + case HEX_CAUSE_PC_NOT_ALIGNED: + fprintf(f, "0x%x, PC not aligned", + HEX_CAUSE_PC_NOT_ALIGNED); + break; + case HEX_CAUSE_MISALIGNED_LOAD: + fprintf(f, "0x%x, Misaligned Load @ 0x%" PRIx32, + HEX_CAUSE_MISALIGNED_LOAD, + arch_get_system_reg(env, HEX_SREG_BADVA)); + break; + case HEX_CAUSE_MISALIGNED_STORE: + fprintf(f, "0x%x, Misaligned Store @ 0x%" PRIx32, + HEX_CAUSE_MISALIGNED_STORE, + arch_get_system_reg(env, HEX_SREG_BADVA)); + break; + case HEX_CAUSE_PRIV_NO_READ: + fprintf(f, "0x%x, Privilege violation: " + "user/guest read permission @ 0x%" PRIx32, + HEX_CAUSE_PRIV_NO_READ, + arch_get_system_reg(env, HEX_SREG_BADVA)); + break; + case HEX_CAUSE_PRIV_NO_WRITE: + fprintf(f, "0x%x, Privilege violation: " + "user/guest write permission @ 0x%" PRIx32, + HEX_CAUSE_PRIV_NO_WRITE, + arch_get_system_reg(env, HEX_SREG_BADVA)); + break; + case HEX_CAUSE_PRIV_NO_UREAD: + fprintf(f, "0x%x, Privilege violation:" + " user read permission @ 0x%" PRIx32, + HEX_CAUSE_PRIV_NO_UREAD, + arch_get_system_reg(env, HEX_SREG_BADVA)); + break; + case HEX_CAUSE_PRIV_NO_UWRITE: + fprintf(f, "0x%x, Privilege violation:" + " user write permission @ 0x%" PRIx32, + HEX_CAUSE_PRIV_NO_UWRITE, + arch_get_system_reg(env, HEX_SREG_BADVA)); + break; + case HEX_CAUSE_COPROC_LDST: + fprintf(f, "0x%x, Coprocessor VMEM address error @ 0x%" PRIx32, + HEX_CAUSE_COPROC_LDST, + arch_get_system_reg(env, HEX_SREG_BADVA)); + break; + case HEX_CAUSE_STACK_LIMIT: + fprintf(f, "0x%x, Stack limit check error", + HEX_CAUSE_STACK_LIMIT); + break; + case HEX_CAUSE_FPTRAP_CAUSE_BADFLOAT: + fprintf(f, "0x%x, Floating-Point: Execution of Floating-Point " + "instruction resulted in exception", + HEX_CAUSE_FPTRAP_CAUSE_BADFLOAT); + break; + case HEX_CAUSE_NO_COPROC_ENABLE: + fprintf(f, "0x%x, Illegal Execution of Coprocessor Instruction", + HEX_CAUSE_NO_COPROC_ENABLE); + break; + case HEX_CAUSE_NO_COPROC2_ENABLE: + fprintf(f, "0x%x, Illegal Execution of Secondary" + " Coprocessor Instruction", + HEX_CAUSE_NO_COPROC2_ENABLE); + break; + case HEX_CAUSE_UNSUPPORTED_HVX_64B: + fprintf(f, "0x%x, Unsupported Execution of" + " Coprocessor Instruction with 64bits Mode On", + HEX_CAUSE_UNSUPPORTED_HVX_64B); + break; + case HEX_CAUSE_VWCTRL_WINDOW_MISS: + fprintf(f, "0x%x, Thread accessing a region" + " outside VWCTRL window", + HEX_CAUSE_VWCTRL_WINDOW_MISS); + break; + default: + fprintf(f, "unknown cause 0x%" PRIx32, + GET_SSR_FIELD(SSR_CAUSE, ssr)); + break; + } + fprintf(f, "\nRegister Dump:\n"); + hexagon_dump(env, f, 0); + qemu_log_unlock(f); +} + static void sim_handle_trap0(CPUHexagonState *env) { target_ulong what_swi, swi_info; @@ -437,6 +576,10 @@ static void sim_handle_trap0(CPUHexagonState *env) } break; =20 + case HEX_SYS_COREDUMP: + coredump(env); + break; + case HEX_SYS_FTELL: { int fd; --=20 2.37.2 From nobody Mon Jul 27 18:58:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784225373; cv=none; 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Thu, 16 Jul 2026 11:07:42 -0700 (PDT) X-Received: by 2002:a05:6300:68c9:20b0:3c3:8298:da0c with SMTP id adf61e73a8af0-3c382995afcmr4012070637.41.1784225262079; Thu, 16 Jul 2026 11:07:42 -0700 (PDT) From: Matheus Tavares Bernardino To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, pierrick.bouvier@oss.qualcomm.com, marco.liebel@oss.qualcomm.com, philmd@oss.qualcomm.com, ale@rev.ng, anjo@rev.ng Subject: [PATCH v2 12/14] target/hexagon: Add an errno mapping Date: Thu, 16 Jul 2026 11:06:56 -0700 Message-Id: <24731ad7a276fd5873da7f0893d50655302ebeff.1784225209.git.matheus.bernardino@oss.qualcomm.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: leRZScnTRrs0j-xNByPz2OTIAK98M0-X X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDE4NSBTYWx0ZWRfXyjUD7w7kJhDU pw8BWgYNufTb4Z5IUUjQ4AeAtLpIODrbSxc4SNnkW4zrWajdYM2a8t5rkyqH9I64ViI2cJ14wIm yWZgt9Li0FOUnCFXw2yHSlfCro2P7HQGHicSUv4BN2/v4Eo8RU7nWtWPR4b75dwiFkl5eT0MeTz vmRqnRojwQiYPD5ULVsxOFGHa+3j6Y/QAe6Up+xL91mnVOOXwN1SzuUbwZOgWvnRu/uJFdBmjBz vTygL4rH+97qnssihbH1K56wj1Rx3aj1zk2rPMhPUlvlPoD7s6HRluVFAkZiSrD1eshDz/I1iQL RLk4IzCR07nG+ZtlhUsYUBK+2NM/7Jx3ENkoSKQkElriCL04W8wxDGfZBRGwIR3LV6FekMmM3MR NQ4mbKVHz3Ska6wh7Oz59Jj1B0dAMwmS+RYeAeCYg+iGNePxw9y30m6h97ZNcbz/5ZoVq3b8Rzn tch6oIvIeSkmt8OvynQ== X-Proofpoint-GUID: leRZScnTRrs0j-xNByPz2OTIAK98M0-X X-Authority-Analysis: v=2.4 cv=BPODalQG c=1 sm=1 tr=0 ts=6a591def cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=fCHUY30PoOJQLmHUSpQA:9 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDE4NSBTYWx0ZWRfX1568Jfa8D6US c7oexyCMEyioKb+y2ZHX1QqByWfWyRJAJZ4yRB/7MKZlNc3rNCf0bcRXAEXFLQFVAwelT2BB3o4 tsHXsaFRmnAAIDOz9PSrb45J5MZ298U= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_06,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 priorityscore=1501 phishscore=0 bulkscore=0 spamscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160185 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225374289158500 Content-Type: text/plain; charset="utf-8" From: Brian Cain The Hexagon semihosting ABI defines its own errno values which may differ from the host's. Translate host errno to the Hexagon-specific values before returning results to the guest so that baremetal programs see the expected error codes. Signed-off-by: Brian Cain Reviewed-by: Pierrick Bouvier Signed-off-by: Matheus Tavares Bernardino --- target/hexagon/hexswi.c | 75 ++++++++++++++++++++++++++++++++++------- 1 file changed, 63 insertions(+), 12 deletions(-) diff --git a/target/hexagon/hexswi.c b/target/hexagon/hexswi.c index 564a11e557a..d93789e39c7 100644 --- a/target/hexagon/hexswi.c +++ b/target/hexagon/hexswi.c @@ -154,12 +154,63 @@ static void do_preload(CPUHexagonState *env, target_u= long swi_info, bool load) hexagon_peek_memory_range(env, addr, count, retaddr); } =20 +/* Hexagon semihosting errno values */ +#define HEX_EINVAL 22 +#define HEX_ERRNOS \ + HEX_ERRNO(EPERM, 1) \ + HEX_ERRNO(ENOENT, 2) \ + HEX_ERRNO(EINTR, 4) \ + HEX_ERRNO(EIO, 5) \ + HEX_ERRNO(ENXIO, 6) \ + HEX_ERRNO(EBADF, 9) \ + HEX_ERRNO(EAGAIN, 11) \ + HEX_ERRNO(ENOMEM, 12) \ + HEX_ERRNO(EACCES, 13) \ + HEX_ERRNO(EFAULT, 14) \ + HEX_ERRNO(EBUSY, 16) \ + HEX_ERRNO(EEXIST, 17) \ + HEX_ERRNO(EXDEV, 18) \ + HEX_ERRNO(ENODEV, 19) \ + HEX_ERRNO(ENOTDIR, 20) \ + HEX_ERRNO(EISDIR, 21) \ + HEX_ERRNO(EINVAL, HEX_EINVAL) \ + HEX_ERRNO(ENFILE, 23) \ + HEX_ERRNO(EMFILE, 24) \ + HEX_ERRNO(ENOTTY, 25) \ + HEX_ERRNO(ETXTBSY, 26) \ + HEX_ERRNO(EFBIG, 27) \ + HEX_ERRNO(ENOSPC, 28) \ + HEX_ERRNO(ESPIPE, 29) \ + HEX_ERRNO(EROFS, 30) \ + HEX_ERRNO(EMLINK, 31) \ + HEX_ERRNO(EPIPE, 32) \ + HEX_ERRNO(ERANGE, 34) \ + HEX_ERRNO(ENAMETOOLONG, 36) \ + HEX_ERRNO(ENOSYS, 38) \ + HEX_ERRNO(ELOOP, 40) \ + HEX_ERRNO(EOVERFLOW, 75) + +/* Map host errno to hexagon semihosting errno */ +static void semi_cb(CPUState *cs, uint64_t ret, int err) +{ +#define HEX_ERRNO(NAME, CODE) case NAME: err =3D CODE; break; + switch (err) { + case 0: + break; + HEX_ERRNOS + default: + err =3D HEX_EINVAL; + break; + } + common_semi_cb(cs, ret, err); +} + static void common_semi_ftell_cb(CPUState *cs, uint64_t ret, int err) { if (err) { ret =3D -1; } - common_semi_cb(cs, ret, err); + semi_cb(cs, ret, err); } =20 static void coredump(CPUHexagonState *env) @@ -378,7 +429,7 @@ static void sim_handle_trap0(CPUHexagonState *env) qemu_log_mask(LOG_GUEST_ERROR, "%s: filename too large (%d)\n", __func__, length); - common_semi_cb(cs, -1, ENAMETOOLONG); + semi_cb(cs, -1, ENAMETOOLONG); break; } =20 @@ -395,7 +446,7 @@ static void sim_handle_trap0(CPUHexagonState *env) qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid OPEN mode: %u\n", __func__, filemode); - common_semi_cb(cs, -1, EINVAL); + semi_cb(cs, -1, EINVAL); break; } =20 @@ -414,7 +465,7 @@ static void sim_handle_trap0(CPUHexagonState *env) ret =3D guestfd; } } - common_semi_cb(cs, ret, err); + semi_cb(cs, ret, err); } break; =20 @@ -433,7 +484,7 @@ static void sim_handle_trap0(CPUHexagonState *env) { int fd; hexagon_read_memory(env, swi_info, 4, &fd, retaddr); - common_semi_cb(cs, isatty(fd), 0); + semi_cb(cs, isatty(fd), 0); } break; =20 @@ -503,7 +554,7 @@ static void sim_handle_trap0(CPUHexagonState *env) hexagon_write_memory(env, statBufferAddr + i, 1, st_bufptr[i], retaddr); } - common_semi_cb(cs, rc, rc =3D=3D 0 ? 0 : err); + semi_cb(cs, rc, rc =3D=3D 0 ? 0 : err); } break; =20 @@ -513,7 +564,7 @@ static void sim_handle_trap0(CPUHexagonState *env) off_t size_limit; hexagon_read_memory(env, swi_info, 4, &fd, retaddr); hexagon_read_memory(env, swi_info + 4, 8, &size_limit, retaddr); - semihost_sys_ftruncate(cs, common_semi_cb, fd, size_limit); + semihost_sys_ftruncate(cs, semi_cb, fd, size_limit); } break; =20 @@ -537,7 +588,7 @@ static void sim_handle_trap0(CPUHexagonState *env) hexagon_read_memory(env, swi_info + 4, 4, &BufferMode, retaddr); =20 rc =3D access(filename, BufferMode); - common_semi_cb(cs, rc, rc =3D=3D 0 ? 0 : errno); + semi_cb(cs, rc, rc =3D=3D 0 ? 0 : errno); } break; =20 @@ -565,14 +616,14 @@ static void sim_handle_trap0(CPUHexagonState *env) rc =3D BufferAddr; } } - common_semi_cb(cs, rc, rc !=3D 0 ? 0 : err); + semi_cb(cs, rc, rc !=3D 0 ? 0 : err); break; } =20 case HEX_SYS_EXEC: { qemu_log_mask(LOG_UNIMP, "SYS_EXEC is deprecated\n"); - common_semi_cb(cs, -1, ENOSYS); + semi_cb(cs, -1, ENOSYS); } break; =20 @@ -611,7 +662,7 @@ static void sim_handle_trap0(CPUHexagonState *env) case HEX_SYS_PROF_STATSRESET: case HEX_SYS_DUMP_PMU_STATS: case HEX_SYS_HEAPINFO: - common_semi_cb(cs, -1, ENOSYS); + semi_cb(cs, -1, ENOSYS); qemu_log_mask(LOG_UNIMP, "SWI call %" PRIx32 " is unimplemented in QEMU\n", @@ -622,7 +673,7 @@ static void sim_handle_trap0(CPUHexagonState *env) qemu_log_mask(LOG_GUEST_ERROR, "unknown swi request: 0x%" PRIx32 "\n", (uint32_t)what_swi); - common_semi_cb(cs, -1, ENOSYS); + semi_cb(cs, -1, ENOSYS); } } =20 --=20 2.37.2 From nobody Mon Jul 27 18:58:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784225295; cv=none; d=zohomail.com; s=zohoarc; b=PLwHlBwQQoDbd3syhulYkSl8x/MosQeZkCTygqVcXkbGaNKwN6xlh3DH7/bv1mx4w2+NLjRnYnI3ntuq5DzMDerB5yL/dXXxFKadprqJbLIYn56V3csqWgWV0Weqn9DtO/aqQFERBmHtgptsNdh/t6N5AtI5I68VNmNy4B4/Cq8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784225295; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=HRRIAmfrPYRcVqXdfY5buNPRm9g4xMiYI2HH29jTpLA=; b=A3dUWPinGaMvHA3euXiyJS8lYBOui2ipAzA0KfSh4s5ZqAHsG6E/d6zxSvgD+oQO5w92+zGMb4JsE22VSz0DX2wyTxYtgHAYvI4sOH0wN9/6uhN+UMgZ+JK6rjeL3CuVrY7penZfTCWXdkParQP9gkK09pG7Vblutddb8mzrpvo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1784225295071472.8350877218443; Thu, 16 Jul 2026 11:08:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wkQUv-0000ze-Ie; Thu, 16 Jul 2026 14:07:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUt-0000yq-MX for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:47 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUr-0001ZL-U7 for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:47 -0400 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66GGSlHT3395667 for ; Thu, 16 Jul 2026 18:07:45 GMT Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4feym19f47-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 18:07:44 +0000 (GMT) Received: by mail-pj1-f69.google.com with SMTP id 98e67ed59e1d1-38dbf293831so7907187a91.3 for ; Thu, 16 Jul 2026 11:07:44 -0700 (PDT) Received: from hu-mathbern-lv.qualcomm.com (Global_NAT1.qualcomm.com. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225295842158500 Content-Type: text/plain; charset="utf-8" From: Brian Cain The hexagon semihosting systests will wait for output on the semihosting console. Signed-off-by: Brian Cain Reviewed-by: Pierrick Bouvier Signed-off-by: Matheus Tavares Bernardino --- python/qemu/machine/machine.py | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/python/qemu/machine/machine.py b/python/qemu/machine/machine.py index bfb59d4c0bf..39375065558 100644 --- a/python/qemu/machine/machine.py +++ b/python/qemu/machine/machine.py @@ -186,6 +186,7 @@ def __init__(self, self._console_index =3D 0 self._console_set =3D False self._console_device_type: Optional[str] =3D None + self._console_semihosting =3D False self._console_socket: Optional[socket.socket] =3D None self._console_file: Optional[socket.SocketIO] =3D None self._remove_files: List[str] =3D [] @@ -321,7 +322,10 @@ def _console_args(self, interactive: bool =3D False) -= > List[str]: fd =3D self._cons_sock_pair[0].fileno() chardev =3D f"socket,id=3Dconsole,fd=3D{fd}" args.extend(['-chardev', chardev]) - if self._console_device_type is None: + if self._console_semihosting: + args.extend(['-semihosting-config', + 'enable=3Don,chardev=3Dconsole']) + elif self._console_device_type is None: args.extend(['-serial', 'chardev:console']) else: device =3D '%s,chardev=3Dconsole' % self._console_device_t= ype @@ -892,7 +896,8 @@ def set_machine(self, machine_type: str) -> None: =20 def set_console(self, device_type: Optional[str] =3D None, - console_index: int =3D 0) -> None: + console_index: int =3D 0, + semihosting: bool =3D False) -> None: """ Sets the device type for a console device =20 @@ -921,6 +926,7 @@ def set_console(self, self._console_set =3D True self._console_device_type =3D device_type self._console_index =3D console_index + self._console_semihosting =3D semihosting =20 @property def console_socket(self) -> socket.socket: --=20 2.37.2 From nobody Mon Jul 27 18:58:58 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784225302; cv=none; d=zohomail.com; s=zohoarc; b=QCp3zdE2mBEIvjwwz/JTJ3MYUUDrwQGD4bUDJs5T/INtF52fHksvIRvJLxCmSmLDGbd8tLuoPH5HBbNryyxUFh4XRKECpW2yEVuvF2qNGfdEt86oOFZIFMw6Ce7JPNzdVLP7WZNwa0WvIhLA8FdfOpk+95mEfl7zwnyFXLxdKwo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784225302; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=k6SVOa8fvZIguPrY0scd3d05A5ZS6Z2+l60kihTlbUo=; b=YlK2RUk4P31NESmxukKZ3WZYX/NbYjqsK/82olHRgpSrd58vCePrGH2Dols03q2Qb9F1dcL/XxX1UH1nQtu/T3SZGFT8oQ/TNuKx8f44/Q3cIcmTpT5h2ho6IuuF11tPO6p7LuSFIs60qaI1XAjk3Vl2iDE2ly3eTPZdPDUJHvQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1784225302165633.6456424941409; Thu, 16 Jul 2026 11:08:22 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1wkQUx-0000zg-0X; Thu, 16 Jul 2026 14:07:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUu-0000zJ-V3 for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:48 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1wkQUs-0001Zg-Qm for qemu-devel@nongnu.org; Thu, 16 Jul 2026 14:07:48 -0400 Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66GHZQqL385140 for ; Thu, 16 Jul 2026 18:07:45 GMT Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ff3u6g3w8-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 18:07:45 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-38dc101287aso7950371a91.0 for ; Thu, 16 Jul 2026 11:07:45 -0700 (PDT) Received: from hu-mathbern-lv.qualcomm.com (Global_NAT1.qualcomm.com. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=matheus.bernardino@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784225304170158500 Content-Type: text/plain; charset="utf-8" From: Brian Cain Signed-off-by: Brian Cain Reviewed-by: Pierrick Bouvier Signed-off-by: Matheus Tavares Bernardino --- tests/functional/hexagon/meson.build | 9 ++ tests/functional/hexagon/test_systests.py | 110 ++++++++++++++++++++++ tests/functional/meson.build | 1 + 3 files changed, 120 insertions(+) create mode 100644 tests/functional/hexagon/meson.build create mode 100755 tests/functional/hexagon/test_systests.py diff --git a/tests/functional/hexagon/meson.build b/tests/functional/hexago= n/meson.build new file mode 100644 index 00000000000..6cd684b0df7 --- /dev/null +++ b/tests/functional/hexagon/meson.build @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +test_hexagon_timeouts =3D { + 'systests': 180, +} + +tests_hexagon_system_thorough =3D [ + 'systests', +] diff --git a/tests/functional/hexagon/test_systests.py b/tests/functional/h= exagon/test_systests.py new file mode 100755 index 00000000000..8977aece43d --- /dev/null +++ b/tests/functional/hexagon/test_systests.py @@ -0,0 +1,110 @@ +#!/usr/bin/env python3 +# +# Copyright(c) Qualcomm Innovation Center, Inc. All Rights Reserved. +# SPDX-License-Identifier: GPL-2.0-or-later + +import os +import re +import time +import unittest + +from qemu_test import QemuSystemTest, Asset, wait_for_console_pattern + + +_TARBALL_BIN_PATH =3D ( + "systests_standalone_package", + "StandaloneSysTests_6.4.0.2_v68", + "bin", +) + +class SysTestsStandaloneTests(QemuSystemTest): + SYSTEST_TIMEOUT_SEC =3D 30 + + ASSET_TARBALL =3D Asset( + "https://github.com/qualcomm/qemu-hexagon-testing/releases/downloa= d/v0.2.11/systests_standalone.tar.gz", + "b5777aa65245de7710a7a08d717953c1362be7c8b60d9014c9fee8b17610ad1c", + ) + + def setUp(self): + super().setUp() + self.archive_extract(self.ASSET_TARBALL) + + def binary(self, name): + """Return the full path to binary *name* inside bin dir.""" + path =3D self.scratch_file(*_TARBALL_BIN_PATH, name) + self.assertTrue(os.path.exists(path)) + return path + + def run_exit_zero(self, binary_name, *extra_args, machine=3D"V66G_1024= "): + """Launch *binary_name* and assert it exits with code 0. + + :param binary_name: name of the binary inside bin dir. + :param extra_args: optional pairs of (flag, value) strings passed + to set_vm_arg(), e.g. ('-append', 'myarg'). + :param machine: QEMU machine type (default "V66G_1024"). + """ + self.set_machine(machine) + self.set_vm_arg("-display", "none") + self.set_vm_arg("-kernel", self.binary(binary_name)) + for flag, value in zip(extra_args[::2], extra_args[1::2]): + self.set_vm_arg(flag, value) + self.vm.launch() + self.vm.wait(timeout=3D60.0) + self.assertEqual(self.vm.exitcode(), 0, + f"Test {binary_name} exited with " + f"code {self.vm.exitcode()}, expected 0") + + def run_console_pattern(self, binary_name, pattern, *extra_args, + machine=3D"V66G_1024"): + """Launch *binary_name* and wait for *pattern* on the semihosting = console. + + :param binary_name: name of the binary inside bin dir. + :param pattern: string pattern to wait for via wait_for_console_pa= ttern. + :param extra_args: optional pairs of (flag, value) strings passed + to set_vm_arg(), e.g. ('-append', 'myarg'). + :param machine: QEMU machine type (default "V66G_1024"). + """ + self.set_machine(machine) + self.set_vm_arg("-display", "none") + self.set_vm_arg("-kernel", self.binary(binary_name)) + for flag, value in zip(extra_args[::2], extra_args[1::2]): + self.set_vm_arg(flag, value) + self.vm.set_console(semihosting=3DTrue) + self.vm.launch() + try: + wait_for_console_pattern(self, pattern) + finally: + self.vm.kill() + + def test_fopen(self): + """fopen reads a file passed via --append and verifies its content= s.""" + import tempfile + # The fopen binary has a short cmdline buffer; use a short path. + dummy =3D os.path.join(tempfile.gettempdir(), "qemu_fopen_test.so") + with open(dummy, "w") as f: + f.write("valid\n") + self.run_exit_zero("fopen", "-append", dummy) + + def test_ftrunc(self): + """ftrunc truncates _testfile_ftrunc from 6 bytes to 1 byte.""" + ftrunc_path =3D self.scratch_file("_testfile_ftrunc") + with open(ftrunc_path, "w") as f: + f.write("valid\n") + # Sleep 1 s so mtime change is observable + time.sleep(1) + self.run_exit_zero("ftrunc", "-append", ftrunc_path) + self.assertEqual(os.path.getsize(ftrunc_path), 1, + "_testfile_ftrunc should be 1 byte after ftrunc") + + def test_access(self): + """access checks R_OK|W_OK on _testfile_access.""" + testfile =3D self.scratch_file("_testfile_access") + with open(testfile, "w") as f: + f.write("valid\n") + self.run_exit_zero("access", "-append", testfile) + + def test_semihost(self): + self.run_console_pattern("semihost", "PASS", "-append", "arg1", "a= rg2") + +if __name__ =3D=3D "__main__": + QemuSystemTest.main() diff --git a/tests/functional/meson.build b/tests/functional/meson.build index c158197c4b7..c7362dd00ef 100644 --- a/tests/functional/meson.build +++ b/tests/functional/meson.build @@ -14,6 +14,7 @@ subdir('aarch64') subdir('alpha') subdir('arm') subdir('avr') +subdir('hexagon') subdir('hppa') subdir('i386') subdir('loongarch64') --=20 2.37.2