From nobody Thu Nov 28 02:13:45 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB88C1369AA for ; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793873; cv=none; b=TUcTl17yA6cJI2koP5YJYiAOx2YQ1/EHZtiDUOZAV9fr2C1149RMrxDdPXmZOA4Rv1/D7jT/m2BV3qUlktMYlvgy3FfblePGjYDXrQdCzFc89XLhmaXzT6fIu5iq4lm35rEjHAbj8Nag8I5XQc9f3iCBJQ+F8WMB7PseWsQNEXM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793873; c=relaxed/simple; bh=lqriKFWHNUPm8I1cibF4dWf4oPfeb/nkUrOhUfcqYLE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EzvP2U4XGTS+ENUsL2JS5B2/RAZkDCzTtmUWLldrVypVBx+QblWtb51FI5seMOTe4ggWtSuDoKcjs8BhxnWBHLwEwcEPhafCcpqnYOpJtF7zW4u8GMCkw2Kfttl5GI7a95Y4AHbYo24grZ/enDRwmyysSLlhEYo32Mqa8HVQZfA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RBZ0qjN9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RBZ0qjN9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5F806C4AF0E; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723793873; bh=lqriKFWHNUPm8I1cibF4dWf4oPfeb/nkUrOhUfcqYLE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RBZ0qjN9CoeWocjkRW9HPI8syc7ocaiPfMC478pEraaREh1s9uG8vSPbjjjDd1q85 pyXzoM5H4UsHgWCbjLDuV212uyXJdn0dTEdDQVX1TZeGN4wJ6H93vhLbks46iTGQYK diUcfgLb6aFCjOcz4+D0aBXwhf18uRFv9MEias2NnNBUaiPUThlSkYY4rnJT4nz3Tr oOkSIgcUvyF1CvLKQ7q7c+FtyyntKUkrqpTHvZ6bqnJ8JGEfzHgVqEoszSBBrffC0t WoQGzC27vXl6brX8yaQuAj4JARHu4Fk9typ4fDWu3gton3mg4xuclaRC75V5a9aG3j nFZIgC4FRtnPw== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1serWx-000000055eL-1nme; Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , "Michael S. Tsirkin" , Ani Sinha , Igor Mammedov , linux-kernel@vger.kernel.org, qemu-devel@nongnu.org Subject: [PATCH v8 01/13] acpi/generic_event_device: add an APEI error device Date: Fri, 16 Aug 2024 09:37:33 +0200 Message-ID: <6ecc07c31f8644cdbc00e35199a1e4ca1a1cebdf.1723793768.git.mchehab+huawei@kernel.org> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" Adds a generic error device to handle generic hardware error events as specified at ACPI 6.5 specification at 18.3.2.7.2: https://uefi.org/specs/ACPI/6.5/18_Platform_Error_Interfaces.html#event-not= ification-for-generic-error-sources using HID PNP0C33. The PNP0C33 device is used to report hardware errors to the guest via ACPI APEI Generic Hardware Error Source (GHES). Co-authored-by: Mauro Carvalho Chehab Co-authored-by: Jonathan Cameron Signed-off-by: Jonathan Cameron Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Igor Mammedov --- hw/acpi/aml-build.c | 10 ++++++++++ hw/acpi/generic_event_device.c | 8 ++++++++ include/hw/acpi/acpi_dev_interface.h | 1 + include/hw/acpi/aml-build.h | 2 ++ include/hw/acpi/generic_event_device.h | 1 + 5 files changed, 22 insertions(+) diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 6d4517cfbe3d..cb167523859f 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -2520,3 +2520,13 @@ Aml *aml_i2c_serial_bus_device(uint16_t address, con= st char *resource_source) =20 return var; } + +/* ACPI 5.0: 18.3.2.6.2 Event Notification For Generic Error Sources */ +Aml *aml_error_device(void) +{ + Aml *dev =3D aml_device(ACPI_APEI_ERROR_DEVICE); + aml_append(dev, aml_name_decl("_HID", aml_string("PNP0C33"))); + aml_append(dev, aml_name_decl("_UID", aml_int(0))); + + return dev; +} diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index 15b4c3ebbf24..b4c83a089a02 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -26,6 +26,7 @@ static const uint32_t ged_supported_events[] =3D { ACPI_GED_PWR_DOWN_EVT, ACPI_GED_NVDIMM_HOTPLUG_EVT, ACPI_GED_CPU_HOTPLUG_EVT, + ACPI_GED_ERROR_EVT, }; =20 /* @@ -116,6 +117,11 @@ void build_ged_aml(Aml *table, const char *name, Hotpl= ugHandler *hotplug_dev, aml_notify(aml_name(ACPI_POWER_BUTTON_DEVICE), aml_int(0x80))); break; + case ACPI_GED_ERROR_EVT: + aml_append(if_ctx, + aml_notify(aml_name(ACPI_APEI_ERROR_DEVICE), + aml_int(0x80))); + break; case ACPI_GED_NVDIMM_HOTPLUG_EVT: aml_append(if_ctx, aml_notify(aml_name("\\_SB.NVDR"), @@ -295,6 +301,8 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, Acp= iEventStatusBits ev) sel =3D ACPI_GED_MEM_HOTPLUG_EVT; } else if (ev & ACPI_POWER_DOWN_STATUS) { sel =3D ACPI_GED_PWR_DOWN_EVT; + } else if (ev & ACPI_GENERIC_ERROR) { + sel =3D ACPI_GED_ERROR_EVT; } else if (ev & ACPI_NVDIMM_HOTPLUG_STATUS) { sel =3D ACPI_GED_NVDIMM_HOTPLUG_EVT; } else if (ev & ACPI_CPU_HOTPLUG_STATUS) { diff --git a/include/hw/acpi/acpi_dev_interface.h b/include/hw/acpi/acpi_de= v_interface.h index 68d9d15f50aa..8294f8f0ccca 100644 --- a/include/hw/acpi/acpi_dev_interface.h +++ b/include/hw/acpi/acpi_dev_interface.h @@ -13,6 +13,7 @@ typedef enum { ACPI_NVDIMM_HOTPLUG_STATUS =3D 16, ACPI_VMGENID_CHANGE_STATUS =3D 32, ACPI_POWER_DOWN_STATUS =3D 64, + ACPI_GENERIC_ERROR =3D 128, } AcpiEventStatusBits; =20 #define TYPE_ACPI_DEVICE_IF "acpi-device-interface" diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index a3784155cb33..44d1a6af0c69 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -252,6 +252,7 @@ struct CrsRangeSet { /* Consumer/Producer */ #define AML_SERIAL_BUS_FLAG_CONSUME_ONLY (1 << 1) =20 +#define ACPI_APEI_ERROR_DEVICE "GEDD" /** * init_aml_allocator: * @@ -382,6 +383,7 @@ Aml *aml_dma(AmlDmaType typ, AmlDmaBusMaster bm, AmlTra= nsferSize sz, uint8_t channel); Aml *aml_sleep(uint64_t msec); Aml *aml_i2c_serial_bus_device(uint16_t address, const char *resource_sour= ce); +Aml *aml_error_device(void); =20 /* Block AML object primitives */ Aml *aml_scope(const char *name_format, ...) G_GNUC_PRINTF(1, 2); diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/gener= ic_event_device.h index 40af3550b56d..9ace8fe70328 100644 --- a/include/hw/acpi/generic_event_device.h +++ b/include/hw/acpi/generic_event_device.h @@ -98,6 +98,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(AcpiGedState, ACPI_GED) #define ACPI_GED_PWR_DOWN_EVT 0x2 #define ACPI_GED_NVDIMM_HOTPLUG_EVT 0x4 #define ACPI_GED_CPU_HOTPLUG_EVT 0x8 +#define ACPI_GED_ERROR_EVT 0x10 =20 typedef struct GEDState { MemoryRegion evt; --=20 2.46.0 From nobody Thu Nov 28 02:13:45 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB833136657 for ; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793873; cv=none; b=e2TSl6D1k39TzZNRLZu/sk4aEdzJq4OodvyffJhlmw77aN/8TcdChfE8Cb7FpMJdxb3rfwhhk8A1ZRvTWhseTbRuvFKsRR92ifCi88F44v38r/n/x4KgtNWfVZEf6aFGIyMRFarsnA+7326Z71VPgxenqJ9CJHlD5DyEVDREGRo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793873; c=relaxed/simple; bh=45MNHs7xwOCcf8jbuaI6e0aY9LF+xP8P0gDiRaHXf2s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=In41mRMnjqK7F5fevhE4xFhhu8P5xw9nbfQ1IsQQCpuQ9OzMBoNJZj7OigiAg7wMoaVGQHdMUNq/u6e8h03F+Z0jgLJ81bZ8JHBQzcfzgWezEbm+HLi0zq2ZrTXlB8qoI39z5ug5/s+GFLwoRIJSWehag+M1LV2fOKOrLfz3E3A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nBqdpuha; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nBqdpuha" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 643FBC4AF13; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723793873; bh=45MNHs7xwOCcf8jbuaI6e0aY9LF+xP8P0gDiRaHXf2s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nBqdpuhaoKQjBI4mWpAQ0ZjdC0W3A3G+RYLlu8r2QB9A5fseVWyEJmXxPBJ+doypK kUt+Fe9nO9BG74m6nTM948WkpA+YSP8XYenKbTfHIKevAwIXIaDw1u+NE3Ra/6jU5B X3+OmZu6TMOOzr5Iu+S4YDl3zZibXsVtXErafHWQCXZqJy3cOhHvRMPXL3lymZvnb/ 5nWmSu7WsnK5YwZZhntJ42yKp6QbxhyvWNsRkoUAMBlQm4h1LzkGIT8gfPSY1O2sly Pt2h2/oFJ/D9Dml8EQSeAJqugVCNC0ShpDRbHaScgv30GjesaTd6IqrTuFx/lsfBEJ OHtc2O+ig52HA== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1serWx-000000055eO-1uhs; Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , "Michael S. Tsirkin" , Ani Sinha , Dongjiu Geng , Igor Mammedov , Peter Maydell , Shannon Zhao , linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v8 02/13] arm/virt: Wire up a GED error device for ACPI / GHES Date: Fri, 16 Aug 2024 09:37:34 +0200 Message-ID: <9747cd7405841a7f8ce3a535132a6c658aa09cdc.1723793768.git.mchehab+huawei@kernel.org> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" Adds support to ARM virtualization to allow handling generic error ACPI Event via GED & error source device. It is aligned with Linux Kernel patch: https://lore.kernel.org/lkml/1272350481-27951-8-git-send-email-ying.huang@i= ntel.com/ Co-authored-by: Mauro Carvalho Chehab Co-authored-by: Jonathan Cameron Signed-off-by: Jonathan Cameron Signed-off-by: Mauro Carvalho Chehab Acked-by: Igor Mammedov --- hw/acpi/ghes.c | 3 +++ hw/arm/virt-acpi-build.c | 1 + hw/arm/virt.c | 12 +++++++++++- include/hw/acpi/ghes.h | 3 +++ include/hw/arm/virt.h | 1 + 5 files changed, 19 insertions(+), 1 deletion(-) diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index e9511d9b8f71..13b105c5d02d 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -444,6 +444,9 @@ int acpi_ghes_record_errors(uint8_t source_id, uint64_t= physical_address) return ret; } =20 +NotifierList acpi_generic_error_notifiers =3D + NOTIFIER_LIST_INITIALIZER(error_device_notifiers); + bool acpi_ghes_present(void) { AcpiGedState *acpi_ged_state; diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index f76fb117adff..1769467d23b2 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -858,6 +858,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) } =20 acpi_dsdt_add_power_button(scope); + aml_append(scope, aml_error_device()); #ifdef CONFIG_TPM acpi_dsdt_add_tpm(scope, vms); #endif diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 687fe0bb8bc9..22448e5c5b73 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -677,7 +677,7 @@ static inline DeviceState *create_acpi_ged(VirtMachineS= tate *vms) DeviceState *dev; MachineState *ms =3D MACHINE(vms); int irq =3D vms->irqmap[VIRT_ACPI_GED]; - uint32_t event =3D ACPI_GED_PWR_DOWN_EVT; + uint32_t event =3D ACPI_GED_PWR_DOWN_EVT | ACPI_GED_ERROR_EVT; =20 if (ms->ram_slots) { event |=3D ACPI_GED_MEM_HOTPLUG_EVT; @@ -1009,6 +1009,13 @@ static void virt_powerdown_req(Notifier *n, void *op= aque) } } =20 +static void virt_generic_error_req(Notifier *n, void *opaque) +{ + VirtMachineState *s =3D container_of(n, VirtMachineState, generic_erro= r_notifier); + + acpi_send_event(s->acpi_dev, ACPI_GENERIC_ERROR); +} + static void create_gpio_keys(char *fdt, DeviceState *pl061_dev, uint32_t phandle) { @@ -2385,6 +2392,9 @@ static void machvirt_init(MachineState *machine) =20 if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)= ) { vms->acpi_dev =3D create_acpi_ged(vms); + vms->generic_error_notifier.notify =3D virt_generic_error_req; + notifier_list_add(&acpi_generic_error_notifiers, + &vms->generic_error_notifier); } else { create_gpio_devices(vms, VIRT_GPIO, sysmem); } diff --git a/include/hw/acpi/ghes.h b/include/hw/acpi/ghes.h index 674f6958e905..fb80897e7eac 100644 --- a/include/hw/acpi/ghes.h +++ b/include/hw/acpi/ghes.h @@ -23,6 +23,9 @@ #define ACPI_GHES_H =20 #include "hw/acpi/bios-linker-loader.h" +#include "qemu/notify.h" + +extern NotifierList acpi_generic_error_notifiers; =20 /* * Values for Hardware Error Notification Type field diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index a4d937ed45ac..ad9f6e94dcc5 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -175,6 +175,7 @@ struct VirtMachineState { DeviceState *gic; DeviceState *acpi_dev; Notifier powerdown_notifier; + Notifier generic_error_notifier; PCIBus *bus; char *oem_id; char *oem_table_id; --=20 2.46.0 From nobody Thu Nov 28 02:13:45 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB8BD1369BB for ; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZeNcP1YH" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 61703C4AF0F; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723793873; bh=JoJ9jxUPN+bhI+z9iZ5mSppDZu1zv6TnTL8L5TshfvI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZeNcP1YHkuW16eLBF4Ww3gUQFaLfbFchA0M0JBNxeKjTOCeqKjeu06X3OOtqBFyiu oXa94sMUVuAye2GvmciTOTJTDTkCpDAy9McSLzSkl8sFquEhWwTUnQy/gi7iX3PD+Q sm5CfFlmUBcG1+WGxf9arqr5KPX+PSKkhew6eb9f+jzAcZ/ZNtynTwPRMYpdKsvhlv AgT0hd1L3HqZHAHPX7i/91zCFLfgyIVnhRYpFuH5Z0PRbnORVxXpW4n+GmYcndr9Nd DYqIVUQ1p/VN/dJpst6BYYK5dfRW5sFaQFMUo4GUn7g1TSxUYTHmI0DKzHg7Ffu2i3 KENl/UBcWdsmg== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1serWx-000000055eR-21uy; Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , "Michael S. Tsirkin" , Ani Sinha , Dongjiu Geng , Igor Mammedov , linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, Mauro Carvalho Chehab Subject: [PATCH v8 03/13] acpi/ghes: Add support for GED error device Date: Fri, 16 Aug 2024 09:37:35 +0200 Message-ID: X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" From: Jonathan Cameron As a GED error device is now defined, add another type of notification. Add error notification to GHES v2 using a GED error device GED triggered via interrupt. [mchehab: do some cleanups at ACPI_HEST_SRC_ID_* checks and rename HEST event to better identify GED interrupt OSPM] Signed-off-by: Jonathan Cameron Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Igor Mammedov --- hw/acpi/ghes.c | 11 +++++++++-- include/hw/acpi/ghes.h | 3 ++- 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index 13b105c5d02d..df59fd35568c 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -34,8 +34,8 @@ /* The max size in bytes for one error block */ #define ACPI_GHES_MAX_RAW_DATA_LENGTH (1 * KiB) =20 -/* Now only support ARMv8 SEA notification type error source */ -#define ACPI_GHES_ERROR_SOURCE_COUNT 1 +/* Support ARMv8 SEA notification type error source and GPIO interrupt. */ +#define ACPI_GHES_ERROR_SOURCE_COUNT 2 =20 /* Generic Hardware Error Source version 2 */ #define ACPI_GHES_SOURCE_GENERIC_ERROR_V2 10 @@ -290,6 +290,9 @@ void build_ghes_error_table(GArray *hardware_errors, BI= OSLinker *linker) static void build_ghes_v2(GArray *table_data, int source_id, BIOSLinker *l= inker) { uint64_t address_offset; + + assert(source_id < ACPI_HEST_SRC_ID_RESERVED); + /* * Type: * Generic Hardware Error Source version 2(GHESv2 - Type 10) @@ -327,6 +330,9 @@ static void build_ghes_v2(GArray *table_data, int sourc= e_id, BIOSLinker *linker) */ build_ghes_hw_error_notification(table_data, ACPI_GHES_NOTIFY_SEA); break; + case ACPI_HEST_SRC_ID_GED: + build_ghes_hw_error_notification(table_data, ACPI_GHES_NOTIFY_GPIO= ); + break; default: error_report("Not support this error source"); abort(); @@ -370,6 +376,7 @@ void acpi_build_hest(GArray *table_data, BIOSLinker *li= nker, /* Error Source Count */ build_append_int_noprefix(table_data, ACPI_GHES_ERROR_SOURCE_COUNT, 4); build_ghes_v2(table_data, ACPI_HEST_SRC_ID_SEA, linker); + build_ghes_v2(table_data, ACPI_HEST_SRC_ID_GED, linker); =20 acpi_table_end(linker, &table); } diff --git a/include/hw/acpi/ghes.h b/include/hw/acpi/ghes.h index fb80897e7eac..419a97d5cbd9 100644 --- a/include/hw/acpi/ghes.h +++ b/include/hw/acpi/ghes.h @@ -59,9 +59,10 @@ enum AcpiGhesNotifyType { ACPI_GHES_NOTIFY_RESERVED =3D 12 }; =20 +/* Those are used as table indexes when building GHES tables */ enum { ACPI_HEST_SRC_ID_SEA =3D 0, - /* future ids go here */ + ACPI_HEST_SRC_ID_GED, ACPI_HEST_SRC_ID_RESERVED, }; =20 --=20 2.46.0 From nobody Thu Nov 28 02:13:45 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C6FE1386C9 for ; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793874; cv=none; b=pMvpPpXX+Zaromiip/SE/4VXP9SMlpaP5yNGp1t+Q7XpOAC2kXlqsETwJY9EvByEwk3rqW8tYFeMfCtEhGVSGhv88ovWMEOA2CvPVRrnU0OScuDf7qYWCRwRfoMu6DtN1GpANaD5qent0boKu47N1NT4auJfrQCP2jGulEteOnY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793874; c=relaxed/simple; bh=3cYjdqh72I0rkHpnXfZu4oYXXcaaYATYUr29BIY2RJU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=imt6jVMIXNVKVx7OHoJKnqsOkSpUXtOxbYbpZMGR8DgYLMOCbce+ce3zFmaHwEz+qdBRrzE2MFWBpD4sYSYSDme1VZPJkXof24VHig6neLf3BlmgWRYgMa+faiSZQA7OiZztuFuRxgpTyBtICuBzZTcIPdTk1pS8vbfA3dzDJUI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qW4y6Zc/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qW4y6Zc/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5EF6DC32782; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723793873; bh=3cYjdqh72I0rkHpnXfZu4oYXXcaaYATYUr29BIY2RJU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qW4y6Zc/S9sfNYQd3rLyXi7ZQDGCe8drrmNz4PYOY1/ZR+dU6et9hpBuO6ilPZ+k4 zaJC6I0yFr+14bpCFJYGvcn9T2+8M8YXW5nqDfrrGofDHUPg3tTTY2wozd3VaU7yJU ujwBkhHcIDG7WDbZHoOLEBDEcLq3myA4Pscyv5J2uobvK7+CtRV4lLZCh0V9lPoUQa uKbvdbh9hXEB7mIYCWaRLLzsOnlzM1JnnOrJ/qSJ4ZKAZ64uFsK2PVqoVX8umC/cdq 6/dBInIRo1sLWmDdkPitqaUvjd+oVYilzl91nskLfaD6TlHlie1FpoKls6Z7cJ0lEH YTklhJJEzuSvA== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1serWx-000000055eX-291s; Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , "Michael S. Tsirkin" , Ani Sinha , Dongjiu Geng , Eric Blake , Igor Mammedov , Markus Armbruster , Michael Roth , Paolo Bonzini , Peter Maydell , linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v8 04/13] qapi/acpi-hest: add an interface to do generic CPER error injection Date: Fri, 16 Aug 2024 09:37:36 +0200 Message-ID: X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" Creates a QMP command to be used for generic ACPI APEI hardware error injection (HEST) via GHESv2. The actual GHES code will be added at the followup patch. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Shiju Jose Reviewed-by: Jonathan Cameron --- MAINTAINERS | 7 +++++++ hw/acpi/Kconfig | 5 +++++ hw/acpi/ghes_cper.c | 33 +++++++++++++++++++++++++++++++++ hw/acpi/ghes_cper_stub.c | 19 +++++++++++++++++++ hw/acpi/meson.build | 2 ++ hw/arm/Kconfig | 5 +++++ include/hw/acpi/ghes.h | 3 +++ qapi/acpi-hest.json | 36 ++++++++++++++++++++++++++++++++++++ qapi/meson.build | 1 + qapi/qapi-schema.json | 1 + 10 files changed, 112 insertions(+) create mode 100644 hw/acpi/ghes_cper.c create mode 100644 hw/acpi/ghes_cper_stub.c create mode 100644 qapi/acpi-hest.json diff --git a/MAINTAINERS b/MAINTAINERS index 3584d6a6c6da..1d8091818899 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2077,6 +2077,13 @@ F: hw/acpi/ghes.c F: include/hw/acpi/ghes.h F: docs/specs/acpi_hest_ghes.rst =20 +ACPI/HEST/GHES/ARM processor CPER +R: Mauro Carvalho Chehab +S: Maintained +F: hw/arm/ghes_cper.c +F: hw/acpi/ghes_cper_stub.c +F: qapi/acpi-hest.json + ppc4xx L: qemu-ppc@nongnu.org S: Orphan diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig index e07d3204eb36..73ffbb82c150 100644 --- a/hw/acpi/Kconfig +++ b/hw/acpi/Kconfig @@ -51,6 +51,11 @@ config ACPI_APEI bool depends on ACPI =20 +config GHES_CPER + bool + depends on ACPI_APEI + default y + config ACPI_PCI bool depends on ACPI && PCI diff --git a/hw/acpi/ghes_cper.c b/hw/acpi/ghes_cper.c new file mode 100644 index 000000000000..92ca84d738de --- /dev/null +++ b/hw/acpi/ghes_cper.c @@ -0,0 +1,33 @@ +/* + * CPER payload parser for error injection + * + * Copyright(C) 2024 Huawei LTD. + * + * This code is licensed under the GPL version 2 or later. See the + * COPYING file in the top-level directory. + * + */ + +#include "qemu/osdep.h" + +#include "qemu/base64.h" +#include "qemu/error-report.h" +#include "qemu/uuid.h" +#include "qapi/qapi-commands-acpi-hest.h" +#include "hw/acpi/ghes.h" + +void qmp_ghes_cper(const char *qmp_cper, + Error **errp) +{ + + uint8_t *cper; + size_t len; + + cper =3D qbase64_decode(qmp_cper, -1, &len, errp); + if (!cper) { + error_setg(errp, "missing GHES CPER payload"); + return; + } + + /* TODO: call a function at ghes */ +} diff --git a/hw/acpi/ghes_cper_stub.c b/hw/acpi/ghes_cper_stub.c new file mode 100644 index 000000000000..36138c462ac9 --- /dev/null +++ b/hw/acpi/ghes_cper_stub.c @@ -0,0 +1,19 @@ +/* + * Stub interface for CPER payload parser for error injection + * + * Copyright(C) 2024 Huawei LTD. + * + * This code is licensed under the GPL version 2 or later. See the + * COPYING file in the top-level directory. + * + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qapi/qapi-commands-acpi-hest.h" +#include "hw/acpi/ghes.h" + +void qmp_ghes_cper(const char *cper, Error **errp) +{ + error_setg(errp, "GHES QMP error inject is not compiled in"); +} diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build index fa5c07db9068..6cbf430eb66d 100644 --- a/hw/acpi/meson.build +++ b/hw/acpi/meson.build @@ -34,4 +34,6 @@ endif system_ss.add(when: 'CONFIG_ACPI', if_false: files('acpi-stub.c', 'aml-bui= ld-stub.c', 'ghes-stub.c', 'acpi_interface.c')) system_ss.add(when: 'CONFIG_ACPI_PCI_BRIDGE', if_false: files('pci-bridge-= stub.c')) system_ss.add_all(when: 'CONFIG_ACPI', if_true: acpi_ss) +system_ss.add(when: 'CONFIG_GHES_CPER', if_true: files('ghes_cper.c')) +system_ss.add(when: 'CONFIG_GHES_CPER', if_false: files('ghes_cper_stub.c'= )) system_ss.add(files('acpi-qmp-cmds.c')) diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 1ad60da7aa2d..bed6ba27d715 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -712,3 +712,8 @@ config ARMSSE select UNIMP select SSE_COUNTER select SSE_TIMER + +config GHES_CPER + bool + depends on ARM + default y if AARCH64 diff --git a/include/hw/acpi/ghes.h b/include/hw/acpi/ghes.h index 419a97d5cbd9..b977d65564ba 100644 --- a/include/hw/acpi/ghes.h +++ b/include/hw/acpi/ghes.h @@ -23,6 +23,7 @@ #define ACPI_GHES_H =20 #include "hw/acpi/bios-linker-loader.h" +#include "qapi/error.h" #include "qemu/notify.h" =20 extern NotifierList acpi_generic_error_notifiers; @@ -77,6 +78,8 @@ void acpi_build_hest(GArray *table_data, BIOSLinker *link= er, void acpi_ghes_add_fw_cfg(AcpiGhesState *vms, FWCfgState *s, GArray *hardware_errors); int acpi_ghes_record_errors(uint8_t notify, uint64_t error_physical_addr); +void ghes_record_cper_errors(const void *cper, size_t len, + enum AcpiGhesNotifyType notify, Error **errp); =20 /** * acpi_ghes_present: Report whether ACPI GHES table is present diff --git a/qapi/acpi-hest.json b/qapi/acpi-hest.json new file mode 100644 index 000000000000..91296755d285 --- /dev/null +++ b/qapi/acpi-hest.json @@ -0,0 +1,36 @@ +# -*- Mode: Python -*- +# vim: filetype=3Dpython + +## +# =3D GHESv2 CPER Error Injection +# +# Defined since ACPI Specification 6.2, +# section 18.3.2.8 Generic Hardware Error Source version 2. See: +# +# https://uefi.org/specs/ACPI/6.5/18_Platform_Error_Interfaces.html#generi= c-hardware-error-source-version-2-ghesv2-type-10 +## + + +## +# @ghes-cper: +# +# Inject a CPER error data to be filled according to ACPI 6.2 +# spec via GHESv2. +# +# @cper: contains a base64 encoded string with raw data for a single CPER +# record with Generic Error Status Block, Generic Error Data Entry and +# generic error data payload, as described at +# https://uefi.org/specs/UEFI/2.10/Apx_N_Common_Platform_Error_Record.= html#format +# +# Features: +# +# @unstable: This command is experimental. +# +# Since: 9.2 +## +{ 'command': 'ghes-cper', + 'data': { + 'cper': 'str' + }, + 'features': [ 'unstable' ] +} diff --git a/qapi/meson.build b/qapi/meson.build index e7bc54e5d047..35cea6147262 100644 --- a/qapi/meson.build +++ b/qapi/meson.build @@ -59,6 +59,7 @@ qapi_all_modules =3D [ if have_system qapi_all_modules +=3D [ 'acpi', + 'acpi-hest', 'audio', 'cryptodev', 'qdev', diff --git a/qapi/qapi-schema.json b/qapi/qapi-schema.json index b1581988e4eb..baf19ab73afe 100644 --- a/qapi/qapi-schema.json +++ b/qapi/qapi-schema.json @@ -75,6 +75,7 @@ { 'include': 'misc-target.json' } { 'include': 'audio.json' } { 'include': 'acpi.json' } +{ 'include': 'acpi-hest.json' } { 'include': 'pci.json' } { 'include': 'stats.json' } { 'include': 'virtio.json' } --=20 2.46.0 From nobody Thu Nov 28 02:13:45 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F987139579 for ; Fri, 16 Aug 2024 07:37:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793874; cv=none; b=NEO93v3xB8ECHAB39E69dqhDaOWjr8U7lnFKZdRDywy0K0AXCUWMbmt7RVThC6+qTgV07VV1nxlOs9Eey9G22rrlyQMEe1wsScnr8y28hm07sturAAg2Q59sEicgYklCnyimu+LMpeZ7wwOvm2NaW69CuTvGCHpnxtdiDaHabXM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793874; c=relaxed/simple; bh=GmffiYriLhRwIpiLPFQP/aI3uy8JlKy3fKFqKLgmbg0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MTWckUgJl4Wh1IccESQGSua2PNXLAUvJjJI6bs1wzXKkwEWiOdWI+ZP3j0gAqa5gfSVK8Sd9WaOYOO3WWw662T05Sm4Bibl/38KON/gq048RycybnagQdU6EP42TVOyroG+JUu2f48C0NhktniVuGrOjSisZgFPSDG6pYv53c30= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=pgDeXbtk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="pgDeXbtk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 61724C4AF10; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723793873; bh=GmffiYriLhRwIpiLPFQP/aI3uy8JlKy3fKFqKLgmbg0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pgDeXbtkDeOizmGendOUfEr08FFu1M7bMYia8wwEbKtcqM81gm2YcU1tYpeA4Iuh2 TY6Dt97hP2CTAkD6eUStCiYyL9Y7rYRoeUpaFpGkRnqU/3MMHgMy5XLq4/JvrL1iCi dKWR2W24QalO2baViQ8ondXgWTOm9wrIhCmtfRCkYR+FSLaQNpXATh90hlA3IKLCtM r7C6GZ34jpogikvoJ3RcSImj2RlJHkGbPgLIyQ9NTpBAckA9suaF26h+jFBxS4sOpj 9kZa44jMBECSW7kAHESgz2iJuc7UY/6isHUg7jHOw28DhQ1m5oOUHLsiD3bOOQTkPt whW53EaXVb20Q== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1serWx-000000055eb-2Fq4; Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , "Michael S. Tsirkin" , Ani Sinha , Dongjiu Geng , Igor Mammedov , Peter Maydell , Shannon Zhao , linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v8 05/13] acpi/ghes: rework the logic to handle HEST source ID Date: Fri, 16 Aug 2024 09:37:37 +0200 Message-ID: <97fc9d96b52a13f07a481d8b9fe0a92f4f550faf.1723793768.git.mchehab+huawei@kernel.org> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" The current logic is based on a lot of duct tape, with offsets calculated based on one define with the number of source IDs and an enum. Rewrite the logic in a way that it would be more resilient of code changes, by moving the source ID count to an enum and make the offset calculus more explicit. Such change was inspired on a patch from Jonathan Cameron splitting the logic to get the CPER address on a separate function, as this will be needed to support generic error injection. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/ghes-stub.c | 3 +- hw/acpi/ghes.c | 210 ++++++++++++++++++++++++--------------- hw/arm/virt-acpi-build.c | 5 +- include/hw/acpi/ghes.h | 17 ++-- 4 files changed, 138 insertions(+), 97 deletions(-) diff --git a/hw/acpi/ghes-stub.c b/hw/acpi/ghes-stub.c index c315de1802d6..8762449870b5 100644 --- a/hw/acpi/ghes-stub.c +++ b/hw/acpi/ghes-stub.c @@ -11,7 +11,8 @@ #include "qemu/osdep.h" #include "hw/acpi/ghes.h" =20 -int acpi_ghes_record_errors(uint8_t source_id, uint64_t physical_address) +int acpi_ghes_record_errors(enum AcpiGhesNotifyType notify, + uint64_t physical_address) { return -1; } diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index df59fd35568c..7870f51e2a9e 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -28,14 +28,23 @@ #include "hw/nvram/fw_cfg.h" #include "qemu/uuid.h" =20 -#define ACPI_GHES_ERRORS_FW_CFG_FILE "etc/hardware_errors" -#define ACPI_GHES_DATA_ADDR_FW_CFG_FILE "etc/hardware_errors_addr" +#define ACPI_HW_ERROR_FW_CFG_FILE "etc/hardware_errors" +#define ACPI_HW_ERROR_ADDR_FW_CFG_FILE "etc/hardware_errors_addr" +#define ACPI_HEST_ADDR_FW_CFG_FILE "etc/acpi_table_hest_addr" =20 /* The max size in bytes for one error block */ #define ACPI_GHES_MAX_RAW_DATA_LENGTH (1 * KiB) =20 -/* Support ARMv8 SEA notification type error source and GPIO interrupt. */ -#define ACPI_GHES_ERROR_SOURCE_COUNT 2 +/* + * ID numbers used to fill HEST source ID field + */ +enum AcpiHestSourceId { + ACPI_HEST_SRC_ID_SEA, + ACPI_HEST_SRC_ID_GED, + + /* Shall be the last one */ + ACPI_HEST_SRC_ID_COUNT +} AcpiHestSourceId; =20 /* Generic Hardware Error Source version 2 */ #define ACPI_GHES_SOURCE_GENERIC_ERROR_V2 10 @@ -63,6 +72,19 @@ */ #define ACPI_GHES_GESB_SIZE 20 =20 +/* + * Offsets with regards to the start of the HEST table stored at + * ags->hest_addr_le, according with the memory layout map at + * docs/specs/acpi_hest_ghes.rst. + */ + +/* ACPI 4.0: 17.3.2 ACPI Error Source */ +#define ACPI_HEST_HEADER_SIZE 40 + +/* ACPI 6.2: 18.3.2.8 Generic Hardware Error Source version 2 */ +#define HEST_GHES_V2_TABLE_SIZE 92 +#define GHES_ACK_OFFSET (64 + GAS_ADDR_OFFSET + ACPI_HEST_HEADER_= SIZE) + /* * Values for error_severity field */ @@ -236,17 +258,17 @@ static int acpi_ghes_record_mem_error(uint64_t error_= block_address, * Initialize "etc/hardware_errors" and "etc/hardware_errors_addr" fw_cfg = blobs. * See docs/specs/acpi_hest_ghes.rst for blobs format. */ -void build_ghes_error_table(GArray *hardware_errors, BIOSLinker *linker) +static void build_ghes_error_table(GArray *hardware_errors, BIOSLinker *li= nker) { int i, error_status_block_offset; =20 /* Build error_block_address */ - for (i =3D 0; i < ACPI_GHES_ERROR_SOURCE_COUNT; i++) { + for (i =3D 0; i < ACPI_HEST_SRC_ID_COUNT; i++) { build_append_int_noprefix(hardware_errors, 0, sizeof(uint64_t)); } =20 /* Build read_ack_register */ - for (i =3D 0; i < ACPI_GHES_ERROR_SOURCE_COUNT; i++) { + for (i =3D 0; i < ACPI_HEST_SRC_ID_COUNT; i++) { /* * Initialize the value of read_ack_register to 1, so GHES can be * writable after (re)boot. @@ -261,20 +283,20 @@ void build_ghes_error_table(GArray *hardware_errors, = BIOSLinker *linker) =20 /* Reserve space for Error Status Data Block */ acpi_data_push(hardware_errors, - ACPI_GHES_MAX_RAW_DATA_LENGTH * ACPI_GHES_ERROR_SOURCE_COUNT); + ACPI_GHES_MAX_RAW_DATA_LENGTH * ACPI_HEST_SRC_ID_COUNT); =20 /* Tell guest firmware to place hardware_errors blob into RAM */ - bios_linker_loader_alloc(linker, ACPI_GHES_ERRORS_FW_CFG_FILE, + bios_linker_loader_alloc(linker, ACPI_HW_ERROR_FW_CFG_FILE, hardware_errors, sizeof(uint64_t), false); =20 - for (i =3D 0; i < ACPI_GHES_ERROR_SOURCE_COUNT; i++) { + for (i =3D 0; i < ACPI_HEST_SRC_ID_COUNT; i++) { /* * Tell firmware to patch error_block_address entries to point to * corresponding "Generic Error Status Block" */ bios_linker_loader_add_pointer(linker, - ACPI_GHES_ERRORS_FW_CFG_FILE, sizeof(uint64_t) * i, - sizeof(uint64_t), ACPI_GHES_ERRORS_FW_CFG_FILE, + ACPI_HW_ERROR_FW_CFG_FILE, sizeof(uint64_t) * i, + sizeof(uint64_t), ACPI_HW_ERROR_FW_CFG_FILE, error_status_block_offset + i * ACPI_GHES_MAX_RAW_DATA_LENGTH); } =20 @@ -282,16 +304,39 @@ void build_ghes_error_table(GArray *hardware_errors, = BIOSLinker *linker) * tell firmware to write hardware_errors GPA into * hardware_errors_addr fw_cfg, once the former has been initialized. */ - bios_linker_loader_write_pointer(linker, ACPI_GHES_DATA_ADDR_FW_CFG_FI= LE, - 0, sizeof(uint64_t), ACPI_GHES_ERRORS_FW_CFG_FILE, 0); + bios_linker_loader_write_pointer(linker, ACPI_HW_ERROR_ADDR_FW_CFG_FIL= E, 0, + sizeof(uint64_t), + ACPI_HW_ERROR_FW_CFG_FILE, 0); +} + +static bool ghes_notify_to_source_id(enum AcpiGhesNotifyType notify, + enum AcpiHestSourceId *source_id) +{ + switch (notify) { + case ACPI_GHES_NOTIFY_SEA: /* ARMv8 */ + *source_id =3D ACPI_HEST_SRC_ID_SEA; + return false; + case ACPI_GHES_NOTIFY_GPIO: + *source_id =3D ACPI_HEST_SRC_ID_GED; + return false; + default: + /* Unsupported notification types */ + return true; + } } =20 /* Build Generic Hardware Error Source version 2 (GHESv2) */ -static void build_ghes_v2(GArray *table_data, int source_id, BIOSLinker *l= inker) +static void build_ghes_v2(GArray *table_data, + enum AcpiGhesNotifyType notify, + BIOSLinker *linker) { uint64_t address_offset; + enum AcpiHestSourceId source_id; =20 - assert(source_id < ACPI_HEST_SRC_ID_RESERVED); + if (ghes_notify_to_source_id(notify, &source_id)) { + error_report("Error: notify %d not supported", notify); + abort(); + } =20 /* * Type: @@ -319,24 +364,13 @@ static void build_ghes_v2(GArray *table_data, int sou= rce_id, BIOSLinker *linker) build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 0x40, 0, 4 /* QWord access */, 0); bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, - address_offset + GAS_ADDR_OFFSET, sizeof(uint64_t), - ACPI_GHES_ERRORS_FW_CFG_FILE, source_id * sizeof(uint64_t)); + address_offset + GAS_ADDR_OFFSET, + sizeof(uint64_t), + ACPI_HW_ERROR_FW_CFG_FILE, + source_id * sizeof(uint64_t)); =20 - switch (source_id) { - case ACPI_HEST_SRC_ID_SEA: - /* - * Notification Structure - * Now only enable ARMv8 SEA notification type - */ - build_ghes_hw_error_notification(table_data, ACPI_GHES_NOTIFY_SEA); - break; - case ACPI_HEST_SRC_ID_GED: - build_ghes_hw_error_notification(table_data, ACPI_GHES_NOTIFY_GPIO= ); - break; - default: - error_report("Not support this error source"); - abort(); - } + /* Notification Structure */ + build_ghes_hw_error_notification(table_data, notify); =20 /* Error Status Block Length */ build_append_int_noprefix(table_data, ACPI_GHES_MAX_RAW_DATA_LENGTH, 4= ); @@ -350,9 +384,11 @@ static void build_ghes_v2(GArray *table_data, int sour= ce_id, BIOSLinker *linker) build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 0x40, 0, 4 /* QWord access */, 0); bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, - address_offset + GAS_ADDR_OFFSET, - sizeof(uint64_t), ACPI_GHES_ERRORS_FW_CFG_FILE, - (ACPI_GHES_ERROR_SOURCE_COUNT + source_id) * sizeof(uint64_t)); + address_offset + GAS_ADDR_OFFSET, + sizeof(uint64_t), + ACPI_HW_ERROR_FW_CFG_FILE, + (ACPI_HEST_SRC_ID_COUNT + source_id) * + sizeof(uint64_t)); =20 /* * Read Ack Preserve field @@ -365,90 +401,100 @@ static void build_ghes_v2(GArray *table_data, int so= urce_id, BIOSLinker *linker) } =20 /* Build Hardware Error Source Table */ -void acpi_build_hest(GArray *table_data, BIOSLinker *linker, +void acpi_build_hest(GArray *table_data, GArray *hardware_errors, + BIOSLinker *linker, const char *oem_id, const char *oem_table_id) { AcpiTable table =3D { .sig =3D "HEST", .rev =3D 1, .oem_id =3D oem_id, .oem_table_id =3D oem_table_id= }; =20 + build_ghes_error_table(hardware_errors, linker); + + int hest_offset =3D table_data->len; + acpi_table_begin(&table, table_data); =20 /* Error Source Count */ - build_append_int_noprefix(table_data, ACPI_GHES_ERROR_SOURCE_COUNT, 4); - build_ghes_v2(table_data, ACPI_HEST_SRC_ID_SEA, linker); - build_ghes_v2(table_data, ACPI_HEST_SRC_ID_GED, linker); + build_append_int_noprefix(table_data, ACPI_HEST_SRC_ID_COUNT, 4); + build_ghes_v2(table_data, ACPI_GHES_NOTIFY_SEA, linker); + build_ghes_v2(table_data, ACPI_GHES_NOTIFY_GPIO, linker); =20 acpi_table_end(linker, &table); + + /* + * tell firmware to write into GPA the address of HEST via fw_cfg, + * once initialized. + */ + bios_linker_loader_write_pointer(linker, + ACPI_HEST_ADDR_FW_CFG_FILE, 0, + sizeof(uint64_t), + ACPI_BUILD_TABLE_FILE, hest_offset); } =20 void acpi_ghes_add_fw_cfg(AcpiGhesState *ags, FWCfgState *s, GArray *hardware_error) { /* Create a read-only fw_cfg file for GHES */ - fw_cfg_add_file(s, ACPI_GHES_ERRORS_FW_CFG_FILE, hardware_error->data, + fw_cfg_add_file(s, ACPI_HW_ERROR_FW_CFG_FILE, hardware_error->data, hardware_error->len); =20 /* Create a read-write fw_cfg file for Address */ - fw_cfg_add_file_callback(s, ACPI_GHES_DATA_ADDR_FW_CFG_FILE, NULL, NUL= L, + fw_cfg_add_file_callback(s, ACPI_HW_ERROR_ADDR_FW_CFG_FILE, NULL, NULL, NULL, &(ags->ghes_addr_le), sizeof(ags->ghes_addr_le), false); =20 + fw_cfg_add_file_callback(s, ACPI_HEST_ADDR_FW_CFG_FILE, NULL, NULL, + NULL, &(ags->hest_addr_le), sizeof(ags->hest_addr_le), false); + ags->present =3D true; } =20 -int acpi_ghes_record_errors(uint8_t source_id, uint64_t physical_address) +int acpi_ghes_record_errors(enum AcpiGhesNotifyType notify, + uint64_t physical_address) { - uint64_t error_block_addr, read_ack_register_addr, read_ack_register = =3D 0; - uint64_t start_addr; - bool ret =3D -1; + uint64_t cper_addr, read_ack_register =3D 0; + uint64_t read_ack_start_addr; + enum AcpiHestSourceId source; AcpiGedState *acpi_ged_state; AcpiGhesState *ags; =20 - assert(source_id < ACPI_HEST_SRC_ID_RESERVED); + if (ghes_notify_to_source_id(ACPI_HEST_SRC_ID_SEA, &source)) { + error_report("GHES: Invalid error block/ack address(es) for notify= %d", + notify); + return -1; + } =20 acpi_ged_state =3D ACPI_GED(object_resolve_path_type("", TYPE_ACPI_GED, NULL)); g_assert(acpi_ged_state); ags =3D &acpi_ged_state->ghes_state; =20 - start_addr =3D le64_to_cpu(ags->ghes_addr_le); + cper_addr =3D le64_to_cpu(ags->ghes_addr_le); + cper_addr +=3D ACPI_HEST_SRC_ID_COUNT * sizeof(uint64_t); + read_ack_start_addr =3D cper_addr + source * sizeof(uint64_t); =20 - if (physical_address) { + cper_addr +=3D ACPI_HEST_SRC_ID_COUNT * sizeof(uint64_t); + cper_addr +=3D source * ACPI_GHES_MAX_RAW_DATA_LENGTH; =20 - if (source_id < ACPI_HEST_SRC_ID_RESERVED) { - start_addr +=3D source_id * sizeof(uint64_t); - } - - cpu_physical_memory_read(start_addr, &error_block_addr, - sizeof(error_block_addr)); - - error_block_addr =3D le64_to_cpu(error_block_addr); - - read_ack_register_addr =3D start_addr + - ACPI_GHES_ERROR_SOURCE_COUNT * sizeof(uint64_t); - - cpu_physical_memory_read(read_ack_register_addr, - &read_ack_register, sizeof(read_ack_regis= ter)); - - /* zero means OSPM does not acknowledge the error */ - if (!read_ack_register) { - error_report("OSPM does not acknowledge previous error," - " so can not record CPER for current error anymore"); - } else if (error_block_addr) { - read_ack_register =3D cpu_to_le64(0); - /* - * Clear the Read Ack Register, OSPM will write it to 1 when - * it acknowledges this error. - */ - cpu_physical_memory_write(read_ack_register_addr, - &read_ack_register, sizeof(uint64_t)); - - ret =3D acpi_ghes_record_mem_error(error_block_addr, - physical_address); - } else - error_report("can not find Generic Error Status Block"); + if (!physical_address) { + error_report("can not find Generic Error Status Block for notify %= d", + notify); + return -1; } =20 - return ret; + cpu_physical_memory_read(read_ack_start_addr, + &read_ack_register, sizeof(read_ack_register)= ); + + /* zero means OSPM does not acknowledge the error */ + + read_ack_register =3D cpu_to_le64(0); + /* + * Clear the Read Ack Register, OSPM will write it to 1 when + * it acknowledges this error. + */ + cpu_physical_memory_write(read_ack_start_addr, + &read_ack_register, sizeof(uint64_t)); + + return acpi_ghes_record_mem_error(cper_addr, physical_address); } =20 NotifierList acpi_generic_error_notifiers =3D diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 1769467d23b2..79635bc7a0a8 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -944,10 +944,9 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildT= ables *tables) build_dbg2(tables_blob, tables->linker, vms); =20 if (vms->ras) { - build_ghes_error_table(tables->hardware_errors, tables->linker); acpi_add_table(table_offsets, tables_blob); - acpi_build_hest(tables_blob, tables->linker, vms->oem_id, - vms->oem_table_id); + acpi_build_hest(tables_blob, tables->hardware_errors, tables->link= er, + vms->oem_id, vms->oem_table_id); } =20 if (ms->numa_state->num_nodes > 0) { diff --git a/include/hw/acpi/ghes.h b/include/hw/acpi/ghes.h index b977d65564ba..6e349264fd8b 100644 --- a/include/hw/acpi/ghes.h +++ b/include/hw/acpi/ghes.h @@ -29,7 +29,7 @@ extern NotifierList acpi_generic_error_notifiers; =20 /* - * Values for Hardware Error Notification Type field + * ACPI spec values for Hardware Error Notification Type field */ enum AcpiGhesNotifyType { /* Polled */ @@ -60,24 +60,19 @@ enum AcpiGhesNotifyType { ACPI_GHES_NOTIFY_RESERVED =3D 12 }; =20 -/* Those are used as table indexes when building GHES tables */ -enum { - ACPI_HEST_SRC_ID_SEA =3D 0, - ACPI_HEST_SRC_ID_GED, - ACPI_HEST_SRC_ID_RESERVED, -}; - typedef struct AcpiGhesState { + uint64_t hest_addr_le; uint64_t ghes_addr_le; bool present; /* True if GHES is present at all on this board */ } AcpiGhesState; =20 -void build_ghes_error_table(GArray *hardware_errors, BIOSLinker *linker); -void acpi_build_hest(GArray *table_data, BIOSLinker *linker, +void acpi_build_hest(GArray *table_data, GArray *hardware_errors, + BIOSLinker *linker, const char *oem_id, const char *oem_table_id); void acpi_ghes_add_fw_cfg(AcpiGhesState *vms, FWCfgState *s, GArray *hardware_errors); -int acpi_ghes_record_errors(uint8_t notify, uint64_t error_physical_addr); +int acpi_ghes_record_errors(enum AcpiGhesNotifyType notify, + uint64_t error_physical_addr); void ghes_record_cper_errors(const void *cper, size_t len, enum AcpiGhesNotifyType notify, Error **errp); =20 --=20 2.46.0 From nobody Thu Nov 28 02:13:45 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB867136671 for ; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="uZePAw1p" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5EF9AC4AF0B; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723793873; bh=zSq5f2sPQEwbW1zp/QMXwMnIVQB5Xva8uz7Azz6AAiw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uZePAw1p5aB/VUFch0aN8OpTG2gL/EphQLsS5xyxUOkyU/yEy3p8YUf3Av9w1JSb3 Y9TO3VCNFD2ESE5RLtZeb6QgcJqlxt1Q+DsaRZ3aokUUaYoLN2Kf49rXYC5k67TOHb qmRkCEIJwC14x8ml3TT4dPKwE/XtoNMhHO0+oRdMwlPV/hhuKdl2hiB7UrRWfS61KR kvKW10hLSdVfmJwN37CiRBjNzt2fxsNISrgxkDXhHH0Qfh3Rypf0jQBbDCHUUBz9xO Z0mtuRssKa3GQZa90Lg5I5oUQcLz+szJGhFp29OXV0mq3lPedo0Lk7jrL3GQ+FjxuI JN24w6A1tgqVA== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1serWx-000000055ef-2Mdl; Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , "Michael S. Tsirkin" , Ani Sinha , Dongjiu Geng , Igor Mammedov , linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v8 06/13] acpi/ghes: add support for generic error injection via QAPI Date: Fri, 16 Aug 2024 09:37:38 +0200 Message-ID: <2c8970b5d54d17b601dc65d778cc8b5fb288984b.1723793768.git.mchehab+huawei@kernel.org> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" Provide a generic interface for error injection via GHESv2. This patch is co-authored: - original ghes logic to inject a simple ARM record by Shiju Jose; - generic logic to handle block addresses by Jonathan Cameron; - generic GHESv2 error inject by Mauro Carvalho Chehab; Co-authored-by: Jonathan Cameron Co-authored-by: Shiju Jose Co-authored-by: Mauro Carvalho Chehab Signed-off-by: Jonathan Cameron Signed-off-by: Shiju Jose Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/ghes.c | 57 +++++++++++++++++++++++++++++++++++++++++++++ hw/acpi/ghes_cper.c | 2 +- 2 files changed, 58 insertions(+), 1 deletion(-) diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index 7870f51e2a9e..a3ae710dcf81 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -500,6 +500,63 @@ int acpi_ghes_record_errors(enum AcpiGhesNotifyType no= tify, NotifierList acpi_generic_error_notifiers =3D NOTIFIER_LIST_INITIALIZER(error_device_notifiers); =20 +void ghes_record_cper_errors(uint8_t *cper, size_t len, + enum AcpiGhesNotifyType notify, Error **errp) +{ + uint64_t cper_addr, read_ack_start_addr; + enum AcpiHestSourceId source; + AcpiGedState *acpi_ged_state; + AcpiGhesState *ags; + uint64_t read_ack; + + if (ghes_notify_to_source_id(notify, &source)) { + error_setg(errp, + "GHES: Invalid error block/ack address(es) for notify %= d", + notify); + return; + } + + acpi_ged_state =3D ACPI_GED(object_resolve_path_type("", TYPE_ACPI_GED, + NULL)); + g_assert(acpi_ged_state); + ags =3D &acpi_ged_state->ghes_state; + + cper_addr =3D le64_to_cpu(ags->ghes_addr_le); + cper_addr +=3D ACPI_HEST_SRC_ID_COUNT * sizeof(uint64_t); + read_ack_start_addr =3D cper_addr + source * sizeof(uint64_t); + + cper_addr +=3D ACPI_HEST_SRC_ID_COUNT * sizeof(uint64_t); + cper_addr +=3D source * ACPI_GHES_MAX_RAW_DATA_LENGTH; + + cpu_physical_memory_read(read_ack_start_addr, + &read_ack, sizeof(uint64_t)); + + /* zero means OSPM does not acknowledge the error */ + if (!read_ack) { + error_setg(errp, + "Last CPER record was not acknowledged yet"); + read_ack =3D 1; + cpu_physical_memory_write(read_ack_start_addr, + &read_ack, sizeof(uint64_t)); + return; + } + + read_ack =3D cpu_to_le64(0); + cpu_physical_memory_write(read_ack_start_addr, + &read_ack, sizeof(uint64_t)); + + /* Build CPER record */ + + if (len > ACPI_GHES_MAX_RAW_DATA_LENGTH) { + error_setg(errp, "GHES CPER record is too big: %ld", len); + } + + /* Write the generic error data entry into guest memory */ + cpu_physical_memory_write(cper_addr, cper, len); + + notifier_list_notify(&acpi_generic_error_notifiers, NULL); +} + bool acpi_ghes_present(void) { AcpiGedState *acpi_ged_state; diff --git a/hw/acpi/ghes_cper.c b/hw/acpi/ghes_cper.c index 92ca84d738de..2328dbff7012 100644 --- a/hw/acpi/ghes_cper.c +++ b/hw/acpi/ghes_cper.c @@ -29,5 +29,5 @@ void qmp_ghes_cper(const char *qmp_cper, return; } =20 - /* TODO: call a function at ghes */ + ghes_record_cper_errors(cper, len, ACPI_GHES_NOTIFY_GPIO, errp); } --=20 2.46.0 From nobody Thu Nov 28 02:13:45 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23840139CEF; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FCfYt9Lq" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 634D5C4AF12; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723793873; bh=CVbWcAOnbhzuAqQUj9IQkyqnNpkcMiuJof1ZiJ1dGRA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FCfYt9Lqm6OC4uvG675SboMAdiq2f6O4aVkWr4zC9swcaazaVbq5pNHWs903JbpFl 25Q/xXJnLm9M8SIPLwMkFedoMx/K3W2GqKmtK8rLgv0eMhnQLndGZjaKPWfVawfOgW 6axe2Ae23THZRGliJGhuty74vnts7zGDfUtohNQmVbKCo0YiVM8Ex+9ZU2YaQoI6Kf At6GTFMcIW/Mq83W0piu5ZB4orrrrfcbZRxA9emGL95pnTStH+lHq0svlXs3s/ppOf okUbX2q54itYt7w28ScBHp5SXYR09vfvms77zoo6TCXOS1avxRCuNmGkQKeYgLyCI2 YADVLhGUlVztw== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1serWx-000000055ej-2Tik; Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , "Michael S. Tsirkin" , Ani Sinha , Dongjiu Geng , Igor Mammedov , Paolo Bonzini , Peter Maydell , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v8 07/13] acpi/ghes: cleanup the memory error code logic Date: Fri, 16 Aug 2024 09:37:39 +0200 Message-ID: X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" Better organize the code of the function, making it to use the raw CPER function, thus removing duplicated code. While here, rename the function to actually reflect what it does. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/ghes-stub.c | 2 +- hw/acpi/ghes.c | 125 +++++++++++++++-------------------------- include/hw/acpi/ghes.h | 4 +- target/arm/kvm.c | 2 +- 4 files changed, 50 insertions(+), 83 deletions(-) diff --git a/hw/acpi/ghes-stub.c b/hw/acpi/ghes-stub.c index 8762449870b5..a60ae07a8e7c 100644 --- a/hw/acpi/ghes-stub.c +++ b/hw/acpi/ghes-stub.c @@ -11,7 +11,7 @@ #include "qemu/osdep.h" #include "hw/acpi/ghes.h" =20 -int acpi_ghes_record_errors(enum AcpiGhesNotifyType notify, +int acpi_ghes_memory_errors(enum AcpiGhesNotifyType notify, uint64_t physical_address) { return -1; diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index a3ae710dcf81..4f7b6c5ad2b6 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -206,51 +206,30 @@ static void acpi_ghes_build_append_mem_cper(GArray *t= able, build_append_int_noprefix(table, 0, 7); } =20 -static int acpi_ghes_record_mem_error(uint64_t error_block_address, - uint64_t error_physical_addr) +static void +ghes_gen_err_data_uncorrectable_recoverable(GArray *block, + const uint8_t *section_type, + int data_length) { - GArray *block; - - /* Memory Error Section Type */ - const uint8_t uefi_cper_mem_sec[] =3D - UUID_LE(0xA5BC1114, 0x6F64, 0x4EDE, 0xB8, 0x63, 0x3E, 0x83, \ - 0xED, 0x7C, 0x83, 0xB1); - /* invalid fru id: ACPI 4.0: 17.3.2.6.1 Generic Error Data, * Table 17-13 Generic Error Data Entry */ QemuUUID fru_id =3D {}; - uint32_t data_length; =20 - block =3D g_array_new(false, true /* clear */, 1); - - /* This is the length if adding a new generic error data entry*/ - data_length =3D ACPI_GHES_DATA_LENGTH + ACPI_GHES_MEM_CPER_LENGTH; /* - * It should not run out of the preallocated memory if adding a new ge= neric - * error data entry + * Calculate the size with this block. No need to check for + * too big CPER, as CPER size is checked at ghes_record_cper_errors() */ - assert((data_length + ACPI_GHES_GESB_SIZE) <=3D - ACPI_GHES_MAX_RAW_DATA_LENGTH); + data_length +=3D ACPI_GHES_GESB_SIZE; =20 /* Build the new generic error status block header */ acpi_ghes_generic_error_status(block, ACPI_GEBS_UNCORRECTABLE, 0, 0, data_length, ACPI_CPER_SEV_RECOVERABLE); =20 /* Build this new generic error data entry header */ - acpi_ghes_generic_error_data(block, uefi_cper_mem_sec, + acpi_ghes_generic_error_data(block, section_type, ACPI_CPER_SEV_RECOVERABLE, 0, 0, ACPI_GHES_MEM_CPER_LENGTH, fru_id, 0); - - /* Build the memory section CPER for above new generic error data entr= y */ - acpi_ghes_build_append_mem_cper(block, error_physical_addr); - - /* Write the generic error data entry into guest memory */ - cpu_physical_memory_write(error_block_address, block->data, block->len= ); - - g_array_free(block, true); - - return 0; } =20 /* @@ -448,59 +427,10 @@ void acpi_ghes_add_fw_cfg(AcpiGhesState *ags, FWCfgSt= ate *s, ags->present =3D true; } =20 -int acpi_ghes_record_errors(enum AcpiGhesNotifyType notify, - uint64_t physical_address) -{ - uint64_t cper_addr, read_ack_register =3D 0; - uint64_t read_ack_start_addr; - enum AcpiHestSourceId source; - AcpiGedState *acpi_ged_state; - AcpiGhesState *ags; - - if (ghes_notify_to_source_id(ACPI_HEST_SRC_ID_SEA, &source)) { - error_report("GHES: Invalid error block/ack address(es) for notify= %d", - notify); - return -1; - } - - acpi_ged_state =3D ACPI_GED(object_resolve_path_type("", TYPE_ACPI_GED, - NULL)); - g_assert(acpi_ged_state); - ags =3D &acpi_ged_state->ghes_state; - - cper_addr =3D le64_to_cpu(ags->ghes_addr_le); - cper_addr +=3D ACPI_HEST_SRC_ID_COUNT * sizeof(uint64_t); - read_ack_start_addr =3D cper_addr + source * sizeof(uint64_t); - - cper_addr +=3D ACPI_HEST_SRC_ID_COUNT * sizeof(uint64_t); - cper_addr +=3D source * ACPI_GHES_MAX_RAW_DATA_LENGTH; - - if (!physical_address) { - error_report("can not find Generic Error Status Block for notify %= d", - notify); - return -1; - } - - cpu_physical_memory_read(read_ack_start_addr, - &read_ack_register, sizeof(read_ack_register)= ); - - /* zero means OSPM does not acknowledge the error */ - - read_ack_register =3D cpu_to_le64(0); - /* - * Clear the Read Ack Register, OSPM will write it to 1 when - * it acknowledges this error. - */ - cpu_physical_memory_write(read_ack_start_addr, - &read_ack_register, sizeof(uint64_t)); - - return acpi_ghes_record_mem_error(cper_addr, physical_address); -} - NotifierList acpi_generic_error_notifiers =3D NOTIFIER_LIST_INITIALIZER(error_device_notifiers); =20 -void ghes_record_cper_errors(uint8_t *cper, size_t len, +void ghes_record_cper_errors(const void *cper, size_t len, enum AcpiGhesNotifyType notify, Error **errp) { uint64_t cper_addr, read_ack_start_addr; @@ -557,6 +487,43 @@ void ghes_record_cper_errors(uint8_t *cper, size_t len, notifier_list_notify(&acpi_generic_error_notifiers, NULL); } =20 +int acpi_ghes_memory_errors(enum AcpiGhesNotifyType notify, + uint64_t physical_address) +{ + /* Memory Error Section Type */ + const uint8_t guid[] =3D + UUID_LE(0xA5BC1114, 0x6F64, 0x4EDE, 0xB8, 0x63, 0x3E, 0x83, \ + 0xED, 0x7C, 0x83, 0xB1); + Error *errp =3D NULL; + GArray *block; + + if (!physical_address) { + error_report("can not find Generic Error Status Block for notify %= d", + notify); + return -1; + } + + block =3D g_array_new(false, true /* clear */, 1); + + ghes_gen_err_data_uncorrectable_recoverable(block, guid, + ACPI_GHES_MAX_RAW_DATA_LEN= GTH); + + /* Build the memory section CPER for above new generic error data entr= y */ + acpi_ghes_build_append_mem_cper(block, physical_address); + + /* Report the error */ + ghes_record_cper_errors(block->data, block->len, notify, &errp); + + g_array_free(block, true); + + if (errp) { + error_report_err(errp); + return -1; + } + + return 0; +} + bool acpi_ghes_present(void) { AcpiGedState *acpi_ged_state; diff --git a/include/hw/acpi/ghes.h b/include/hw/acpi/ghes.h index 6e349264fd8b..a24fe8a3bc33 100644 --- a/include/hw/acpi/ghes.h +++ b/include/hw/acpi/ghes.h @@ -71,7 +71,7 @@ void acpi_build_hest(GArray *table_data, GArray *hardware= _errors, const char *oem_id, const char *oem_table_id); void acpi_ghes_add_fw_cfg(AcpiGhesState *vms, FWCfgState *s, GArray *hardware_errors); -int acpi_ghes_record_errors(enum AcpiGhesNotifyType notify, +int acpi_ghes_memory_errors(enum AcpiGhesNotifyType notify, uint64_t error_physical_addr); void ghes_record_cper_errors(const void *cper, size_t len, enum AcpiGhesNotifyType notify, Error **errp); @@ -80,7 +80,7 @@ void ghes_record_cper_errors(const void *cper, size_t len, * acpi_ghes_present: Report whether ACPI GHES table is present * * Returns: true if the system has an ACPI GHES table and it is - * safe to call acpi_ghes_record_errors() to record a memory error. + * safe to call acpi_ghes_memory_errors() to record a memory error. */ bool acpi_ghes_present(void); #endif diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 849e2e21b304..915f07376c8f 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -2373,7 +2373,7 @@ void kvm_arch_on_sigbus_vcpu(CPUState *c, int code, v= oid *addr) */ if (code =3D=3D BUS_MCEERR_AR) { kvm_cpu_synchronize_state(c); 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Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , Dongjiu Geng , linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, Igor Mammedov Subject: [PATCH v8 08/13] docs: acpi_hest_ghes: fix documentation for CPER size Date: Fri, 16 Aug 2024 09:37:40 +0200 Message-ID: X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" While the spec defines a CPER size of 4KiB for each record, currently it is set to 1KiB. Fix the documentation and add a pointer to the macro name there, as this may help to keep it updated. Signed-off-by: Mauro Carvalho Chehab Acked-by: Igor Mammedov --- docs/specs/acpi_hest_ghes.rst | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/docs/specs/acpi_hest_ghes.rst b/docs/specs/acpi_hest_ghes.rst index 68f1fbe0a4af..c3e9f8d9a702 100644 --- a/docs/specs/acpi_hest_ghes.rst +++ b/docs/specs/acpi_hest_ghes.rst @@ -67,8 +67,10 @@ Design Details (3) The address registers table contains N Error Block Address entries and N Read Ack Register entries. The size for each entry is 8-byte. The Error Status Data Block table contains N Error Status Data Block - entries. The size for each entry is 4096(0x1000) bytes. The total size - for the "etc/hardware_errors" fw_cfg blob is (N * 8 * 2 + N * 4096) by= tes. + entries. The size for each entry is defined at the source code as + ACPI_GHES_MAX_RAW_DATA_LENGTH (currently 1024 bytes). The total size + for the "etc/hardware_errors" fw_cfg blob is + (N * 8 * 2 + N * ACPI_GHES_MAX_RAW_DATA_LENGTH) bytes. N is the number of the kinds of hardware error sources. =20 (4) QEMU generates the ACPI linker/loader script for the firmware. The --=20 2.46.0 From nobody Thu Nov 28 02:13:45 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 192C41386C6 for ; Fri, 16 Aug 2024 07:37:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793874; cv=none; b=lm21zL5YM7Dzfzv1vXFbyRpsSy1b4owGExMisMxY/1rASf7rFBmlFgmqd8Xlan2gSKSZbM3MRXuTqHB4GgiWJaNEyRnpl8T1ymDeGGB7IhpY10r5hCrUxzyrAkFQRZpA9XwTl1zy+WeW4zALOniFL9q6hidpkB3W0Tne7I7sXVI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793874; c=relaxed/simple; bh=IbfAJQGtgqH5ZwRHXDcIB/uXu2Wbyc2V06nIju1iVsY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FOmabVA3pOe3JbKdE9Q4RW7Nv/DgPbnShf8pPHLsH4mGXgU/oJD0a7sy52HMcLcz+cayqooEZvEVRJLH9nTuhAeVKqvMKl9blAm+eDfqM7SCetB3Vd+4NMkvhI9RdeYLGS6cjGebRz8NiLrj5Dz5zhL7AVMTxpE2XPeY7Pu1gPk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QQTeGKvk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QQTeGKvk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6F0DDC4AF14; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723793873; bh=IbfAJQGtgqH5ZwRHXDcIB/uXu2Wbyc2V06nIju1iVsY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QQTeGKvkWzvcL0vVILtWxkwno+1CAZYE/c5rGSsqrGqZl5qQLcDBhT1IQeyNUC7O9 K+TA0ONnIWaT8Xgb+Z2MMaoFKSzLLXv9x5LDFKuJ8Bt5kp6oVs0cgdy7R+3qPBhaG3 4oUjgoR8JoF4agBVBOMzxEt2Yeo4o1ebhVt3W2diePcQXU2fg20Bte7e1NPpOU9UYe xYZ9S0y9jXyFsmhkgq3ljHcF4ZfiB/mabHWacZCBW34Hz7t1HLEpWYB6tYO3cW2XIh 8XgWewS8BJpSbWyrNOheLUDAqAUYrRQ3CMeL7gafw2+z+zIGPlXuO5d+KkTMqhGXJF QltdAimJ3crYw== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1serWx-000000055er-2hXx; Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , Cleber Rosa , John Snow , linux-kernel@vger.kernel.org, qemu-devel@nongnu.org Subject: [PATCH v8 09/13] scripts/ghes_inject: add a script to generate GHES error inject Date: Fri, 16 Aug 2024 09:37:41 +0200 Message-ID: X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" Using the QMP GHESv2 API requires preparing a raw data array containing a CPER record. Add a helper script with subcommands to prepare such data. Currently, only ARM Processor error CPER record is supported. Signed-off-by: Mauro Carvalho Chehab --- MAINTAINERS | 3 + scripts/arm_processor_error.py | 377 ++++++++++++++++++ scripts/ghes_inject.py | 51 +++ scripts/qmp_helper.py | 702 +++++++++++++++++++++++++++++++++ 4 files changed, 1133 insertions(+) create mode 100644 scripts/arm_processor_error.py create mode 100755 scripts/ghes_inject.py create mode 100644 scripts/qmp_helper.py diff --git a/MAINTAINERS b/MAINTAINERS index 1d8091818899..249ed2858198 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2083,6 +2083,9 @@ S: Maintained F: hw/arm/ghes_cper.c F: hw/acpi/ghes_cper_stub.c F: qapi/acpi-hest.json +F: scripts/ghes_inject.py +F: scripts/arm_processor_error.py +F: scripts/qmp_helper.py =20 ppc4xx L: qemu-ppc@nongnu.org diff --git a/scripts/arm_processor_error.py b/scripts/arm_processor_error.py new file mode 100644 index 000000000000..62e0c5662232 --- /dev/null +++ b/scripts/arm_processor_error.py @@ -0,0 +1,377 @@ +#!/usr/bin/env python3 +# +# pylint: disable=3DC0301,C0114,R0903,R0912,R0913,R0914,R0915,W0511 +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2024 Mauro Carvalho Chehab + +# TODO: current implementation has dummy defaults. +# +# For a better implementation, a QMP addition/call is needed to +# retrieve some data for ARM Processor Error injection: +# +# - ARM registers: power_state, mpidr. + +import argparse +import re + +from qmp_helper import qmp, util, cper_guid + +class ArmProcessorEinj: + """ + Implements ARM Processor Error injection via GHES + """ + + DESC =3D """ + Generates an ARM processor error CPER, compatible with + UEFI 2.9A Errata. + """ + + ACPI_GHES_ARM_CPER_LENGTH =3D 40 + ACPI_GHES_ARM_CPER_PEI_LENGTH =3D 32 + + # Context types + CONTEXT_AARCH32_EL1 =3D 1 + CONTEXT_AARCH64_EL1 =3D 5 + CONTEXT_MISC_REG =3D 8 + + def __init__(self, subparsers): + """Initialize the error injection class and add subparser""" + + # Valid choice values + self.arm_valid_bits =3D { + "mpidr": util.bit(0), + "affinity": util.bit(1), + "running": util.bit(2), + "vendor": util.bit(3), + } + + self.pei_flags =3D { + "first": util.bit(0), + "last": util.bit(1), + "propagated": util.bit(2), + "overflow": util.bit(3), + } + + self.pei_error_types =3D { + "cache": util.bit(1), + "tlb": util.bit(2), + "bus": util.bit(3), + "micro-arch": util.bit(4), + } + + self.pei_valid_bits =3D { + "multiple-error": util.bit(0), + "flags": util.bit(1), + "error-info": util.bit(2), + "virt-addr": util.bit(3), + "phy-addr": util.bit(4), + } + + self.data =3D bytearray() + + parser =3D subparsers.add_parser("arm", description=3Dself.DESC) + + arm_valid_bits =3D ",".join(self.arm_valid_bits.keys()) + flags =3D ",".join(self.pei_flags.keys()) + error_types =3D ",".join(self.pei_error_types.keys()) + pei_valid_bits =3D ",".join(self.pei_valid_bits.keys()) + + # UEFI N.16 ARM Validation bits + g_arm =3D parser.add_argument_group("ARM processor") + g_arm.add_argument("--arm", "--arm-valid", + help=3Df"ARM valid bits: {arm_valid_bits}") + g_arm.add_argument("-a", "--affinity", "--level", "--affinity-lev= el", + type=3Dlambda x: int(x, 0), + help=3D"Affinity level (when multiple levels ap= ply)") + g_arm.add_argument("-l", "--mpidr", type=3Dlambda x: int(x, 0), + help=3D"Multiprocessor Affinity Register") + g_arm.add_argument("-i", "--midr", type=3Dlambda x: int(x, 0), + help=3D"Main ID Register") + g_arm.add_argument("-r", "--running", + action=3Dargparse.BooleanOptionalAction, + default=3DNone, + help=3D"Indicates if the processor is running o= r not") + g_arm.add_argument("--psci", "--psci-state", + type=3Dlambda x: int(x, 0), + help=3D"Power State Coordination Interface - PS= CI state") + + # TODO: Add vendor-specific support + + # UEFI N.17 bitmaps (type and flags) + g_pei =3D parser.add_argument_group("ARM Processor Error Info (PEI= )") + g_pei.add_argument("-t", "--type", nargs=3D"+", + help=3Df"one or more error types: {error_types}") + g_pei.add_argument("-f", "--flags", nargs=3D"*", + help=3Df"zero or more error flags: {flags}") + g_pei.add_argument("-V", "--pei-valid", "--error-valid", nargs=3D"= *", + help=3Df"zero or more PEI valid bits: {pei_valid_b= its}") + + # UEFI N.17 Integer values + g_pei.add_argument("-m", "--multiple-error", nargs=3D"+", + help=3D"Number of errors: 0: Single error, 1: Mult= iple errors, 2-65535: Error count if known") + g_pei.add_argument("-e", "--error-info", nargs=3D"+", + help=3D"Error information (UEFI 2.10 tables N.18 t= o N.20)") + g_pei.add_argument("-p", "--physical-address", nargs=3D"+", + help=3D"Physical address") + g_pei.add_argument("-v", "--virtual-address", nargs=3D"+", + help=3D"Virtual address") + + # UEFI N.21 Context + g_ctx =3D parser.add_argument_group("Processor Context") + g_ctx.add_argument("--ctx-type", "--context-type", nargs=3D"*", + help=3D"Type of the context (0=3DARM32 GPR, 5=3DAR= M64 EL1, other values supported)") + g_ctx.add_argument("--ctx-size", "--context-size", nargs=3D"*", + help=3D"Minimal size of the context") + g_ctx.add_argument("--ctx-array", "--context-array", nargs=3D"*", + help=3D"Comma-separated arrays for each context") + + # Vendor-specific data + g_vendor =3D parser.add_argument_group("Vendor-specific data") + g_vendor.add_argument("--vendor", "--vendor-specific", nargs=3D"+", + help=3D"Vendor-specific byte arrays of data") + + # Add arguments for Generic Error Data + qmp.argparse(parser) + + parser.set_defaults(func=3Dself.send_cper) + + def send_cper(self, args): + """Parse subcommand arguments and send a CPER via QMP""" + + qmp_cmd =3D qmp(args.host, args.port, args.debug) + + # Handle Generic Error Data arguments if any + qmp_cmd.set_args(args) + + is_cpu_type =3D re.compile(r"^([\w+]+\-)?arm\-cpu$") + cpus =3D qmp_cmd.search_qom("/machine/unattached/device", + "type", is_cpu_type) + + cper =3D {} + pei =3D {} + ctx =3D {} + vendor =3D {} + + arg =3D vars(args) + + # Handle global parameters + if args.arm: + arm_valid_init =3D False + cper["valid"] =3D util.get_choice(name=3D"valid", + value=3Dargs.arm, + choices=3Dself.arm_valid_bits, + suffixes=3D["-error", "-err"]) + else: + cper["valid"] =3D 0 + arm_valid_init =3D True + + if "running" in arg: + if args.running: + cper["running-state"] =3D util.bit(0) + else: + cper["running-state"] =3D 0 + else: + cper["running-state"] =3D 0 + + if arm_valid_init: + if args.affinity: + cper["valid"] |=3D self.arm_valid_bits["affinity"] + + if args.mpidr: + cper["valid"] |=3D self.arm_valid_bits["mpidr"] + + if "running-state" in cper: + cper["valid"] |=3D self.arm_valid_bits["running"] + + if args.psci: + cper["valid"] |=3D self.arm_valid_bits["running"] + + # Handle PEI + if not args.type: + args.type =3D ["cache-error"] + + util.get_mult_choices( + pei, + name=3D"valid", + values=3Dargs.pei_valid, + choices=3Dself.pei_valid_bits, + suffixes=3D["-valid", "--addr"], + ) + util.get_mult_choices( + pei, + name=3D"type", + values=3Dargs.type, + choices=3Dself.pei_error_types, + suffixes=3D["-error", "-err"], + ) + util.get_mult_choices( + pei, + name=3D"flags", + values=3Dargs.flags, + choices=3Dself.pei_flags, + suffixes=3D["-error", "-cap"], + ) + util.get_mult_int(pei, "error-info", args.error_info) + util.get_mult_int(pei, "multiple-error", args.multiple_error) + util.get_mult_int(pei, "phy-addr", args.physical_address) + util.get_mult_int(pei, "virt-addr", args.virtual_address) + + # Handle context + util.get_mult_int(ctx, "type", args.ctx_type, allow_zero=3DTrue) + util.get_mult_int(ctx, "minimal-size", args.ctx_size, allow_zero= =3DTrue) + util.get_mult_array(ctx, "register", args.ctx_array, allow_zero=3D= True) + + util.get_mult_array(vendor, "bytes", args.vendor, max_val=3D255) + + # Store PEI + pei_data =3D bytearray() + default_flags =3D self.pei_flags["first"] + default_flags |=3D self.pei_flags["last"] + + error_info_num =3D 0 + + for i, p in pei.items(): # pylint: disable=3DW0612 + error_info_num +=3D 1 + + # UEFI 2.10 doesn't define how to encode error information + # when multiple types are raised. So, provide a default only + # if a single type is there + if "error-info" not in p: + if p["type"] =3D=3D util.bit(1): + p["error-info"] =3D 0x0091000F + if p["type"] =3D=3D util.bit(2): + p["error-info"] =3D 0x0054007F + if p["type"] =3D=3D util.bit(3): + p["error-info"] =3D 0x80D6460FFF + if p["type"] =3D=3D util.bit(4): + p["error-info"] =3D 0x78DA03FF + + if "valid" not in p: + p["valid"] =3D 0 + if "multiple-error" in p: + p["valid"] |=3D self.pei_valid_bits["multiple-error"] + + if "flags" in p: + p["valid"] |=3D self.pei_valid_bits["flags"] + + if "error-info" in p: + p["valid"] |=3D self.pei_valid_bits["error-info"] + + if "phy-addr" in p: + p["valid"] |=3D self.pei_valid_bits["phy-addr"] + + if "virt-addr" in p: + p["valid"] |=3D self.pei_valid_bits["virt-addr"] + + # Version + util.data_add(pei_data, 0, 1) + + util.data_add(pei_data, + self.ACPI_GHES_ARM_CPER_PEI_LENGTH, 1) + + util.data_add(pei_data, p["valid"], 2) + util.data_add(pei_data, p["type"], 1) + util.data_add(pei_data, p.get("multiple-error", 1), 2) + util.data_add(pei_data, p.get("flags", default_flags), 1) + util.data_add(pei_data, p.get("error-info", 0), 8) + util.data_add(pei_data, p.get("virt-addr", 0xDEADBEEF), 8) + util.data_add(pei_data, p.get("phy-addr", 0xABBA0BAD), 8) + + # Store Context + ctx_data =3D bytearray() + context_info_num =3D 0 + + if ctx: + ret =3D qmp_cmd.send_cmd("query-target", may_open=3DTrue) + + default_ctx =3D self.CONTEXT_MISC_REG + + if "arch" in ret: + if ret["arch"] =3D=3D "aarch64": + default_ctx =3D self.CONTEXT_AARCH64_EL1 + elif ret["arch"] =3D=3D "arm": + default_ctx =3D self.CONTEXT_AARCH32_EL1 + + for k in sorted(ctx.keys()): + context_info_num +=3D 1 + + if "type" not in ctx[k]: + ctx[k]["type"] =3D default_ctx + + if "register" not in ctx[k]: + ctx[k]["register"] =3D [] + + reg_size =3D len(ctx[k]["register"]) + size =3D 0 + + if "minimal-size" in ctx: + size =3D ctx[k]["minimal-size"] + + size =3D max(size, reg_size) + + size =3D (size + 1) % 0xFFFE + + # Version + util.data_add(ctx_data, 0, 2) + + util.data_add(ctx_data, ctx[k]["type"], 2) + + util.data_add(ctx_data, 8 * size, 4) + + for r in ctx[k]["register"]: + util.data_add(ctx_data, r, 8) + + for i in range(reg_size, size): # pylint: disable=3DW0612 + util.data_add(ctx_data, 0, 8) + + # Vendor-specific bytes are not grouped + vendor_data =3D bytearray() + if vendor: + for k in sorted(vendor.keys()): + for b in vendor[k]["bytes"]: + util.data_add(vendor_data, b, 1) + + # Encode ARM Processor Error + data =3D bytearray() + + util.data_add(data, cper["valid"], 4) + + util.data_add(data, error_info_num, 2) + util.data_add(data, context_info_num, 2) + + # Calculate the length of the CPER data + cper_length =3D self.ACPI_GHES_ARM_CPER_LENGTH + cper_length +=3D len(pei_data) + cper_length +=3D len(vendor_data) + cper_length +=3D len(ctx_data) + util.data_add(data, cper_length, 4) + + util.data_add(data, arg.get("affinity-level", 0), 1) + + # Reserved + util.data_add(data, 0, 3) + + if "midr-el1" not in arg: + if cpus: + cmd_arg =3D { + 'path': cpus[0], + 'property': "midr" + } + ret =3D qmp_cmd.send_cmd("qom-get", cmd_arg, may_open=3DTr= ue) + if isinstance(ret, int): + arg["midr-el1"] =3D ret + + util.data_add(data, arg.get("mpidr-el1", 0), 8) + util.data_add(data, arg.get("midr-el1", 0), 8) + util.data_add(data, cper["running-state"], 4) + util.data_add(data, arg.get("psci-state", 0), 4) + + # Add PEI + data.extend(pei_data) + data.extend(ctx_data) + data.extend(vendor_data) + + self.data =3D data + + qmp_cmd.send_cper(cper_guid.CPER_PROC_ARM, self.data) diff --git a/scripts/ghes_inject.py b/scripts/ghes_inject.py new file mode 100755 index 000000000000..67cb6077bec8 --- /dev/null +++ b/scripts/ghes_inject.py @@ -0,0 +1,51 @@ +#!/usr/bin/env python3 +# +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2024 Mauro Carvalho Chehab + +""" +Handle ACPI GHESv2 error injection logic QEMU QMP interface. +""" + +import argparse +import sys + +from arm_processor_error import ArmProcessorEinj + +EINJ_DESC =3D """ +Handle ACPI GHESv2 error injection logic QEMU QMP interface. + +It allows using UEFI BIOS EINJ features to generate GHES records. + +It helps testing CPER and GHES drivers at the guest OS and how +userspace applications at the guest handle them. +""" + +def main(): + """Main program""" + + # Main parser - handle generic args like QEMU QMP TCP socket options + parser =3D argparse.ArgumentParser(formatter_class=3Dargparse.Argument= DefaultsHelpFormatter, + usage=3D"%(prog)s [options]", + description=3DEINJ_DESC) + + g_options =3D parser.add_argument_group("QEMU QMP socket options") + g_options.add_argument("-H", "--host", default=3D"localhost", type=3Ds= tr, + help=3D"host name") + g_options.add_argument("-P", "--port", default=3D4445, type=3Dint, + help=3D"TCP port number") + g_options.add_argument('-d', '--debug', action=3D'store_true') + + subparsers =3D parser.add_subparsers() + + ArmProcessorEinj(subparsers) + + args =3D parser.parse_args() + if "func" in args: + args.func(args) + else: + sys.exit(f"Please specify a valid command for {sys.argv[0]}") + +if __name__ =3D=3D "__main__": + main() diff --git a/scripts/qmp_helper.py b/scripts/qmp_helper.py new file mode 100644 index 000000000000..348db9275c36 --- /dev/null +++ b/scripts/qmp_helper.py @@ -0,0 +1,702 @@ +#!/usr/bin/env python3 +# +# # pylint: disable=3DC0103,E0213,E1135,E1136,E1137,R0902,R0903,R0912,R0913 +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2024 Mauro Carvalho Chehab + +""" +Helper classes to be used by ghes_inject command classes. +""" + +import json +import sys + +from datetime import datetime +from os import path as os_path + +try: + qemu_dir =3D os_path.abspath(os_path.dirname(os_path.dirname(__file__)= )) + sys.path.append(os_path.join(qemu_dir, 'python')) + + from qemu.qmp.legacy import QEMUMonitorProtocol + +except ModuleNotFoundError as exc: + print(f"Module '{exc.name}' not found.") + print("Try export PYTHONPATH=3Dtop-qemu-dir/python or run from top-qem= u-dir") + sys.exit(1) + +from base64 import b64encode + +class util: + """ + Ancillary functions to deal with bitmaps, parse arguments, + generate GUID and encode data on a bytearray buffer. + """ + + # + # Helper routines to handle multiple choice arguments + # + def get_choice(name, value, choices, suffixes=3DNone, bitmask=3DTrue): + """Produce a list from multiple choice argument""" + + new_values =3D 0 + + if not value: + return new_values + + for val in value.split(","): + val =3D val.lower() + + if suffixes: + for suffix in suffixes: + val =3D val.removesuffix(suffix) + + if val not in choices.keys(): + if suffixes: + for suffix in suffixes: + if val + suffix in choices.keys(): + val +=3D suffix + break + + if val not in choices.keys(): + sys.exit(f"Error on '{name}': choice '{val}' is invalid.") + + val =3D choices[val] + + if bitmask: + new_values |=3D val + else: + if new_values: + sys.exit(f"Error on '{name}': only one value is accept= ed.") + + new_values =3D val + + return new_values + + def get_array(name, values, max_val=3DNone): + """Add numbered hashes from integer lists into an array""" + + array =3D [] + + for value in values: + for val in value.split(","): + try: + val =3D int(val, 0) + except ValueError: + sys.exit(f"Error on '{name}': {val} is not an integer") + + if val < 0: + sys.exit(f"Error on '{name}': {val} is not unsigned") + + if max_val and val > max_val: + sys.exit(f"Error on '{name}': {val} is too little") + + array.append(val) + + return array + + def get_mult_array(mult, name, values, allow_zero=3DFalse, max_val=3DN= one): + """Add numbered hashes from integer lists""" + + if not allow_zero: + if not values: + return + else: + if values is None: + return + + if not values: + i =3D 0 + if i not in mult: + mult[i] =3D {} + + mult[i][name] =3D [] + return + + i =3D 0 + for value in values: + for val in value.split(","): + try: + val =3D int(val, 0) + except ValueError: + sys.exit(f"Error on '{name}': {val} is not an integer") + + if val < 0: + sys.exit(f"Error on '{name}': {val} is not unsigned") + + if max_val and val > max_val: + sys.exit(f"Error on '{name}': {val} is too little") + + if i not in mult: + mult[i] =3D {} + + if name not in mult[i]: + mult[i][name] =3D [] + + mult[i][name].append(val) + + i +=3D 1 + + + def get_mult_choices(mult, name, values, choices, + suffixes=3DNone, allow_zero=3DFalse): + """Add numbered hashes from multiple choice arguments""" + + if not allow_zero: + if not values: + return + else: + if values is None: + return + + i =3D 0 + for val in values: + new_values =3D util.get_choice(name, val, choices, suffixes) + + if i not in mult: + mult[i] =3D {} + + mult[i][name] =3D new_values + i +=3D 1 + + + def get_mult_int(mult, name, values, allow_zero=3DFalse): + """Add numbered hashes from integer arguments""" + if not allow_zero: + if not values: + return + else: + if values is None: + return + + i =3D 0 + for val in values: + try: + val =3D int(val, 0) + except ValueError: + sys.exit(f"Error on '{name}': {val} is not an integer") + + if val < 0: + sys.exit(f"Error on '{name}': {val} is not unsigned") + + if i not in mult: + mult[i] =3D {} + + mult[i][name] =3D val + i +=3D 1 + + + # + # Data encode helper functions + # + def bit(b): + """Simple macro to define a bit on a bitmask""" + return 1 << b + + + def data_add(data, value, num_bytes): + """Adds bytes from value inside a bitarray""" + + data.extend(value.to_bytes(num_bytes, byteorder=3D"little")) # py= lint: disable=3DE1101 + + def dump_bytearray(name, data): + """Does an hexdump of a byte array, grouping in bytes""" + + print(f"{name} ({len(data)} bytes):") + + for ln_start in range(0, len(data), 16): + ln_end =3D min(ln_start + 16, len(data)) + print(f" {ln_start:08x} ", end=3D"") + for i in range(ln_start, ln_end): + print(f"{data[i]:02x} ", end=3D"") + for i in range(ln_end, ln_start + 16): + print(" ", end=3D"") + print(" ", end=3D"") + for i in range(ln_start, ln_end): + if data[i] >=3D 32 and data[i] < 127: + print(chr(data[i]), end=3D"") + else: + print(".", end=3D"") + + print() + print() + + def time(string): + """Handle BCD timestamps used on Generic Error Data Block""" + + time =3D None + + # Formats to be used when parsing time stamps + formats =3D [ + "%Y-%m-%d %H:%M:%S", + ] + + if string =3D=3D "now": + time =3D datetime.now() + + if time is None: + for fmt in formats: + try: + time =3D datetime.strptime(string, fmt) + break + except ValueError: + pass + + if time is None: + raise ValueError("Invalid time format") + + return time + +class guid: + """ + Simple class to handle GUID fields. + """ + + def __init__(self, time_low, time_mid, time_high, nodes): + """Initialize a GUID value""" + + assert len(nodes) =3D=3D 8 + + self.time_low =3D time_low + self.time_mid =3D time_mid + self.time_high =3D time_high + self.nodes =3D nodes + + @classmethod + def UUID(cls, guid_str): + """Initialize a GUID using a string on its standard format""" + + if len(guid_str) !=3D 36: + print("Size not 36") + raise ValueError('Invalid GUID size') + + # It is easier to parse without separators. So, drop them + guid_str =3D guid_str.replace('-', '') + + if len(guid_str) !=3D 32: + print("Size not 32", guid_str, len(guid_str)) + raise ValueError('Invalid GUID hex size') + + time_low =3D 0 + time_mid =3D 0 + time_high =3D 0 + nodes =3D [] + + for i in reversed(range(16, 32, 2)): + h =3D guid_str[i:i + 2] + value =3D int(h, 16) + nodes.insert(0, value) + + time_high =3D int(guid_str[12:16], 16) + time_mid =3D int(guid_str[8:12], 16) + time_low =3D int(guid_str[0:8], 16) + + return cls(time_low, time_mid, time_high, nodes) + + def __str__(self): + """Output a GUID value on its default string representation""" + + clock =3D self.nodes[0] << 8 | self.nodes[1] + + node =3D 0 + for i in range(2, len(self.nodes)): + node =3D node << 8 | self.nodes[i] + + s =3D f"{self.time_low:08x}-{self.time_mid:04x}-" + s +=3D f"{self.time_high:04x}-{clock:04x}-{node:012x}" + return s + + def to_bytes(self): + """Output a GUID value in bytes""" + + data =3D bytearray() + + util.data_add(data, self.time_low, 4) + util.data_add(data, self.time_mid, 2) + util.data_add(data, self.time_high, 2) + data.extend(bytearray(self.nodes)) + + return data + +class qmp: + """ + Opens a connection and send/receive QMP commands. + """ + + def send_cmd(self, command, args=3DNone, may_open=3DFalse, return_erro= r=3DTrue): + """Send a command to QMP, optinally opening a connection""" + + if may_open: + self._connect() + elif not self.connected: + return False + + msg =3D { 'execute': command } + if args: + msg['arguments'] =3D args + + try: + obj =3D self.qmp_monitor.cmd_obj(msg) + # Can we use some other exception class here? + except Exception as e: # pylint: disable= =3DW0718 + print(f"Command: {command}") + print(f"Failed to inject error: {e}.") + return None + + if "return" in obj: + if isinstance(obj.get("return"), dict): + if obj["return"]: + return obj["return"] + return "OK" + + return obj["return"] + + if isinstance(obj.get("error"), dict): + error =3D obj["error"] + if return_error: + print(f"Command: {msg}") + print(f'{error["class"]}: {error["desc"]}') + else: + print(json.dumps(obj)) + + return None + + def _close(self): + """Shutdown and close the socket, if opened""" + if not self.connected: + return + + self.qmp_monitor.close() + self.connected =3D False + + def _connect(self): + """Connect to a QMP TCP/IP port, if not connected yet""" + + if self.connected: + return True + + try: + self.qmp_monitor.connect(negotiate=3DTrue) + except ConnectionError: + sys.exit(f"Can't connect to QMP host {self.host}:{self.port}") + + self.connected =3D True + + return True + + BLOCK_STATUS_BITS =3D { + "uncorrectable": util.bit(0), + "correctable": util.bit(1), + "multi-uncorrectable": util.bit(2), + "multi-correctable": util.bit(3), + } + + ERROR_SEVERITY =3D { + "recoverable": 0, + "fatal": 1, + "corrected": 2, + "none": 3, + } + + VALIDATION_BITS =3D { + "fru-id": util.bit(0), + "fru-text": util.bit(1), + "timestamp": util.bit(2), + } + + GEDB_FLAGS_BITS =3D { + "recovered": util.bit(0), + "prev-error": util.bit(1), + "simulated": util.bit(2), + } + + GENERIC_DATA_SIZE =3D 72 + + def argparse(parser): + """Prepare a parser group to query generic error data""" + + block_status_bits =3D ",".join(qmp.BLOCK_STATUS_BITS.keys()) + error_severity_enum =3D ",".join(qmp.ERROR_SEVERITY.keys()) + validation_bits =3D ",".join(qmp.VALIDATION_BITS.keys()) + gedb_flags_bits =3D ",".join(qmp.GEDB_FLAGS_BITS.keys()) + + g_gen =3D parser.add_argument_group("Generic Error Data") # pylin= t: disable=3DE1101 + g_gen.add_argument("--block-status", + help=3Df"block status bits: {block_status_bits}= ") + g_gen.add_argument("--raw-data", nargs=3D"+", + help=3D"Raw data inside the Error Status Block") + g_gen.add_argument("--error-severity", "--severity", + help=3Df"error severity: {error_severity_enum}") + g_gen.add_argument("--gen-err-valid-bits", + "--generic-error-validation-bits", + help=3Df"validation bits: {validation_bits}") + g_gen.add_argument("--fru-id", type=3Dguid.UUID, + help=3D"GUID representing a physical device") + g_gen.add_argument("--fru-text", + help=3D"ASCII string identifying the FRU hardwa= re") + g_gen.add_argument("--timestamp", type=3Dutil.time, + help=3D"Time when the error info was collected") + g_gen.add_argument("--precise", "--precise-timestamp", + action=3D'store_true', + help=3D"Marks the timestamp as precise if --tim= estamp is used") + g_gen.add_argument("--gedb-flags", + help=3Df"General Error Data Block flags: {gedb_= flags_bits}") + + def set_args(self, args): + """Set the arguments optionally defined via self.argparse()""" + + if args.block_status: + self.block_status =3D util.get_choice(name=3D"block-status", + value=3Dargs.block_status, + choices=3Dself.BLOCK_STATU= S_BITS, + bitmask=3DFalse) + if args.raw_data: + self.raw_data =3D util.get_array("raw-data", args.raw_data, + max_val=3D255) + print(self.raw_data) + + if args.error_severity: + self.error_severity =3D util.get_choice(name=3D"error-severity= ", + value=3Dargs.error_sever= ity, + choices=3Dself.ERROR_SEV= ERITY, + bitmask=3DFalse) + + if args.fru_id: + self.fru_id =3D args.fru_id.to_bytes() + if not args.gen_err_valid_bits: + self.validation_bits |=3D self.VALIDATION_BITS["fru-id"] + + if args.fru_text: + text =3D bytearray(args.fru_text.encode('ascii')) + if len(text) > 20: + sys.exit("FRU text is too big to fit") + + self.fru_text =3D text + if not args.gen_err_valid_bits: + self.validation_bits |=3D self.VALIDATION_BITS["fru-text"] + + if args.timestamp: + time =3D args.timestamp + century =3D int(time.year / 100) + + bcd =3D bytearray() + util.data_add(bcd, (time.second // 10) << 4 | (time.second % 1= 0), 1) + util.data_add(bcd, (time.minute // 10) << 4 | (time.minute % 1= 0), 1) + util.data_add(bcd, (time.hour // 10) << 4 | (time.hour % 10), = 1) + + if args.precise: + util.data_add(bcd, 1, 1) + else: + util.data_add(bcd, 0, 1) + + util.data_add(bcd, (time.day // 10) << 4 | (time.day % 10), 1) + util.data_add(bcd, (time.month // 10) << 4 | (time.month % 10)= , 1) + util.data_add(bcd, + ((time.year % 100) // 10) << 4 | (time.year % 10= ), 1) + util.data_add(bcd, ((century % 100) // 10) << 4 | (century % 1= 0), 1) + + self.timestamp =3D bcd + if not args.gen_err_valid_bits: + self.validation_bits |=3D self.VALIDATION_BITS["timestamp"] + + if args.gen_err_valid_bits: + self.validation_bits =3D util.get_choice(name=3D"validation", + value=3Dargs.gen_err_va= lid_bits, + choices=3Dself.VALIDATI= ON_BITS) + + def __init__(self, host, port, debug=3DFalse): + """Initialize variables used by the QMP send logic""" + + self.connected =3D False + self.host =3D host + self.port =3D port + self.debug =3D debug + + # ACPI 6.1: 18.3.2.7.1 Generic Error Data: Generic Error Status Bl= ock + self.block_status =3D self.BLOCK_STATUS_BITS["uncorrectable"] + self.raw_data =3D [] + self.error_severity =3D self.ERROR_SEVERITY["recoverable"] + + # ACPI 6.1: 18.3.2.7.1 Generic Error Data: Generic Error Data Entry + self.validation_bits =3D 0 + self.flags =3D 0 + self.fru_id =3D bytearray(16) + self.fru_text =3D bytearray(20) + self.timestamp =3D bytearray(8) + + self.qmp_monitor =3D QEMUMonitorProtocol(address=3D(self.host, sel= f.port)) + + # + # Socket QMP send command + # + def send_cper_raw(self, cper_data): + """Send a raw CPER data to QEMU though QMP TCP socket""" + + data =3D b64encode(bytes(cper_data)).decode('ascii') + + cmd_arg =3D { + 'cper': data + } + + self._connect() + + if self.send_cmd("ghes-cper", cmd_arg): + print("Error injected.") + + def send_cper(self, notif_type, payload): + """Send commands to QEMU though QMP TCP socket""" + + # Fill CPER record header + + # NOTE: bits 4 to 13 of block status contain the number of + # data entries in the data section. This is currently unsupported. + + cper_length =3D len(payload) + data_length =3D cper_length + len(self.raw_data) + self.GENERIC_DA= TA_SIZE + + # Generic Error Data Entry + gede =3D bytearray() + + gede.extend(notif_type.to_bytes()) + util.data_add(gede, self.error_severity, 4) + util.data_add(gede, 0x300, 2) + util.data_add(gede, self.validation_bits, 1) + util.data_add(gede, self.flags, 1) + util.data_add(gede, cper_length, 4) + gede.extend(self.fru_id) + gede.extend(self.fru_text) + gede.extend(self.timestamp) + + # Generic Error Status Block + gebs =3D bytearray() + + if self.raw_data: + raw_data_offset =3D len(gebs) + else: + raw_data_offset =3D 0 + + util.data_add(gebs, self.block_status, 4) + util.data_add(gebs, raw_data_offset, 4) + util.data_add(gebs, len(self.raw_data), 4) + util.data_add(gebs, data_length, 4) + util.data_add(gebs, self.error_severity, 4) + + cper_data =3D bytearray() + cper_data.extend(gebs) + cper_data.extend(gede) + cper_data.extend(bytearray(self.raw_data)) + cper_data.extend(bytearray(payload)) + + if self.debug: + print(f"GUID: {notif_type}") + + util.dump_bytearray("Generic Error Status Block", gebs) + util.dump_bytearray("Generic Error Data Entry", gede) + + if self.raw_data: + util.dump_bytearray("Raw data", bytearray(self.raw_data)) + + util.dump_bytearray("Payload", payload) + + self.send_cper_raw(cper_data) + + + def search_qom(self, path, prop, regex): + """ + Return a list of devices that match path array like: + + /machine/unattached/device + /machine/peripheral-anon/device + ... + """ + + found =3D [] + + i =3D 0 + while 1: + dev =3D f"{path}[{i}]" + args =3D { + 'path': dev, + 'property': prop + } + ret =3D self.send_cmd("qom-get", args, may_open=3DTrue, return= _error=3DFalse) + if not ret: + break + + if isinstance(ret, str): + if regex.search(ret): + found.append(dev) + + i +=3D 1 + if i > 10000: + print("Too many objects returned by qom-get!") + break + + return found + +class cper_guid: + """ + Contains CPER GUID, as per: + https://uefi.org/specs/UEFI/2.10/Apx_N_Common_Platform_Error_Record.ht= ml + """ + + CPER_PROC_GENERIC =3D guid(0x9876CCAD, 0x47B4, 0x4bdb, + [0xB6, 0x5E, 0x16, 0xF1, + 0x93, 0xC4, 0xF3, 0xDB]) + + CPER_PROC_X86 =3D guid(0xDC3EA0B0, 0xA144, 0x4797, + [0xB9, 0x5B, 0x53, 0xFA, + 0x24, 0x2B, 0x6E, 0x1D]) + + CPER_PROC_ITANIUM =3D guid(0xe429faf1, 0x3cb7, 0x11d4, + [0xbc, 0xa7, 0x00, 0x80, + 0xc7, 0x3c, 0x88, 0x81]) + + CPER_PROC_ARM =3D guid(0xE19E3D16, 0xBC11, 0x11E4, + [0x9C, 0xAA, 0xC2, 0x05, + 0x1D, 0x5D, 0x46, 0xB0]) + + CPER_PLATFORM_MEM =3D guid(0xA5BC1114, 0x6F64, 0x4EDE, + [0xB8, 0x63, 0x3E, 0x83, + 0xED, 0x7C, 0x83, 0xB1]) + + CPER_PLATFORM_MEM2 =3D guid(0x61EC04FC, 0x48E6, 0xD813, + [0x25, 0xC9, 0x8D, 0xAA, + 0x44, 0x75, 0x0B, 0x12]) + + CPER_PCIE =3D guid(0xD995E954, 0xBBC1, 0x430F, + [0xAD, 0x91, 0xB4, 0x4D, + 0xCB, 0x3C, 0x6F, 0x35]) + + CPER_PCI_BUS =3D guid(0xC5753963, 0x3B84, 0x4095, + [0xBF, 0x78, 0xED, 0xDA, + 0xD3, 0xF9, 0xC9, 0xDD]) + + CPER_PCI_DEV =3D guid(0xEB5E4685, 0xCA66, 0x4769, + [0xB6, 0xA2, 0x26, 0x06, + 0x8B, 0x00, 0x13, 0x26]) + + CPER_FW_ERROR =3D guid(0x81212A96, 0x09ED, 0x4996, + [0x94, 0x71, 0x8D, 0x72, + 0x9C, 0x8E, 0x69, 0xED]) + + CPER_DMA_GENERIC =3D guid(0x5B51FEF7, 0xC79D, 0x4434, + [0x8F, 0x1B, 0xAA, 0x62, + 0xDE, 0x3E, 0x2C, 0x64]) + + CPER_DMA_VT =3D guid(0x71761D37, 0x32B2, 0x45cd, + [0xA7, 0xD0, 0xB0, 0xFE, + 0xDD, 0x93, 0xE8, 0xCF]) + + CPER_DMA_IOMMU =3D guid(0x036F84E1, 0x7F37, 0x428c, + [0xA7, 0x9E, 0x57, 0x5F, + 0xDF, 0xAA, 0x84, 0xEC]) + + CPER_CCIX_PER =3D guid(0x91335EF6, 0xEBFB, 0x4478, + [0xA6, 0xA6, 0x88, 0xB7, + 0x28, 0xCF, 0x75, 0xD7]) + + CPER_CXL_PROT_ERR =3D guid(0x80B9EFB4, 0x52B5, 0x4DE3, + [0xA7, 0x77, 0x68, 0x78, + 0x4B, 0x77, 0x10, 0x48]) --=20 2.46.0 From nobody Thu Nov 28 02:13:45 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB8DC1369BC for ; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="BQJq1HE1" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 717A9C4AF15; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723793873; bh=nFa18EP1VntHvi50soKrL++v7UfmRI3rSREy+WDR8ps=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BQJq1HE1XGM9SJjGfeUOBcsmlY9qq5GHcVd8J1W5Ovq6j5eayzm2mLF5yF0PFUJer P6hGOpC1x57m1IwdRwr1Dkhs8Z40Qhl2RCYM/lKwYnzBrVl/Z8hAEmFq/jERBYW044 eGBMwmLRotxuTOu27WXzEKYPbiFLZweoDszIcbhbrnr4+OFI+bPNI5O2xR0seEMpLb O6zPFNxneQ7VS4RNHw0txVk07newFQT/uBXEsrfFqiKmc6feRtimdsvsCJV3XFapCd srWhHMOVM2zjh6+v6cveD/5QsEVYQimUoxxR3CuLbqk6zm9GwBHd6ou8Pqre6+arkA xvrtxOV5FOqdQ== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1serWx-000000055ev-2oNH; Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , Peter Maydell , linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v8 10/13] target/arm: add an experimental mpidr arm cpu property object Date: Fri, 16 Aug 2024 09:37:42 +0200 Message-ID: <2e1c52c861bdb33b95334bb3598038a73426f5c6.1723793768.git.mchehab+huawei@kernel.org> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" Accurately injecting an ARM Processor error ACPI/APEI GHES error record requires the value of the ARM Multiprocessor Affinity Register (mpidr). While ARM implements it, this is currently not visible. Add a field at CPU storing it, and place it at arm_cpu_properties as experimental, thus allowing it to be queried via QMP using qom-get function. Signed-off-by: Mauro Carvalho Chehab --- target/arm/cpu.c | 1 + target/arm/cpu.h | 1 + target/arm/helper.c | 10 ++++++++-- 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 19191c239181..30fcf0a10f46 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2619,6 +2619,7 @@ static ObjectClass *arm_cpu_class_by_name(const char = *cpu_model) =20 static Property arm_cpu_properties[] =3D { DEFINE_PROP_UINT64("midr", ARMCPU, midr, 0), + DEFINE_PROP_UINT64("x-mpidr", ARMCPU, mpidr, 0), DEFINE_PROP_UINT64("mp-affinity", ARMCPU, mp_affinity, ARM64_AFFINITY_INVALID), DEFINE_PROP_INT32("node-id", ARMCPU, node_id, CPU_UNSET_NUMA_NODE_ID), diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 9a3fd595621f..3ad4de793409 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1033,6 +1033,7 @@ struct ArchCPU { uint64_t reset_pmcr_el0; } isar; uint64_t midr; + uint64_t mpidr; uint32_t revidr; uint32_t reset_fpsid; uint64_t ctr; diff --git a/target/arm/helper.c b/target/arm/helper.c index 0a582c1cd3b3..d6e7aa069489 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4690,7 +4690,7 @@ static uint64_t mpidr_read_val(CPUARMState *env) return mpidr; } =20 -static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri) +static uint64_t mpidr_read(CPUARMState *env) { unsigned int cur_el =3D arm_current_el(env); =20 @@ -4700,6 +4700,11 @@ static uint64_t mpidr_read(CPUARMState *env, const A= RMCPRegInfo *ri) return mpidr_read_val(env); } =20 +static uint64_t mpidr_read_ri(CPUARMState *env, const ARMCPRegInfo *ri) +{ + return mpidr_read(env); +} + static const ARMCPRegInfo lpae_cp_reginfo[] =3D { /* NOP AMAIR0/1 */ { .name =3D "AMAIR0", .state =3D ARM_CP_STATE_BOTH, @@ -9721,7 +9726,7 @@ void register_cp_regs_for_features(ARMCPU *cpu) { .name =3D "MPIDR_EL1", .state =3D ARM_CP_STATE_BOTH, .opc0 =3D 3, .crn =3D 0, .crm =3D 0, .opc1 =3D 0, .opc2 =3D = 5, .fgt =3D FGT_MPIDR_EL1, - .access =3D PL1_R, .readfn =3D mpidr_read, .type =3D ARM_CP_= NO_RAW }, + .access =3D PL1_R, .readfn =3D mpidr_read_ri, .type =3D ARM_= CP_NO_RAW }, }; #ifdef CONFIG_USER_ONLY static const ARMCPRegUserSpaceInfo mpidr_user_cp_reginfo[] =3D { @@ -9731,6 +9736,7 @@ void register_cp_regs_for_features(ARMCPU *cpu) modify_arm_cp_regs(mpidr_cp_reginfo, mpidr_user_cp_reginfo); #endif define_arm_cp_regs(cpu, mpidr_cp_reginfo); + cpu->mpidr =3D mpidr_read(env); } =20 if (arm_feature(env, ARM_FEATURE_AUXCR)) { --=20 2.46.0 From nobody Thu Nov 28 02:13:45 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6962137903 for ; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793874; cv=none; b=VWniRc4XhOYebjy2mAJeJY6rj3ivCSBvXki6Kr+LWtjP7hSSgY3ZZ2lvD+apMQMT8xxKzc84AdoRWR0+Oe9CX/C51Ut7xVwtseL+4jQJPm9FqAiOfW5uG699P4G7cl+gtOagD0MlnFLdAxVmQZeGGGsQd3FxE1XFJvJNmbwGCjI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793874; c=relaxed/simple; bh=1dC6qge5j6u0iMd7Y9iF2l9tSLTNhq/Z8HDaN5NFEKg=; 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Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , Cleber Rosa , John Snow , linux-kernel@vger.kernel.org, qemu-devel@nongnu.org Subject: [PATCH v8 11/13] scripts/arm_processor_error.py: retrieve mpidr if not filled Date: Fri, 16 Aug 2024 09:37:43 +0200 Message-ID: <9fab07e7af3efaae9546ab2c7b12b2482ba02da5.1723793768.git.mchehab+huawei@kernel.org> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" Add support to retrieve mpidr value via qom-get. Signed-off-by: Mauro Carvalho Chehab --- scripts/arm_processor_error.py | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/scripts/arm_processor_error.py b/scripts/arm_processor_error.py index 62e0c5662232..0a16d4f0d8b1 100644 --- a/scripts/arm_processor_error.py +++ b/scripts/arm_processor_error.py @@ -5,12 +5,10 @@ # # Copyright (C) 2024 Mauro Carvalho Chehab =20 -# TODO: current implementation has dummy defaults. -# -# For a better implementation, a QMP addition/call is needed to -# retrieve some data for ARM Processor Error injection: -# -# - ARM registers: power_state, mpidr. +# Note: currently it lacks a method to fill the ARM Processor Error CPER +# psci field from emulation. On a real hardware, this is filled only +# when a CPU is not running. Implementing support for it to simulate a +# real hardware is not trivial. =20 import argparse import re @@ -174,11 +172,24 @@ def send_cper(self, args): else: cper["running-state"] =3D 0 =20 + if args.mpidr: + cper["mpidr-el1"] =3D arg["mpidr"] + elif cpus: + cmd_arg =3D { + 'path': cpus[0], + 'property': "x-mpidr" + } + ret =3D qmp_cmd.send_cmd("qom-get", cmd_arg, may_open=3DTrue) + if isinstance(ret, int): + cper["mpidr-el1"] =3D ret + else: + cper["mpidr-el1"] =3D 0 + if arm_valid_init: if args.affinity: cper["valid"] |=3D self.arm_valid_bits["affinity"] =20 - if args.mpidr: + if "mpidr-el1" in cper: cper["valid"] |=3D self.arm_valid_bits["mpidr"] =20 if "running-state" in cper: @@ -362,7 +373,7 @@ def send_cper(self, args): if isinstance(ret, int): arg["midr-el1"] =3D ret =20 - util.data_add(data, arg.get("mpidr-el1", 0), 8) + util.data_add(data, cper["mpidr-el1"], 8) util.data_add(data, arg.get("midr-el1", 0), 8) util.data_add(data, cper["running-state"], 4) util.data_add(data, arg.get("psci-state", 0), 4) --=20 2.46.0 From nobody Thu Nov 28 02:13:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=kernel.org ARC-Seal: i=1; a=rsa-sha256; t=1723793896; cv=none; d=zohomail.com; s=zohoarc; b=nYbEQxoMuE56WVFVU3YK9j/GwYqUdr9Hia3dvWYG1izoEQ+GqgW8ZIgWfaPwyS/205hwrnXhcNuhyWHnEw13yarvhYaawiKytp0hOQs2qK0P0xqIEoCJqvOBuIsSmknLeGKoRl/P4CZTftHaTYGbzrYVUFWtrwQnmSsWyfc3UN8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1723793896; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:Message-Id:Reply-To:To; bh=puy9/q0FJeBZb0lxd9lCRNQ7oodRkvl1p/JyCRa3Pgo=; b=hreI2mevUZS6YG9Vx49OXosWV3ud2EBdzXAQ/EkoWdHMk1w5cC3QBfpU6eCKhO60UvDzODltz2W8jvOS0zRj5u9zQ9X/49TtwgPcP7umCNUr+PiDRtyHn+RbITwemRJcneQt92DUbUCztI/fJrCoDUazrvNpfxWaK/Yw3YxsrmY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1723793896879948.3944724800391; Fri, 16 Aug 2024 00:38:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1serX8-0006sa-N1; Fri, 16 Aug 2024 03:38:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1serX4-0006c4-UP; Fri, 16 Aug 2024 03:37:58 -0400 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1serX2-0005uJ-4T; Fri, 16 Aug 2024 03:37:58 -0400 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id D509B62110; Fri, 16 Aug 2024 07:37:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 99C56C4AF1B; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1serWx-000000055f3-31wS; Fri, 16 Aug 2024 09:37:51 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723793873; bh=/UrLD39uTtqzLQxF34eTLlBfA+BnxRQyD1jfJGYlCXg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bmr4TPJOs8R126ZTZujoL+kcn4vqs4uJF2xQupXLwWPFzrqf73Bc6iWDbnBEsEzPA 5Vn7z74PF+PHT8U9y9vhXVH+olR89WFT2N4yV0UptS7U4hBHn+Sif18rUMP8YHxuwP tMlvrX5tRlJ6NTjCPzfA80YIhvJZXihhEKsdHWZin/8oo/OUQ/U4PCkNF023/498Gp PTnhYX372f1bmpVv0z9OqhxR0NwEoFhCT36YVBSErUM3yvjRtoFut6N9kvHDsyJYkd hRxn9x+chujIKeIkBGiA60VOvsIyhRUevXnHAZnvOQNwPjXbhPxKifQWiDHMMyn1jv 21I5Y/d2caiGg== From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , "Michael S. Tsirkin" , Ani Sinha , Dongjiu Geng , Igor Mammedov , linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v8 12/13] acpi/ghes: cleanup generic error data logic Date: Fri, 16 Aug 2024 09:37:44 +0200 Message-ID: X-Mailer: git-send-email 2.46.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2604:1380:4641:c500::1; envelope-from=mchehab+huawei@kernel.org; helo=dfw.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.131, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1723793898754116600 Content-Type: text/plain; charset="utf-8" Remove comments that are obvious. No functional changes. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/ghes.c | 38 +++++++++++++++----------------------- 1 file changed, 15 insertions(+), 23 deletions(-) diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index 4f7b6c5ad2b6..a822a5eafaa0 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -130,34 +130,28 @@ static void build_ghes_hw_error_notification(GArray *= table, const uint8_t type) * ACPI 6.1: 18.3.2.7.1 Generic Error Data */ static void acpi_ghes_generic_error_data(GArray *table, - const uint8_t *section_type, uint32_t error_severity, - uint8_t validation_bits, uint8_t flags, - uint32_t error_data_length, QemuUUID fru_id, - uint64_t time_stamp) + const uint8_t *section_type, + uint32_t error_severity, + uint8_t validation_bits, + uint8_t flags, + uint32_t error_data_length, + QemuUUID fru_id, + uint64_t time_stamp) { const uint8_t fru_text[20] =3D {0}; =20 - /* Section Type */ g_array_append_vals(table, section_type, 16); - - /* Error Severity */ build_append_int_noprefix(table, error_severity, 4); + /* Revision */ build_append_int_noprefix(table, 0x300, 2); - /* Validation Bits */ + build_append_int_noprefix(table, validation_bits, 1); - /* Flags */ build_append_int_noprefix(table, flags, 1); - /* Error Data Length */ build_append_int_noprefix(table, error_data_length, 4); =20 - /* FRU Id */ g_array_append_vals(table, fru_id.data, ARRAY_SIZE(fru_id.data)); - - /* FRU Text */ g_array_append_vals(table, fru_text, sizeof(fru_text)); - - /* Timestamp */ build_append_int_noprefix(table, time_stamp, 8); } =20 @@ -165,19 +159,17 @@ static void acpi_ghes_generic_error_data(GArray *tabl= e, * Generic Error Status Block * ACPI 6.1: 18.3.2.7.1 Generic Error Data */ -static void acpi_ghes_generic_error_status(GArray *table, uint32_t block_s= tatus, - uint32_t raw_data_offset, uint32_t raw_data_length, - uint32_t data_length, uint32_t error_severity) +static void acpi_ghes_generic_error_status(GArray *table, + uint32_t block_status, + uint32_t raw_data_offset, + uint32_t raw_data_length, + uint32_t data_length, + uint32_t error_severity) { - /* Block Status */ build_append_int_noprefix(table, block_status, 4); - /* Raw Data Offset */ build_append_int_noprefix(table, raw_data_offset, 4); - /* Raw Data Length */ build_append_int_noprefix(table, raw_data_length, 4); - /* Data Length */ build_append_int_noprefix(table, data_length, 4); - /* Error Severity */ build_append_int_noprefix(table, error_severity, 4); } =20 --=20 2.46.0 From nobody Thu Nov 28 02:13:45 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C75E139566 for ; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793874; cv=none; b=WECBG9mVlvxLWieXNOx4xUTC+eUkNTwExstFIeZwhAtjTkmOXcJ/Axx6TSP0J9zSwHwAWCB97oTAei8rEXYXt8IU3wtc8JNonbn/ua2Z1LH/UlajLgfOeW3GoxGfShKUkjArvQlAl3YA8LOeJq08s8ZcO6OtZA1Z8Oq3MziKVz4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723793874; c=relaxed/simple; bh=bWfj8/aqYfKMeMa4cF07zxom827l/axtbZeMVPNCd5w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pVQc3aI2JtR5lSAhqDINgc4O09CZtb4m8QP7DBWyCmk032OrQYmuEX9a/b8XSx+C3Wx86wNsBfIRa04roY96gyTXb3FcMjsp/81CBDK2Mv1QZNhwNbhjFxV2RuEXiw2EhmQ+TJNl9phCxDMHMXqCSpEpzP6RFImiw5PWDXI9e18= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=B2vnlcYZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="B2vnlcYZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9AD7AC4AF4D; Fri, 16 Aug 2024 07:37:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723793873; bh=bWfj8/aqYfKMeMa4cF07zxom827l/axtbZeMVPNCd5w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=B2vnlcYZl3B+bR6aYarmnwAA79sdioTCBa+SOqID5fEXXtFEkVqjkUzcBotpt0ACL /e21hSUA5dUH0FSPxM0cZGdoQ7RDCY4RDWkMbhp5rs9LRKmUiMg/4U9slpXWytFK6O WoBjmpSscAUCsbAetXM931E9iQajtRRCSjaQq6kssTaUm4wA3rtUWPPhH9RPP/y8Jg CBu2bk2FeifPx8aF7rEIQqmAE/YEKaT5eG6hPRtk5fJXDD3lI7LGC+x8+L8FFaWvpB DS0hpZkoJttupvKoj57wo18bynsHGVytm9k2JQJt9RPEcIAiiAaZldAAeB+1RBkQnE t8ij01M7lmH2w== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1serWx-000000055f7-38jG; Fri, 16 Aug 2024 09:37:51 +0200 From: Mauro Carvalho Chehab To: Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , "Michael S. Tsirkin" , Ani Sinha , Dongjiu Geng , Igor Mammedov , linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v8 13/13] acpi/ghes: check if the BIOS pointers for HEST are correct Date: Fri, 16 Aug 2024 09:37:45 +0200 Message-ID: <52e6058feba318d01f54da6dca427b40ea5c9435.1723793768.git.mchehab+huawei@kernel.org> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: Mauro Carvalho Chehab Content-Type: text/plain; charset="utf-8" The OS kernels navigate between HEST, error source struct and CPER by the usage of some pointers. Double-check if such pointers were properly initializing, ensuring that they match the right address for CPER. Signed-off-by: Mauro Carvalho Chehab --- hw/acpi/ghes.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index a822a5eafaa0..51e2e40e5a9c 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -85,6 +85,9 @@ enum AcpiHestSourceId { #define HEST_GHES_V2_TABLE_SIZE 92 #define GHES_ACK_OFFSET (64 + GAS_ADDR_OFFSET + ACPI_HEST_HEADER_= SIZE) =20 +/* ACPI 6.2: 18.3.2.7: Generic Hardware Error Source */ +#define GHES_ERR_ST_ADDR_OFFSET (20 + GAS_ADDR_OFFSET + ACPI_HEST_HEADER_= SIZE) + /* * Values for error_severity field */ @@ -425,7 +428,10 @@ NotifierList acpi_generic_error_notifiers =3D void ghes_record_cper_errors(const void *cper, size_t len, enum AcpiGhesNotifyType notify, Error **errp) { - uint64_t cper_addr, read_ack_start_addr; + uint64_t hest_read_ack_start_addr, read_ack_start_addr; + uint64_t read_ack_start_addr_2, err_source_struct; + uint64_t hest_err_block_addr, error_block_addr; + uint64_t cper_addr, cper_addr_2; enum AcpiHestSourceId source; AcpiGedState *acpi_ged_state; AcpiGhesState *ags; @@ -450,6 +456,28 @@ void ghes_record_cper_errors(const void *cper, size_t = len, cper_addr +=3D ACPI_HEST_SRC_ID_COUNT * sizeof(uint64_t); cper_addr +=3D source * ACPI_GHES_MAX_RAW_DATA_LENGTH; =20 + err_source_struct =3D le64_to_cpu(ags->hest_addr_le) + + source * HEST_GHES_V2_TABLE_SIZE; + + /* Check if BIOS addr pointers were properly generated */ + + hest_err_block_addr =3D err_source_struct + GHES_ERR_ST_ADDR_OFFSET; + hest_read_ack_start_addr =3D err_source_struct + GHES_ACK_OFFSET; + + cpu_physical_memory_read(hest_err_block_addr, &error_block_addr, + sizeof(error_block_addr)); + + cpu_physical_memory_read(error_block_addr, &cper_addr_2, + sizeof(error_block_addr)); + + cpu_physical_memory_read(hest_read_ack_start_addr, &read_ack_start_add= r_2, + sizeof(read_ack_start_addr_2)); + + assert(cper_addr =3D=3D cper_addr_2); + assert(read_ack_start_addr =3D=3D read_ack_start_addr_2); + + /* Update ACK offset to notify about a new error */ + cpu_physical_memory_read(read_ack_start_addr, &read_ack, sizeof(uint64_t)); =20 --=20 2.46.0