From nobody Wed Nov 27 12:26:21 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 169857770109957.85084730752078; Sun, 29 Oct 2023 04:08:21 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qx3dq-0007Vy-R9; Sun, 29 Oct 2023 07:07:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qx3do-0007Oa-Sj for qemu-devel@nongnu.org; Sun, 29 Oct 2023 07:07:36 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qx3dk-0000Hu-Nd for qemu-devel@nongnu.org; Sun, 29 Oct 2023 07:07:36 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 24AA4756082; Sun, 29 Oct 2023 12:07:33 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id F0B1C7560A3; Sun, 29 Oct 2023 12:07:32 +0100 (CET) Message-Id: In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v2 1/4] hw/isa/vt82c686: Bring back via_isa_set_irq() To: qemu-devel@nongnu.org Cc: philmd@linaro.org, Jiaxun Yang , Bernhard Beschow , vr_qemu@t-online.de Date: Sun, 29 Oct 2023 12:07:32 +0100 (CET) X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1698577704105100005 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The VIA intergrated south bridge chips combine several functions and allow routing their interrupts to any of the ISA IRQs (also allowing multiple components to share the same ISA IRQ, e.g. pegasos2 firmware configures USB, sound and PCI to all use IRQ 9). Bring back via_isa_set_irq() and change it to take the PCIDevice that wants to change an IRQ and keep track of the interrupt status of each source separately and do the mapping to ISA IRQ within the ISA bridge to allow different sources to control the same ISA IRQ lines. This may not handle cases when the ISA IRQ is also controlled by devices directly, not going through via_isa_set_irq() such as serial, parallel or keyboard but these IRQs being conventionally fixed are not likely for guests to change or share with other devices so hopefully this does not cause a problem in practice. This reverts commit 4e5a20b6da9b1f6d2e9621ed7eb8b239560104ae. Signed-off-by: BALATON Zoltan --- hw/isa/vt82c686.c | 39 +++++++++++++++++++++++++++++++++++++++ include/hw/isa/vt82c686.h | 2 ++ 2 files changed, 41 insertions(+) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 57bdfb4e78..c1826c77eb 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -549,6 +549,7 @@ struct ViaISAState { PCIDevice dev; qemu_irq cpu_intr; qemu_irq *isa_irqs_in; + uint16_t isa_irq_state[ISA_NUM_IRQS]; ViaSuperIOState via_sio; MC146818RtcState rtc; PCIIDEState ide; @@ -592,6 +593,44 @@ static const TypeInfo via_isa_info =3D { }, }; =20 +void via_isa_set_irq(PCIDevice *d, int pin, int level) +{ + ViaISAState *s =3D VIA_ISA(pci_get_function_0(d)); + int n =3D PCI_FUNC(d->devfn); + uint8_t isa_irq =3D d->config[PCI_INTERRUPT_LINE], max_irq =3D 15; + + switch (n) { + case 2: /* USB ports 0-1 */ + case 3: /* USB ports 2-3 */ + max_irq =3D 14; + break; + } + + if (unlikely(isa_irq > max_irq || isa_irq =3D=3D 2)) { + qemu_log_mask(LOG_GUEST_ERROR, "Invalid ISA IRQ routing %d for %d", + isa_irq, n); + return; + } + if (isa_irq =3D=3D 0) { + return; /* disabled */ + } + + /* + * In addition to recording status of sources mapped to each isa_irq we + * keep track of all sources in IRQ 0 and use that as a mask to avoid = stuck + * interrupts in case mapping of a source is changed while IRQ is rais= ed. + */ + if (level) { + s->isa_irq_state[isa_irq] |=3D BIT(n); + s->isa_irq_state[0] |=3D BIT(n); + } else { + s->isa_irq_state[isa_irq] &=3D ~BIT(n); + s->isa_irq_state[0] &=3D ~BIT(n); + } + s->isa_irq_state[isa_irq] &=3D s->isa_irq_state[0]; + qemu_set_irq(s->isa_irqs_in[isa_irq], !!s->isa_irq_state[isa_irq]); +} + static void via_isa_request_i8259_irq(void *opaque, int irq, int level) { ViaISAState *s =3D opaque; diff --git a/include/hw/isa/vt82c686.h b/include/hw/isa/vt82c686.h index b6e95b2851..da1722daf2 100644 --- a/include/hw/isa/vt82c686.h +++ b/include/hw/isa/vt82c686.h @@ -34,4 +34,6 @@ struct ViaAC97State { uint32_t ac97_cmd; }; =20 +void via_isa_set_irq(PCIDevice *d, int n, int level); + #endif --=20 2.30.9 From nobody Wed Nov 27 12:26:21 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698577742383908.0901907515348; Sun, 29 Oct 2023 04:09:02 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qx3dr-0007Wc-D5; Sun, 29 Oct 2023 07:07:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qx3dm-0007Nr-Ga for qemu-devel@nongnu.org; Sun, 29 Oct 2023 07:07:35 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qx3dk-0000I5-Mp for qemu-devel@nongnu.org; Sun, 29 Oct 2023 07:07:34 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 34E527560AC; Sun, 29 Oct 2023 12:07:34 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 1634E7560A8; Sun, 29 Oct 2023 12:07:34 +0100 (CET) Message-Id: <4e128244cae4960c4ba7094c6fba6d8a5b3b3ad8.1698577151.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v2 2/4] hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts To: qemu-devel@nongnu.org Cc: philmd@linaro.org, Jiaxun Yang , Bernhard Beschow , vr_qemu@t-online.de Date: Sun, 29 Oct 2023 12:07:34 +0100 (CET) X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1698577743464100003 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This device is part of a superio/ISA bridge chip and IRQs from it are routed to an ISA interrupt. Use via_isa_set_irq() function to implement this in a vt82c686-uhci-pci specific irq handler. This reverts commit 422a6e8075752bc5342afd3eace23a4990dd7d98. Signed-off-by: BALATON Zoltan --- hw/usb/vt82c686-uhci-pci.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/usb/vt82c686-uhci-pci.c b/hw/usb/vt82c686-uhci-pci.c index b4884c9011..6162806172 100644 --- a/hw/usb/vt82c686-uhci-pci.c +++ b/hw/usb/vt82c686-uhci-pci.c @@ -1,7 +1,14 @@ #include "qemu/osdep.h" +#include "hw/irq.h" #include "hw/isa/vt82c686.h" #include "hcd-uhci.h" =20 +static void uhci_isa_set_irq(void *opaque, int irq_num, int level) +{ + UHCIState *s =3D opaque; + via_isa_set_irq(&s->dev, 0, level); +} + static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp) { UHCIState *s =3D UHCI(dev); @@ -15,6 +22,8 @@ static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Er= ror **errp) pci_set_long(pci_conf + 0xc0, 0x00002000); =20 usb_uhci_common_realize(dev, errp); + object_unref(s->irq); + s->irq =3D qemu_allocate_irq(uhci_isa_set_irq, s, 0); } =20 static UHCIInfo uhci_info[] =3D { --=20 2.30.9 From nobody Wed Nov 27 12:26:21 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1698577741217966.6957100764878; Sun, 29 Oct 2023 04:09:01 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qx3dr-0007X7-Nz; Sun, 29 Oct 2023 07:07:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qx3do-0007Oc-Tn for qemu-devel@nongnu.org; Sun, 29 Oct 2023 07:07:36 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qx3dk-0000IL-UF for qemu-devel@nongnu.org; Sun, 29 Oct 2023 07:07:36 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 4E8F1756072; Sun, 29 Oct 2023 12:07:35 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 26C447456A7; Sun, 29 Oct 2023 12:07:35 +0100 (CET) Message-Id: <418bad646fd2c7f667d580c5abc745b7cd0f717f.1698577151.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v2 3/4] hw/isa/vt82c686: Route PIRQ inputs using via_isa_set_irq() To: qemu-devel@nongnu.org Cc: philmd@linaro.org, Jiaxun Yang , Bernhard Beschow , vr_qemu@t-online.de Date: Sun, 29 Oct 2023 12:07:35 +0100 (CET) X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1698577743477100004 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The chip has 4 pins (called PIRQA-D in VT82C686B and PINTA-D in VT8231) that are meant to be connected to PCI IRQ lines and allow routing PCI interrupts to the ISA PIC. Route these in via_isa_set_irq() to make it possible to share them with internal functions that can also be routed to the same ISA IRQs. Fixes: 2fdadd02e675caca4aba4ae26317701fe2c4c901 Signed-off-by: BALATON Zoltan --- hw/isa/vt82c686.c | 65 +++++++++++++++++------------------------------ 1 file changed, 24 insertions(+), 41 deletions(-) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index c1826c77eb..c44bfeeab0 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -593,6 +593,21 @@ static const TypeInfo via_isa_info =3D { }, }; =20 +static int via_isa_get_pci_irq(const ViaISAState *s, int pin) +{ + switch (pin) { + case 0: + return s->dev.config[0x55] >> 4; + case 1: + return s->dev.config[0x56] & 0xf; + case 2: + return s->dev.config[0x56] >> 4; + case 3: + return s->dev.config[0x57] >> 4; + } + return 0; +} + void via_isa_set_irq(PCIDevice *d, int pin, int level) { ViaISAState *s =3D VIA_ISA(pci_get_function_0(d)); @@ -600,6 +615,10 @@ void via_isa_set_irq(PCIDevice *d, int pin, int level) uint8_t isa_irq =3D d->config[PCI_INTERRUPT_LINE], max_irq =3D 15; =20 switch (n) { + case 0: /* PIRQ/PINT inputs */ + isa_irq =3D via_isa_get_pci_irq(s, pin); + n =3D 12 + pin; + break; case 2: /* USB ports 0-1 */ case 3: /* USB ports 2-3 */ max_irq =3D 14; @@ -631,50 +650,15 @@ void via_isa_set_irq(PCIDevice *d, int pin, int level) qemu_set_irq(s->isa_irqs_in[isa_irq], !!s->isa_irq_state[isa_irq]); } =20 -static void via_isa_request_i8259_irq(void *opaque, int irq, int level) -{ - ViaISAState *s =3D opaque; - qemu_set_irq(s->cpu_intr, level); -} - -static int via_isa_get_pci_irq(const ViaISAState *s, int irq_num) +static void via_isa_pirq(void *opaque, int pin, int level) { - switch (irq_num) { - case 0: - return s->dev.config[0x55] >> 4; - case 1: - return s->dev.config[0x56] & 0xf; - case 2: - return s->dev.config[0x56] >> 4; - case 3: - return s->dev.config[0x57] >> 4; - } - return 0; + via_isa_set_irq(opaque, pin, level); } =20 -static void via_isa_set_pci_irq(void *opaque, int irq_num, int level) +static void via_isa_request_i8259_irq(void *opaque, int irq, int level) { ViaISAState *s =3D opaque; - PCIBus *bus =3D pci_get_bus(&s->dev); - int i, pic_level, pic_irq =3D via_isa_get_pci_irq(s, irq_num); - - /* IRQ 0: disabled, IRQ 2,8,13: reserved */ - if (!pic_irq) { - return; - } - if (unlikely(pic_irq =3D=3D 2 || pic_irq =3D=3D 8 || pic_irq =3D=3D 13= )) { - qemu_log_mask(LOG_GUEST_ERROR, "Invalid ISA IRQ routing"); - } - - /* The pic level is the logical OR of all the PCI irqs mapped to it. */ - pic_level =3D 0; - for (i =3D 0; i < PCI_NUM_PINS; i++) { - if (pic_irq =3D=3D via_isa_get_pci_irq(s, i)) { - pic_level |=3D pci_bus_get_irq_level(bus, i); - } - } - /* Now we change the pic irq level according to the via irq mappings. = */ - qemu_set_irq(s->isa_irqs_in[pic_irq], pic_level); + qemu_set_irq(s->cpu_intr, level); } =20 static void via_isa_realize(PCIDevice *d, Error **errp) @@ -687,6 +671,7 @@ static void via_isa_realize(PCIDevice *d, Error **errp) int i; =20 qdev_init_gpio_out(dev, &s->cpu_intr, 1); + qdev_init_gpio_in_named(dev, via_isa_pirq, "pirq", PCI_NUM_PINS); isa_irq =3D qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1); isa_bus =3D isa_bus_new(dev, pci_address_space(d), pci_address_space_i= o(d), errp); @@ -700,8 +685,6 @@ static void via_isa_realize(PCIDevice *d, Error **errp) i8254_pit_init(isa_bus, 0x40, 0, NULL); i8257_dma_init(isa_bus, 0); =20 - qdev_init_gpio_in_named(dev, via_isa_set_pci_irq, "pirq", PCI_NUM_PINS= ); - /* RTC */ qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000); if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) { --=20 2.30.9 From nobody Wed Nov 27 12:26:21 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16985777246261019.6944712714277; Sun, 29 Oct 2023 04:08:44 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qx3dr-0007Wi-I6; Sun, 29 Oct 2023 07:07:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qx3do-0007OX-Qr for qemu-devel@nongnu.org; Sun, 29 Oct 2023 07:07:36 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qx3dm-0000Ib-1J for qemu-devel@nongnu.org; Sun, 29 Oct 2023 07:07:36 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 54C107560AF; Sun, 29 Oct 2023 12:07:36 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 351857560A3; Sun, 29 Oct 2023 12:07:36 +0100 (CET) Message-Id: In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v2 4/4] hw/audio/via-ac97: Route interrupts using via_isa_set_irq() To: qemu-devel@nongnu.org Cc: philmd@linaro.org, Jiaxun Yang , Bernhard Beschow , vr_qemu@t-online.de Date: Sun, 29 Oct 2023 12:07:36 +0100 (CET) X-Spam-Probability: 8% Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1698577725352100002 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: BALATON Zoltan --- hw/audio/via-ac97.c | 8 ++++---- hw/isa/vt82c686.c | 1 + 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/audio/via-ac97.c b/hw/audio/via-ac97.c index 30095a4c7a..4c127a1def 100644 --- a/hw/audio/via-ac97.c +++ b/hw/audio/via-ac97.c @@ -211,14 +211,14 @@ static void out_cb(void *opaque, int avail) AUD_set_active_out(s->vo, 0); } if (c->type & STAT_EOL) { - pci_set_irq(&s->dev, 1); + via_isa_set_irq(&s->dev, 0, 1); } } if (CLEN_IS_FLAG(c)) { c->stat |=3D STAT_FLAG; c->stat |=3D STAT_PAUSED; if (c->type & STAT_FLAG) { - pci_set_irq(&s->dev, 1); + via_isa_set_irq(&s->dev, 0, 1); } } if (CLEN_IS_STOP(c)) { @@ -305,13 +305,13 @@ static void sgd_write(void *opaque, hwaddr addr, uint= 64_t val, unsigned size) if (val & STAT_EOL) { s->aur.stat &=3D ~(STAT_EOL | STAT_PAUSED); if (s->aur.type & STAT_EOL) { - pci_set_irq(&s->dev, 0); + via_isa_set_irq(&s->dev, 0, 0); } } if (val & STAT_FLAG) { s->aur.stat &=3D ~(STAT_FLAG | STAT_PAUSED); if (s->aur.type & STAT_FLAG) { - pci_set_irq(&s->dev, 0); + via_isa_set_irq(&s->dev, 0, 0); } } break; diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index c44bfeeab0..bf148f4c1b 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -621,6 +621,7 @@ void via_isa_set_irq(PCIDevice *d, int pin, int level) break; case 2: /* USB ports 0-1 */ case 3: /* USB ports 2-3 */ + case 5: /* AC97 audio */ max_irq =3D 14; break; } --=20 2.30.9